gpio-tc3589x.c 9.6 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License, version 2
  5. * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson
  6. * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
  7. */
  8. #include <linux/module.h>
  9. #include <linux/init.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/slab.h>
  12. #include <linux/gpio.h>
  13. #include <linux/irq.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/mfd/tc3589x.h>
  16. /*
  17. * These registers are modified under the irq bus lock and cached to avoid
  18. * unnecessary writes in bus_sync_unlock.
  19. */
  20. enum { REG_IBE, REG_IEV, REG_IS, REG_IE };
  21. #define CACHE_NR_REGS 4
  22. #define CACHE_NR_BANKS 3
  23. struct tc3589x_gpio {
  24. struct gpio_chip chip;
  25. struct tc3589x *tc3589x;
  26. struct device *dev;
  27. struct mutex irq_lock;
  28. int irq_base;
  29. /* Caches of interrupt control registers for bus_lock */
  30. u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
  31. u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
  32. };
  33. static inline struct tc3589x_gpio *to_tc3589x_gpio(struct gpio_chip *chip)
  34. {
  35. return container_of(chip, struct tc3589x_gpio, chip);
  36. }
  37. static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset)
  38. {
  39. struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
  40. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  41. u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
  42. u8 mask = 1 << (offset % 8);
  43. int ret;
  44. ret = tc3589x_reg_read(tc3589x, reg);
  45. if (ret < 0)
  46. return ret;
  47. return ret & mask;
  48. }
  49. static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
  50. {
  51. struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
  52. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  53. u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
  54. unsigned pos = offset % 8;
  55. u8 data[] = {!!val << pos, 1 << pos};
  56. tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data);
  57. }
  58. static int tc3589x_gpio_direction_output(struct gpio_chip *chip,
  59. unsigned offset, int val)
  60. {
  61. struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
  62. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  63. u8 reg = TC3589x_GPIODIR0 + offset / 8;
  64. unsigned pos = offset % 8;
  65. tc3589x_gpio_set(chip, offset, val);
  66. return tc3589x_set_bits(tc3589x, reg, 1 << pos, 1 << pos);
  67. }
  68. static int tc3589x_gpio_direction_input(struct gpio_chip *chip,
  69. unsigned offset)
  70. {
  71. struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
  72. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  73. u8 reg = TC3589x_GPIODIR0 + offset / 8;
  74. unsigned pos = offset % 8;
  75. return tc3589x_set_bits(tc3589x, reg, 1 << pos, 0);
  76. }
  77. static int tc3589x_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
  78. {
  79. struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
  80. return tc3589x_gpio->irq_base + offset;
  81. }
  82. static struct gpio_chip template_chip = {
  83. .label = "tc3589x",
  84. .owner = THIS_MODULE,
  85. .direction_input = tc3589x_gpio_direction_input,
  86. .get = tc3589x_gpio_get,
  87. .direction_output = tc3589x_gpio_direction_output,
  88. .set = tc3589x_gpio_set,
  89. .to_irq = tc3589x_gpio_to_irq,
  90. .can_sleep = 1,
  91. };
  92. static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type)
  93. {
  94. struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
  95. int offset = d->irq - tc3589x_gpio->irq_base;
  96. int regoffset = offset / 8;
  97. int mask = 1 << (offset % 8);
  98. if (type == IRQ_TYPE_EDGE_BOTH) {
  99. tc3589x_gpio->regs[REG_IBE][regoffset] |= mask;
  100. return 0;
  101. }
  102. tc3589x_gpio->regs[REG_IBE][regoffset] &= ~mask;
  103. if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
  104. tc3589x_gpio->regs[REG_IS][regoffset] |= mask;
  105. else
  106. tc3589x_gpio->regs[REG_IS][regoffset] &= ~mask;
  107. if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH)
  108. tc3589x_gpio->regs[REG_IEV][regoffset] |= mask;
  109. else
  110. tc3589x_gpio->regs[REG_IEV][regoffset] &= ~mask;
  111. return 0;
  112. }
  113. static void tc3589x_gpio_irq_lock(struct irq_data *d)
  114. {
  115. struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
  116. mutex_lock(&tc3589x_gpio->irq_lock);
  117. }
  118. static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d)
  119. {
  120. struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
  121. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  122. static const u8 regmap[] = {
  123. [REG_IBE] = TC3589x_GPIOIBE0,
  124. [REG_IEV] = TC3589x_GPIOIEV0,
  125. [REG_IS] = TC3589x_GPIOIS0,
  126. [REG_IE] = TC3589x_GPIOIE0,
  127. };
  128. int i, j;
  129. for (i = 0; i < CACHE_NR_REGS; i++) {
  130. for (j = 0; j < CACHE_NR_BANKS; j++) {
  131. u8 old = tc3589x_gpio->oldregs[i][j];
  132. u8 new = tc3589x_gpio->regs[i][j];
  133. if (new == old)
  134. continue;
  135. tc3589x_gpio->oldregs[i][j] = new;
  136. tc3589x_reg_write(tc3589x, regmap[i] + j * 8, new);
  137. }
  138. }
  139. mutex_unlock(&tc3589x_gpio->irq_lock);
  140. }
  141. static void tc3589x_gpio_irq_mask(struct irq_data *d)
  142. {
  143. struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
  144. int offset = d->irq - tc3589x_gpio->irq_base;
  145. int regoffset = offset / 8;
  146. int mask = 1 << (offset % 8);
  147. tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask;
  148. }
  149. static void tc3589x_gpio_irq_unmask(struct irq_data *d)
  150. {
  151. struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
  152. int offset = d->irq - tc3589x_gpio->irq_base;
  153. int regoffset = offset / 8;
  154. int mask = 1 << (offset % 8);
  155. tc3589x_gpio->regs[REG_IE][regoffset] |= mask;
  156. }
  157. static struct irq_chip tc3589x_gpio_irq_chip = {
  158. .name = "tc3589x-gpio",
  159. .irq_bus_lock = tc3589x_gpio_irq_lock,
  160. .irq_bus_sync_unlock = tc3589x_gpio_irq_sync_unlock,
  161. .irq_mask = tc3589x_gpio_irq_mask,
  162. .irq_unmask = tc3589x_gpio_irq_unmask,
  163. .irq_set_type = tc3589x_gpio_irq_set_type,
  164. };
  165. static irqreturn_t tc3589x_gpio_irq(int irq, void *dev)
  166. {
  167. struct tc3589x_gpio *tc3589x_gpio = dev;
  168. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  169. u8 status[CACHE_NR_BANKS];
  170. int ret;
  171. int i;
  172. ret = tc3589x_block_read(tc3589x, TC3589x_GPIOMIS0,
  173. ARRAY_SIZE(status), status);
  174. if (ret < 0)
  175. return IRQ_NONE;
  176. for (i = 0; i < ARRAY_SIZE(status); i++) {
  177. unsigned int stat = status[i];
  178. if (!stat)
  179. continue;
  180. while (stat) {
  181. int bit = __ffs(stat);
  182. int line = i * 8 + bit;
  183. handle_nested_irq(tc3589x_gpio->irq_base + line);
  184. stat &= ~(1 << bit);
  185. }
  186. tc3589x_reg_write(tc3589x, TC3589x_GPIOIC0 + i, status[i]);
  187. }
  188. return IRQ_HANDLED;
  189. }
  190. static int tc3589x_gpio_irq_init(struct tc3589x_gpio *tc3589x_gpio)
  191. {
  192. int base = tc3589x_gpio->irq_base;
  193. int irq;
  194. for (irq = base; irq < base + tc3589x_gpio->chip.ngpio; irq++) {
  195. irq_set_chip_data(irq, tc3589x_gpio);
  196. irq_set_chip_and_handler(irq, &tc3589x_gpio_irq_chip,
  197. handle_simple_irq);
  198. irq_set_nested_thread(irq, 1);
  199. #ifdef CONFIG_ARM
  200. set_irq_flags(irq, IRQF_VALID);
  201. #else
  202. irq_set_noprobe(irq);
  203. #endif
  204. }
  205. return 0;
  206. }
  207. static void tc3589x_gpio_irq_remove(struct tc3589x_gpio *tc3589x_gpio)
  208. {
  209. int base = tc3589x_gpio->irq_base;
  210. int irq;
  211. for (irq = base; irq < base + tc3589x_gpio->chip.ngpio; irq++) {
  212. #ifdef CONFIG_ARM
  213. set_irq_flags(irq, 0);
  214. #endif
  215. irq_set_chip_and_handler(irq, NULL, NULL);
  216. irq_set_chip_data(irq, NULL);
  217. }
  218. }
  219. static int __devinit tc3589x_gpio_probe(struct platform_device *pdev)
  220. {
  221. struct tc3589x *tc3589x = dev_get_drvdata(pdev->dev.parent);
  222. struct tc3589x_gpio_platform_data *pdata;
  223. struct tc3589x_gpio *tc3589x_gpio;
  224. int ret;
  225. int irq;
  226. pdata = tc3589x->pdata->gpio;
  227. if (!pdata)
  228. return -ENODEV;
  229. irq = platform_get_irq(pdev, 0);
  230. if (irq < 0)
  231. return irq;
  232. tc3589x_gpio = kzalloc(sizeof(struct tc3589x_gpio), GFP_KERNEL);
  233. if (!tc3589x_gpio)
  234. return -ENOMEM;
  235. mutex_init(&tc3589x_gpio->irq_lock);
  236. tc3589x_gpio->dev = &pdev->dev;
  237. tc3589x_gpio->tc3589x = tc3589x;
  238. tc3589x_gpio->chip = template_chip;
  239. tc3589x_gpio->chip.ngpio = tc3589x->num_gpio;
  240. tc3589x_gpio->chip.dev = &pdev->dev;
  241. tc3589x_gpio->chip.base = pdata->gpio_base;
  242. tc3589x_gpio->irq_base = tc3589x->irq_base + TC3589x_INT_GPIO(0);
  243. /* Bring the GPIO module out of reset */
  244. ret = tc3589x_set_bits(tc3589x, TC3589x_RSTCTRL,
  245. TC3589x_RSTCTRL_GPIRST, 0);
  246. if (ret < 0)
  247. goto out_free;
  248. ret = tc3589x_gpio_irq_init(tc3589x_gpio);
  249. if (ret)
  250. goto out_free;
  251. ret = request_threaded_irq(irq, NULL, tc3589x_gpio_irq, IRQF_ONESHOT,
  252. "tc3589x-gpio", tc3589x_gpio);
  253. if (ret) {
  254. dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
  255. goto out_removeirq;
  256. }
  257. ret = gpiochip_add(&tc3589x_gpio->chip);
  258. if (ret) {
  259. dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
  260. goto out_freeirq;
  261. }
  262. if (pdata->setup)
  263. pdata->setup(tc3589x, tc3589x_gpio->chip.base);
  264. platform_set_drvdata(pdev, tc3589x_gpio);
  265. return 0;
  266. out_freeirq:
  267. free_irq(irq, tc3589x_gpio);
  268. out_removeirq:
  269. tc3589x_gpio_irq_remove(tc3589x_gpio);
  270. out_free:
  271. kfree(tc3589x_gpio);
  272. return ret;
  273. }
  274. static int __devexit tc3589x_gpio_remove(struct platform_device *pdev)
  275. {
  276. struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev);
  277. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  278. struct tc3589x_gpio_platform_data *pdata = tc3589x->pdata->gpio;
  279. int irq = platform_get_irq(pdev, 0);
  280. int ret;
  281. if (pdata->remove)
  282. pdata->remove(tc3589x, tc3589x_gpio->chip.base);
  283. ret = gpiochip_remove(&tc3589x_gpio->chip);
  284. if (ret < 0) {
  285. dev_err(tc3589x_gpio->dev,
  286. "unable to remove gpiochip: %d\n", ret);
  287. return ret;
  288. }
  289. free_irq(irq, tc3589x_gpio);
  290. tc3589x_gpio_irq_remove(tc3589x_gpio);
  291. platform_set_drvdata(pdev, NULL);
  292. kfree(tc3589x_gpio);
  293. return 0;
  294. }
  295. static struct platform_driver tc3589x_gpio_driver = {
  296. .driver.name = "tc3589x-gpio",
  297. .driver.owner = THIS_MODULE,
  298. .probe = tc3589x_gpio_probe,
  299. .remove = __devexit_p(tc3589x_gpio_remove),
  300. };
  301. static int __init tc3589x_gpio_init(void)
  302. {
  303. return platform_driver_register(&tc3589x_gpio_driver);
  304. }
  305. subsys_initcall(tc3589x_gpio_init);
  306. static void __exit tc3589x_gpio_exit(void)
  307. {
  308. platform_driver_unregister(&tc3589x_gpio_driver);
  309. }
  310. module_exit(tc3589x_gpio_exit);
  311. MODULE_LICENSE("GPL v2");
  312. MODULE_DESCRIPTION("TC3589x GPIO driver");
  313. MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent");