smp.c 5.4 KB

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  1. /*
  2. * Copyright 2010 Tilera Corporation. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation, version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11. * NON INFRINGEMENT. See the GNU General Public License for
  12. * more details.
  13. *
  14. * TILE SMP support routines.
  15. */
  16. #include <linux/smp.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/io.h>
  19. #include <linux/irq.h>
  20. #include <linux/module.h>
  21. #include <asm/cacheflush.h>
  22. HV_Topology smp_topology __write_once;
  23. EXPORT_SYMBOL(smp_topology);
  24. #if CHIP_HAS_IPI()
  25. static unsigned long __iomem *ipi_mappings[NR_CPUS];
  26. #endif
  27. /*
  28. * Top-level send_IPI*() functions to send messages to other cpus.
  29. */
  30. /* Set by smp_send_stop() to avoid recursive panics. */
  31. static int stopping_cpus;
  32. static void __send_IPI_many(HV_Recipient *recip, int nrecip, int tag)
  33. {
  34. int sent = 0;
  35. while (sent < nrecip) {
  36. int rc = hv_send_message(recip, nrecip,
  37. (HV_VirtAddr)&tag, sizeof(tag));
  38. if (rc < 0) {
  39. if (!stopping_cpus) /* avoid recursive panic */
  40. panic("hv_send_message returned %d", rc);
  41. break;
  42. }
  43. WARN_ONCE(rc == 0, "hv_send_message() returned zero\n");
  44. sent += rc;
  45. }
  46. }
  47. void send_IPI_single(int cpu, int tag)
  48. {
  49. HV_Recipient recip = {
  50. .y = cpu / smp_width,
  51. .x = cpu % smp_width,
  52. .state = HV_TO_BE_SENT
  53. };
  54. __send_IPI_many(&recip, 1, tag);
  55. }
  56. void send_IPI_many(const struct cpumask *mask, int tag)
  57. {
  58. HV_Recipient recip[NR_CPUS];
  59. int cpu;
  60. int nrecip = 0;
  61. int my_cpu = smp_processor_id();
  62. for_each_cpu(cpu, mask) {
  63. HV_Recipient *r;
  64. BUG_ON(cpu == my_cpu);
  65. r = &recip[nrecip++];
  66. r->y = cpu / smp_width;
  67. r->x = cpu % smp_width;
  68. r->state = HV_TO_BE_SENT;
  69. }
  70. __send_IPI_many(recip, nrecip, tag);
  71. }
  72. void send_IPI_allbutself(int tag)
  73. {
  74. struct cpumask mask;
  75. cpumask_copy(&mask, cpu_online_mask);
  76. cpumask_clear_cpu(smp_processor_id(), &mask);
  77. send_IPI_many(&mask, tag);
  78. }
  79. /*
  80. * Functions related to starting/stopping cpus.
  81. */
  82. /* Handler to start the current cpu. */
  83. static void smp_start_cpu_interrupt(void)
  84. {
  85. get_irq_regs()->pc = start_cpu_function_addr;
  86. }
  87. /* Handler to stop the current cpu. */
  88. static void smp_stop_cpu_interrupt(void)
  89. {
  90. set_cpu_online(smp_processor_id(), 0);
  91. arch_local_irq_disable_all();
  92. for (;;)
  93. asm("nap; nop");
  94. }
  95. /* This function calls the 'stop' function on all other CPUs in the system. */
  96. void smp_send_stop(void)
  97. {
  98. stopping_cpus = 1;
  99. send_IPI_allbutself(MSG_TAG_STOP_CPU);
  100. }
  101. /* On panic, just wait; we may get an smp_send_stop() later on. */
  102. void panic_smp_self_stop(void)
  103. {
  104. while (1)
  105. asm("nap; nop");
  106. }
  107. /*
  108. * Dispatch code called from hv_message_intr() for HV_MSG_TILE hv messages.
  109. */
  110. void evaluate_message(int tag)
  111. {
  112. switch (tag) {
  113. case MSG_TAG_START_CPU: /* Start up a cpu */
  114. smp_start_cpu_interrupt();
  115. break;
  116. case MSG_TAG_STOP_CPU: /* Sent to shut down slave CPU's */
  117. smp_stop_cpu_interrupt();
  118. break;
  119. case MSG_TAG_CALL_FUNCTION_MANY: /* Call function on cpumask */
  120. generic_smp_call_function_interrupt();
  121. break;
  122. case MSG_TAG_CALL_FUNCTION_SINGLE: /* Call function on one other CPU */
  123. generic_smp_call_function_single_interrupt();
  124. break;
  125. default:
  126. panic("Unknown IPI message tag %d", tag);
  127. break;
  128. }
  129. }
  130. /*
  131. * flush_icache_range() code uses smp_call_function().
  132. */
  133. struct ipi_flush {
  134. unsigned long start;
  135. unsigned long end;
  136. };
  137. static void ipi_flush_icache_range(void *info)
  138. {
  139. struct ipi_flush *flush = (struct ipi_flush *) info;
  140. __flush_icache_range(flush->start, flush->end);
  141. }
  142. void flush_icache_range(unsigned long start, unsigned long end)
  143. {
  144. struct ipi_flush flush = { start, end };
  145. preempt_disable();
  146. on_each_cpu(ipi_flush_icache_range, &flush, 1);
  147. preempt_enable();
  148. }
  149. /* Called when smp_send_reschedule() triggers IRQ_RESCHEDULE. */
  150. static irqreturn_t handle_reschedule_ipi(int irq, void *token)
  151. {
  152. __get_cpu_var(irq_stat).irq_resched_count++;
  153. scheduler_ipi();
  154. return IRQ_HANDLED;
  155. }
  156. static struct irqaction resched_action = {
  157. .handler = handle_reschedule_ipi,
  158. .name = "resched",
  159. .dev_id = handle_reschedule_ipi /* unique token */,
  160. };
  161. void __init ipi_init(void)
  162. {
  163. #if CHIP_HAS_IPI()
  164. int cpu;
  165. /* Map IPI trigger MMIO addresses. */
  166. for_each_possible_cpu(cpu) {
  167. HV_Coord tile;
  168. HV_PTE pte;
  169. unsigned long offset;
  170. tile.x = cpu_x(cpu);
  171. tile.y = cpu_y(cpu);
  172. if (hv_get_ipi_pte(tile, KERNEL_PL, &pte) != 0)
  173. panic("Failed to initialize IPI for cpu %d\n", cpu);
  174. offset = hv_pte_get_pfn(pte) << PAGE_SHIFT;
  175. ipi_mappings[cpu] = ioremap_prot(offset, PAGE_SIZE, pte);
  176. }
  177. #endif
  178. /* Bind handle_reschedule_ipi() to IRQ_RESCHEDULE. */
  179. tile_irq_activate(IRQ_RESCHEDULE, TILE_IRQ_PERCPU);
  180. BUG_ON(setup_irq(IRQ_RESCHEDULE, &resched_action));
  181. }
  182. #if CHIP_HAS_IPI()
  183. void smp_send_reschedule(int cpu)
  184. {
  185. WARN_ON(cpu_is_offline(cpu));
  186. /*
  187. * We just want to do an MMIO store. The traditional writeq()
  188. * functions aren't really correct here, since they're always
  189. * directed at the PCI shim. For now, just do a raw store,
  190. * casting away the __iomem attribute.
  191. */
  192. ((unsigned long __force *)ipi_mappings[cpu])[IRQ_RESCHEDULE] = 0;
  193. }
  194. #else
  195. void smp_send_reschedule(int cpu)
  196. {
  197. HV_Coord coord;
  198. WARN_ON(cpu_is_offline(cpu));
  199. coord.y = cpu_y(cpu);
  200. coord.x = cpu_x(cpu);
  201. hv_trigger_ipi(coord, IRQ_RESCHEDULE);
  202. }
  203. #endif /* CHIP_HAS_IPI() */