ops-pnx8550.c 6.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283
  1. /*
  2. *
  3. * BRIEF MODULE DESCRIPTION
  4. *
  5. * 2.6 port, Embedded Alley Solutions, Inc
  6. *
  7. * Based on:
  8. * Author: source@mvista.com
  9. *
  10. * This program is free software; you can distribute it and/or modify it
  11. * under the terms of the GNU General Public License (Version 2) as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  17. * for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along
  20. * with this program; if not, write to the Free Software Foundation, Inc.,
  21. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  22. */
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/init.h>
  27. #include <linux/vmalloc.h>
  28. #include <linux/delay.h>
  29. #include <asm/mach-pnx8550/pci.h>
  30. #include <asm/mach-pnx8550/glb.h>
  31. static inline void clear_status(void)
  32. {
  33. unsigned long pci_stat;
  34. pci_stat = inl(PCI_BASE | PCI_GPPM_STATUS);
  35. outl(pci_stat, PCI_BASE | PCI_GPPM_ICLR);
  36. }
  37. static inline unsigned int
  38. calc_cfg_addr(struct pci_bus *bus, unsigned int devfn, int where)
  39. {
  40. unsigned int addr;
  41. addr = ((bus->number > 0) ? (((bus->number & 0xff) << PCI_CFG_BUS_SHIFT) | 1) : 0);
  42. addr |= ((devfn & 0xff) << PCI_CFG_FUNC_SHIFT) | (where & 0xfc);
  43. return addr;
  44. }
  45. static int
  46. config_access(unsigned int pci_cmd, struct pci_bus *bus, unsigned int devfn, int where, unsigned int pci_mode, unsigned int *val)
  47. {
  48. unsigned int flags;
  49. unsigned long loops = 0;
  50. unsigned long ioaddr = calc_cfg_addr(bus, devfn, where);
  51. local_irq_save(flags);
  52. /*Clear pending interrupt status */
  53. if (inl(PCI_BASE | PCI_GPPM_STATUS)) {
  54. clear_status();
  55. while (!(inl(PCI_BASE | PCI_GPPM_STATUS) == 0)) ;
  56. }
  57. outl(ioaddr, PCI_BASE | PCI_GPPM_ADDR);
  58. if ((pci_cmd == PCI_CMD_IOW) || (pci_cmd == PCI_CMD_CONFIG_WRITE))
  59. outl(*val, PCI_BASE | PCI_GPPM_WDAT);
  60. outl(INIT_PCI_CYCLE | pci_cmd | (pci_mode & PCI_BYTE_ENABLE_MASK),
  61. PCI_BASE | PCI_GPPM_CTRL);
  62. loops =
  63. ((loops_per_jiffy *
  64. PCI_IO_JIFFIES_TIMEOUT) >> (PCI_IO_JIFFIES_SHIFT));
  65. while (1) {
  66. if (inl(PCI_BASE | PCI_GPPM_STATUS) & GPPM_DONE) {
  67. if ((pci_cmd == PCI_CMD_IOR) ||
  68. (pci_cmd == PCI_CMD_CONFIG_READ))
  69. *val = inl(PCI_BASE | PCI_GPPM_RDAT);
  70. clear_status();
  71. local_irq_restore(flags);
  72. return PCIBIOS_SUCCESSFUL;
  73. } else if (inl(PCI_BASE | PCI_GPPM_STATUS) & GPPM_R_MABORT) {
  74. break;
  75. }
  76. loops--;
  77. if (loops == 0) {
  78. printk("%s : Arbiter Locked.\n", __func__);
  79. }
  80. }
  81. clear_status();
  82. if ((pci_cmd == PCI_CMD_IOR) || (pci_cmd == PCI_CMD_IOW)) {
  83. printk("%s timeout (GPPM_CTRL=%X) ioaddr %lX pci_cmd %X\n",
  84. __func__, inl(PCI_BASE | PCI_GPPM_CTRL), ioaddr,
  85. pci_cmd);
  86. }
  87. if ((pci_cmd == PCI_CMD_IOR) || (pci_cmd == PCI_CMD_CONFIG_READ))
  88. *val = 0xffffffff;
  89. local_irq_restore(flags);
  90. return PCIBIOS_DEVICE_NOT_FOUND;
  91. }
  92. /*
  93. * We can't address 8 and 16 bit words directly. Instead we have to
  94. * read/write a 32bit word and mask/modify the data we actually want.
  95. */
  96. static int
  97. read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 * val)
  98. {
  99. unsigned int data = 0;
  100. int err;
  101. if (bus == NULL)
  102. return -1;
  103. err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(1 << (where & 3)), &data);
  104. switch (where & 0x03) {
  105. case 0:
  106. *val = (unsigned char)(data & 0x000000ff);
  107. break;
  108. case 1:
  109. *val = (unsigned char)((data & 0x0000ff00) >> 8);
  110. break;
  111. case 2:
  112. *val = (unsigned char)((data & 0x00ff0000) >> 16);
  113. break;
  114. case 3:
  115. *val = (unsigned char)((data & 0xff000000) >> 24);
  116. break;
  117. }
  118. return err;
  119. }
  120. static int
  121. read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 * val)
  122. {
  123. unsigned int data = 0;
  124. int err;
  125. if (bus == NULL)
  126. return -1;
  127. if (where & 0x01)
  128. return PCIBIOS_BAD_REGISTER_NUMBER;
  129. err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(3 << (where & 3)), &data);
  130. switch (where & 0x02) {
  131. case 0:
  132. *val = (unsigned short)(data & 0x0000ffff);
  133. break;
  134. case 2:
  135. *val = (unsigned short)((data & 0xffff0000) >> 16);
  136. break;
  137. }
  138. return err;
  139. }
  140. static int
  141. read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 * val)
  142. {
  143. int err;
  144. if (bus == NULL)
  145. return -1;
  146. if (where & 0x03)
  147. return PCIBIOS_BAD_REGISTER_NUMBER;
  148. err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, 0, val);
  149. return err;
  150. }
  151. static int
  152. write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val)
  153. {
  154. unsigned int data = (unsigned int)val;
  155. int err;
  156. if (bus == NULL)
  157. return -1;
  158. switch (where & 0x03) {
  159. case 1:
  160. data = (data << 8);
  161. break;
  162. case 2:
  163. data = (data << 16);
  164. break;
  165. case 3:
  166. data = (data << 24);
  167. break;
  168. default:
  169. break;
  170. }
  171. err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, ~(1 << (where & 3)), &data);
  172. return err;
  173. }
  174. static int
  175. write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val)
  176. {
  177. unsigned int data = (unsigned int)val;
  178. int err;
  179. if (bus == NULL)
  180. return -1;
  181. if (where & 0x01)
  182. return PCIBIOS_BAD_REGISTER_NUMBER;
  183. switch (where & 0x02) {
  184. case 2:
  185. data = (data << 16);
  186. break;
  187. default:
  188. break;
  189. }
  190. err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, ~(3 << (where & 3)), &data);
  191. return err;
  192. }
  193. static int
  194. write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val)
  195. {
  196. int err;
  197. if (bus == NULL)
  198. return -1;
  199. if (where & 0x03)
  200. return PCIBIOS_BAD_REGISTER_NUMBER;
  201. err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, 0, &val);
  202. return err;
  203. }
  204. static int config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val)
  205. {
  206. switch (size) {
  207. case 1: {
  208. u8 _val;
  209. int rc = read_config_byte(bus, devfn, where, &_val);
  210. *val = _val;
  211. return rc;
  212. }
  213. case 2: {
  214. u16 _val;
  215. int rc = read_config_word(bus, devfn, where, &_val);
  216. *val = _val;
  217. return rc;
  218. }
  219. default:
  220. return read_config_dword(bus, devfn, where, val);
  221. }
  222. }
  223. static int config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
  224. {
  225. switch (size) {
  226. case 1:
  227. return write_config_byte(bus, devfn, where, (u8) val);
  228. case 2:
  229. return write_config_word(bus, devfn, where, (u16) val);
  230. default:
  231. return write_config_dword(bus, devfn, where, val);
  232. }
  233. }
  234. struct pci_ops pnx8550_pci_ops = {
  235. config_read,
  236. config_write
  237. };