mach-cpuimx27.c 8.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323
  1. /*
  2. * Copyright (C) 2009 Eric Benard - eric@eukrea.com
  3. *
  4. * Based on pcm038.c which is :
  5. * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
  6. * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version 2
  11. * of the License, or (at your option) any later version.
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  20. * MA 02110-1301, USA.
  21. */
  22. #include <linux/i2c.h>
  23. #include <linux/io.h>
  24. #include <linux/mtd/plat-ram.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/serial_8250.h>
  28. #include <linux/usb/otg.h>
  29. #include <linux/usb/ulpi.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/mach/arch.h>
  32. #include <asm/mach/time.h>
  33. #include <asm/mach/map.h>
  34. #include <mach/eukrea-baseboards.h>
  35. #include <mach/common.h>
  36. #include <mach/hardware.h>
  37. #include <mach/iomux-mx27.h>
  38. #include <mach/ulpi.h>
  39. #include "devices-imx27.h"
  40. static const int eukrea_cpuimx27_pins[] __initconst = {
  41. /* UART1 */
  42. PE12_PF_UART1_TXD,
  43. PE13_PF_UART1_RXD,
  44. PE14_PF_UART1_CTS,
  45. PE15_PF_UART1_RTS,
  46. /* UART4 */
  47. #if defined(MACH_EUKREA_CPUIMX27_USEUART4)
  48. PB26_AF_UART4_RTS,
  49. PB28_AF_UART4_TXD,
  50. PB29_AF_UART4_CTS,
  51. PB31_AF_UART4_RXD,
  52. #endif
  53. /* FEC */
  54. PD0_AIN_FEC_TXD0,
  55. PD1_AIN_FEC_TXD1,
  56. PD2_AIN_FEC_TXD2,
  57. PD3_AIN_FEC_TXD3,
  58. PD4_AOUT_FEC_RX_ER,
  59. PD5_AOUT_FEC_RXD1,
  60. PD6_AOUT_FEC_RXD2,
  61. PD7_AOUT_FEC_RXD3,
  62. PD8_AF_FEC_MDIO,
  63. PD9_AIN_FEC_MDC,
  64. PD10_AOUT_FEC_CRS,
  65. PD11_AOUT_FEC_TX_CLK,
  66. PD12_AOUT_FEC_RXD0,
  67. PD13_AOUT_FEC_RX_DV,
  68. PD14_AOUT_FEC_RX_CLK,
  69. PD15_AOUT_FEC_COL,
  70. PD16_AIN_FEC_TX_ER,
  71. PF23_AIN_FEC_TX_EN,
  72. /* I2C1 */
  73. PD17_PF_I2C_DATA,
  74. PD18_PF_I2C_CLK,
  75. /* SDHC2 */
  76. #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
  77. PB4_PF_SD2_D0,
  78. PB5_PF_SD2_D1,
  79. PB6_PF_SD2_D2,
  80. PB7_PF_SD2_D3,
  81. PB8_PF_SD2_CMD,
  82. PB9_PF_SD2_CLK,
  83. #endif
  84. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  85. /* Quad UART's IRQ */
  86. GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
  87. GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
  88. GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
  89. GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
  90. #endif
  91. /* OTG */
  92. PC7_PF_USBOTG_DATA5,
  93. PC8_PF_USBOTG_DATA6,
  94. PC9_PF_USBOTG_DATA0,
  95. PC10_PF_USBOTG_DATA2,
  96. PC11_PF_USBOTG_DATA1,
  97. PC12_PF_USBOTG_DATA4,
  98. PC13_PF_USBOTG_DATA3,
  99. PE0_PF_USBOTG_NXT,
  100. PE1_PF_USBOTG_STP,
  101. PE2_PF_USBOTG_DIR,
  102. PE24_PF_USBOTG_CLK,
  103. PE25_PF_USBOTG_DATA7,
  104. /* USBH2 */
  105. PA0_PF_USBH2_CLK,
  106. PA1_PF_USBH2_DIR,
  107. PA2_PF_USBH2_DATA7,
  108. PA3_PF_USBH2_NXT,
  109. PA4_PF_USBH2_STP,
  110. PD19_AF_USBH2_DATA4,
  111. PD20_AF_USBH2_DATA3,
  112. PD21_AF_USBH2_DATA6,
  113. PD22_AF_USBH2_DATA0,
  114. PD23_AF_USBH2_DATA2,
  115. PD24_AF_USBH2_DATA1,
  116. PD26_AF_USBH2_DATA5,
  117. };
  118. static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
  119. .width = 2,
  120. };
  121. static struct resource eukrea_cpuimx27_flash_resource = {
  122. .start = 0xc0000000,
  123. .end = 0xc3ffffff,
  124. .flags = IORESOURCE_MEM,
  125. };
  126. static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
  127. .name = "physmap-flash",
  128. .id = 0,
  129. .dev = {
  130. .platform_data = &eukrea_cpuimx27_flash_data,
  131. },
  132. .num_resources = 1,
  133. .resource = &eukrea_cpuimx27_flash_resource,
  134. };
  135. static const struct imxuart_platform_data uart_pdata __initconst = {
  136. .flags = IMXUART_HAVE_RTSCTS,
  137. };
  138. static const struct mxc_nand_platform_data
  139. cpuimx27_nand_board_info __initconst = {
  140. .width = 1,
  141. .hw_ecc = 1,
  142. };
  143. static struct platform_device *platform_devices[] __initdata = {
  144. &eukrea_cpuimx27_nor_mtd_device,
  145. };
  146. static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
  147. .bitrate = 100000,
  148. };
  149. static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
  150. {
  151. I2C_BOARD_INFO("pcf8563", 0x51),
  152. },
  153. };
  154. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  155. static struct plat_serial8250_port serial_platform_data[] = {
  156. {
  157. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
  158. .irq = IRQ_GPIOB(23),
  159. .uartclk = 14745600,
  160. .regshift = 1,
  161. .iotype = UPIO_MEM,
  162. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  163. }, {
  164. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
  165. .irq = IRQ_GPIOB(22),
  166. .uartclk = 14745600,
  167. .regshift = 1,
  168. .iotype = UPIO_MEM,
  169. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  170. }, {
  171. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
  172. .irq = IRQ_GPIOB(27),
  173. .uartclk = 14745600,
  174. .regshift = 1,
  175. .iotype = UPIO_MEM,
  176. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  177. }, {
  178. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
  179. .irq = IRQ_GPIOB(30),
  180. .uartclk = 14745600,
  181. .regshift = 1,
  182. .iotype = UPIO_MEM,
  183. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  184. }, {
  185. }
  186. };
  187. static struct platform_device serial_device = {
  188. .name = "serial8250",
  189. .id = 0,
  190. .dev = {
  191. .platform_data = serial_platform_data,
  192. },
  193. };
  194. #endif
  195. static int eukrea_cpuimx27_otg_init(struct platform_device *pdev)
  196. {
  197. return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
  198. }
  199. static struct mxc_usbh_platform_data otg_pdata __initdata = {
  200. .init = eukrea_cpuimx27_otg_init,
  201. .portsc = MXC_EHCI_MODE_ULPI,
  202. };
  203. static int eukrea_cpuimx27_usbh2_init(struct platform_device *pdev)
  204. {
  205. return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
  206. }
  207. static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
  208. .init = eukrea_cpuimx27_usbh2_init,
  209. .portsc = MXC_EHCI_MODE_ULPI,
  210. };
  211. static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
  212. .operating_mode = FSL_USB2_DR_DEVICE,
  213. .phy_mode = FSL_USB2_PHY_ULPI,
  214. };
  215. static int otg_mode_host;
  216. static int __init eukrea_cpuimx27_otg_mode(char *options)
  217. {
  218. if (!strcmp(options, "host"))
  219. otg_mode_host = 1;
  220. else if (!strcmp(options, "device"))
  221. otg_mode_host = 0;
  222. else
  223. pr_info("otg_mode neither \"host\" nor \"device\". "
  224. "Defaulting to device\n");
  225. return 0;
  226. }
  227. __setup("otg_mode=", eukrea_cpuimx27_otg_mode);
  228. static void __init eukrea_cpuimx27_init(void)
  229. {
  230. imx27_soc_init();
  231. mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
  232. ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
  233. imx27_add_imx_uart0(&uart_pdata);
  234. imx27_add_mxc_nand(&cpuimx27_nand_board_info);
  235. i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
  236. ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
  237. imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);
  238. imx27_add_fec(NULL);
  239. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  240. imx27_add_imx2_wdt(NULL);
  241. imx27_add_mxc_w1(NULL);
  242. #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
  243. /* SDHC2 can be used for Wifi */
  244. imx27_add_mxc_mmc(1, NULL);
  245. #endif
  246. #if defined(MACH_EUKREA_CPUIMX27_USEUART4)
  247. /* in which case UART4 is also used for Bluetooth */
  248. imx27_add_imx_uart3(&uart_pdata);
  249. #endif
  250. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  251. platform_device_register(&serial_device);
  252. #endif
  253. if (otg_mode_host) {
  254. otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  255. ULPI_OTG_DRVVBUS_EXT);
  256. if (otg_pdata.otg)
  257. imx27_add_mxc_ehci_otg(&otg_pdata);
  258. } else {
  259. imx27_add_fsl_usb2_udc(&otg_device_pdata);
  260. }
  261. usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  262. ULPI_OTG_DRVVBUS_EXT);
  263. if (usbh2_pdata.otg)
  264. imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
  265. #ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
  266. eukrea_mbimx27_baseboard_init();
  267. #endif
  268. }
  269. static void __init eukrea_cpuimx27_timer_init(void)
  270. {
  271. mx27_clocks_init(26000000);
  272. }
  273. static struct sys_timer eukrea_cpuimx27_timer = {
  274. .init = eukrea_cpuimx27_timer_init,
  275. };
  276. MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
  277. .atag_offset = 0x100,
  278. .map_io = mx27_map_io,
  279. .init_early = imx27_init_early,
  280. .init_irq = mx27_init_irq,
  281. .handle_irq = imx27_handle_irq,
  282. .timer = &eukrea_cpuimx27_timer,
  283. .init_machine = eukrea_cpuimx27_init,
  284. .restart = mxc_restart,
  285. MACHINE_END