mach-universal_c210.c 28 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/platform_device.h>
  10. #include <linux/serial_core.h>
  11. #include <linux/input.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio_keys.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/fb.h>
  17. #include <linux/mfd/max8998.h>
  18. #include <linux/regulator/machine.h>
  19. #include <linux/regulator/fixed.h>
  20. #include <linux/regulator/max8952.h>
  21. #include <linux/mmc/host.h>
  22. #include <linux/i2c-gpio.h>
  23. #include <linux/i2c/mcs.h>
  24. #include <linux/i2c/atmel_mxt_ts.h>
  25. #include <asm/mach/arch.h>
  26. #include <asm/hardware/gic.h>
  27. #include <asm/mach-types.h>
  28. #include <plat/regs-serial.h>
  29. #include <plat/clock.h>
  30. #include <plat/cpu.h>
  31. #include <plat/devs.h>
  32. #include <plat/iic.h>
  33. #include <plat/gpio-cfg.h>
  34. #include <plat/fb.h>
  35. #include <plat/mfc.h>
  36. #include <plat/sdhci.h>
  37. #include <plat/pd.h>
  38. #include <plat/regs-fb-v4.h>
  39. #include <plat/fimc-core.h>
  40. #include <plat/s5p-time.h>
  41. #include <plat/camport.h>
  42. #include <plat/mipi_csis.h>
  43. #include <mach/map.h>
  44. #include <media/v4l2-mediabus.h>
  45. #include <media/s5p_fimc.h>
  46. #include <media/m5mols.h>
  47. #include <media/s5k6aa.h>
  48. #include "common.h"
  49. /* Following are default values for UCON, ULCON and UFCON UART registers */
  50. #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  51. S3C2410_UCON_RXILEVEL | \
  52. S3C2410_UCON_TXIRQMODE | \
  53. S3C2410_UCON_RXIRQMODE | \
  54. S3C2410_UCON_RXFIFO_TOI | \
  55. S3C2443_UCON_RXERR_IRQEN)
  56. #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
  57. #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  58. S5PV210_UFCON_TXTRIG256 | \
  59. S5PV210_UFCON_RXTRIG256)
  60. static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
  61. [0] = {
  62. .hwport = 0,
  63. .ucon = UNIVERSAL_UCON_DEFAULT,
  64. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  65. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  66. },
  67. [1] = {
  68. .hwport = 1,
  69. .ucon = UNIVERSAL_UCON_DEFAULT,
  70. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  71. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  72. },
  73. [2] = {
  74. .hwport = 2,
  75. .ucon = UNIVERSAL_UCON_DEFAULT,
  76. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  77. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  78. },
  79. [3] = {
  80. .hwport = 3,
  81. .ucon = UNIVERSAL_UCON_DEFAULT,
  82. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  83. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  84. },
  85. };
  86. static struct regulator_consumer_supply max8952_consumer =
  87. REGULATOR_SUPPLY("vdd_arm", NULL);
  88. static struct max8952_platform_data universal_max8952_pdata __initdata = {
  89. .gpio_vid0 = EXYNOS4_GPX0(3),
  90. .gpio_vid1 = EXYNOS4_GPX0(4),
  91. .gpio_en = -1, /* Not controllable, set "Always High" */
  92. .default_mode = 0, /* vid0 = 0, vid1 = 0 */
  93. .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
  94. .sync_freq = 0, /* default: fastest */
  95. .ramp_speed = 0, /* default: fastest */
  96. .reg_data = {
  97. .constraints = {
  98. .name = "VARM_1.2V",
  99. .min_uV = 770000,
  100. .max_uV = 1400000,
  101. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  102. .always_on = 1,
  103. .boot_on = 1,
  104. },
  105. .num_consumer_supplies = 1,
  106. .consumer_supplies = &max8952_consumer,
  107. },
  108. };
  109. static struct regulator_consumer_supply lp3974_buck1_consumer =
  110. REGULATOR_SUPPLY("vdd_int", NULL);
  111. static struct regulator_consumer_supply lp3974_buck2_consumer =
  112. REGULATOR_SUPPLY("vddg3d", NULL);
  113. static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
  114. REGULATOR_SUPPLY("vdet", "s5p-sdo"),
  115. REGULATOR_SUPPLY("vdd_reg", "0-003c"),
  116. };
  117. static struct regulator_init_data lp3974_buck1_data = {
  118. .constraints = {
  119. .name = "VINT_1.1V",
  120. .min_uV = 750000,
  121. .max_uV = 1500000,
  122. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  123. REGULATOR_CHANGE_STATUS,
  124. .boot_on = 1,
  125. .state_mem = {
  126. .disabled = 1,
  127. },
  128. },
  129. .num_consumer_supplies = 1,
  130. .consumer_supplies = &lp3974_buck1_consumer,
  131. };
  132. static struct regulator_init_data lp3974_buck2_data = {
  133. .constraints = {
  134. .name = "VG3D_1.1V",
  135. .min_uV = 750000,
  136. .max_uV = 1500000,
  137. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  138. REGULATOR_CHANGE_STATUS,
  139. .boot_on = 1,
  140. .state_mem = {
  141. .disabled = 1,
  142. },
  143. },
  144. .num_consumer_supplies = 1,
  145. .consumer_supplies = &lp3974_buck2_consumer,
  146. };
  147. static struct regulator_init_data lp3974_buck3_data = {
  148. .constraints = {
  149. .name = "VCC_1.8V",
  150. .min_uV = 1800000,
  151. .max_uV = 1800000,
  152. .apply_uV = 1,
  153. .always_on = 1,
  154. .state_mem = {
  155. .enabled = 1,
  156. },
  157. },
  158. .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
  159. .consumer_supplies = lp3974_buck3_consumer,
  160. };
  161. static struct regulator_init_data lp3974_buck4_data = {
  162. .constraints = {
  163. .name = "VMEM_1.2V",
  164. .min_uV = 1200000,
  165. .max_uV = 1200000,
  166. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  167. .apply_uV = 1,
  168. .state_mem = {
  169. .disabled = 1,
  170. },
  171. },
  172. };
  173. static struct regulator_init_data lp3974_ldo2_data = {
  174. .constraints = {
  175. .name = "VALIVE_1.2V",
  176. .min_uV = 1200000,
  177. .max_uV = 1200000,
  178. .apply_uV = 1,
  179. .always_on = 1,
  180. .state_mem = {
  181. .enabled = 1,
  182. },
  183. },
  184. };
  185. static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
  186. REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
  187. REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
  188. REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
  189. };
  190. static struct regulator_init_data lp3974_ldo3_data = {
  191. .constraints = {
  192. .name = "VUSB+MIPI_1.1V",
  193. .min_uV = 1100000,
  194. .max_uV = 1100000,
  195. .apply_uV = 1,
  196. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  197. .state_mem = {
  198. .disabled = 1,
  199. },
  200. },
  201. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
  202. .consumer_supplies = lp3974_ldo3_consumer,
  203. };
  204. static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
  205. REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
  206. };
  207. static struct regulator_init_data lp3974_ldo4_data = {
  208. .constraints = {
  209. .name = "VADC_3.3V",
  210. .min_uV = 3300000,
  211. .max_uV = 3300000,
  212. .apply_uV = 1,
  213. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  214. .state_mem = {
  215. .disabled = 1,
  216. },
  217. },
  218. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
  219. .consumer_supplies = lp3974_ldo4_consumer,
  220. };
  221. static struct regulator_init_data lp3974_ldo5_data = {
  222. .constraints = {
  223. .name = "VTF_2.8V",
  224. .min_uV = 2800000,
  225. .max_uV = 2800000,
  226. .apply_uV = 1,
  227. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  228. .state_mem = {
  229. .disabled = 1,
  230. },
  231. },
  232. };
  233. static struct regulator_init_data lp3974_ldo6_data = {
  234. .constraints = {
  235. .name = "LDO6",
  236. .min_uV = 2000000,
  237. .max_uV = 2000000,
  238. .apply_uV = 1,
  239. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  240. .state_mem = {
  241. .disabled = 1,
  242. },
  243. },
  244. };
  245. static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
  246. REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
  247. };
  248. static struct regulator_init_data lp3974_ldo7_data = {
  249. .constraints = {
  250. .name = "VLCD+VMIPI_1.8V",
  251. .min_uV = 1800000,
  252. .max_uV = 1800000,
  253. .apply_uV = 1,
  254. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  255. .state_mem = {
  256. .disabled = 1,
  257. },
  258. },
  259. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
  260. .consumer_supplies = lp3974_ldo7_consumer,
  261. };
  262. static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
  263. REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
  264. };
  265. static struct regulator_init_data lp3974_ldo8_data = {
  266. .constraints = {
  267. .name = "VUSB+VDAC_3.3V",
  268. .min_uV = 3300000,
  269. .max_uV = 3300000,
  270. .apply_uV = 1,
  271. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  272. .state_mem = {
  273. .disabled = 1,
  274. },
  275. },
  276. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
  277. .consumer_supplies = lp3974_ldo8_consumer,
  278. };
  279. static struct regulator_consumer_supply lp3974_ldo9_consumer =
  280. REGULATOR_SUPPLY("vddio", "0-003c");
  281. static struct regulator_init_data lp3974_ldo9_data = {
  282. .constraints = {
  283. .name = "VCC_2.8V",
  284. .min_uV = 2800000,
  285. .max_uV = 2800000,
  286. .apply_uV = 1,
  287. .always_on = 1,
  288. .state_mem = {
  289. .enabled = 1,
  290. },
  291. },
  292. .num_consumer_supplies = 1,
  293. .consumer_supplies = &lp3974_ldo9_consumer,
  294. };
  295. static struct regulator_init_data lp3974_ldo10_data = {
  296. .constraints = {
  297. .name = "VPLL_1.1V",
  298. .min_uV = 1100000,
  299. .max_uV = 1100000,
  300. .boot_on = 1,
  301. .apply_uV = 1,
  302. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  303. .state_mem = {
  304. .disabled = 1,
  305. },
  306. },
  307. };
  308. static struct regulator_consumer_supply lp3974_ldo11_consumer =
  309. REGULATOR_SUPPLY("dig_28", "0-001f");
  310. static struct regulator_init_data lp3974_ldo11_data = {
  311. .constraints = {
  312. .name = "CAM_AF_3.3V",
  313. .min_uV = 3300000,
  314. .max_uV = 3300000,
  315. .apply_uV = 1,
  316. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  317. .state_mem = {
  318. .disabled = 1,
  319. },
  320. },
  321. .num_consumer_supplies = 1,
  322. .consumer_supplies = &lp3974_ldo11_consumer,
  323. };
  324. static struct regulator_init_data lp3974_ldo12_data = {
  325. .constraints = {
  326. .name = "PS_2.8V",
  327. .min_uV = 2800000,
  328. .max_uV = 2800000,
  329. .apply_uV = 1,
  330. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  331. .state_mem = {
  332. .disabled = 1,
  333. },
  334. },
  335. };
  336. static struct regulator_init_data lp3974_ldo13_data = {
  337. .constraints = {
  338. .name = "VHIC_1.2V",
  339. .min_uV = 1200000,
  340. .max_uV = 1200000,
  341. .apply_uV = 1,
  342. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  343. .state_mem = {
  344. .disabled = 1,
  345. },
  346. },
  347. };
  348. static struct regulator_consumer_supply lp3974_ldo14_consumer =
  349. REGULATOR_SUPPLY("dig_18", "0-001f");
  350. static struct regulator_init_data lp3974_ldo14_data = {
  351. .constraints = {
  352. .name = "CAM_I_HOST_1.8V",
  353. .min_uV = 1800000,
  354. .max_uV = 1800000,
  355. .apply_uV = 1,
  356. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  357. .state_mem = {
  358. .disabled = 1,
  359. },
  360. },
  361. .num_consumer_supplies = 1,
  362. .consumer_supplies = &lp3974_ldo14_consumer,
  363. };
  364. static struct regulator_consumer_supply lp3974_ldo15_consumer =
  365. REGULATOR_SUPPLY("dig_12", "0-001f");
  366. static struct regulator_init_data lp3974_ldo15_data = {
  367. .constraints = {
  368. .name = "CAM_S_DIG+FM33_CORE_1.2V",
  369. .min_uV = 1200000,
  370. .max_uV = 1200000,
  371. .apply_uV = 1,
  372. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  373. .state_mem = {
  374. .disabled = 1,
  375. },
  376. },
  377. .num_consumer_supplies = 1,
  378. .consumer_supplies = &lp3974_ldo15_consumer,
  379. };
  380. static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
  381. REGULATOR_SUPPLY("vdda", "0-003c"),
  382. REGULATOR_SUPPLY("a_sensor", "0-001f"),
  383. };
  384. static struct regulator_init_data lp3974_ldo16_data = {
  385. .constraints = {
  386. .name = "CAM_S_ANA_2.8V",
  387. .min_uV = 2800000,
  388. .max_uV = 2800000,
  389. .apply_uV = 1,
  390. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  391. .state_mem = {
  392. .disabled = 1,
  393. },
  394. },
  395. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
  396. .consumer_supplies = lp3974_ldo16_consumer,
  397. };
  398. static struct regulator_init_data lp3974_ldo17_data = {
  399. .constraints = {
  400. .name = "VCC_3.0V_LCD",
  401. .min_uV = 3000000,
  402. .max_uV = 3000000,
  403. .apply_uV = 1,
  404. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  405. .boot_on = 1,
  406. .state_mem = {
  407. .disabled = 1,
  408. },
  409. },
  410. };
  411. static struct regulator_init_data lp3974_32khz_ap_data = {
  412. .constraints = {
  413. .name = "32KHz AP",
  414. .always_on = 1,
  415. .state_mem = {
  416. .enabled = 1,
  417. },
  418. },
  419. };
  420. static struct regulator_init_data lp3974_32khz_cp_data = {
  421. .constraints = {
  422. .name = "32KHz CP",
  423. .state_mem = {
  424. .disabled = 1,
  425. },
  426. },
  427. };
  428. static struct regulator_init_data lp3974_vichg_data = {
  429. .constraints = {
  430. .name = "VICHG",
  431. .state_mem = {
  432. .disabled = 1,
  433. },
  434. },
  435. };
  436. static struct regulator_init_data lp3974_esafeout1_data = {
  437. .constraints = {
  438. .name = "SAFEOUT1",
  439. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  440. .state_mem = {
  441. .enabled = 1,
  442. },
  443. },
  444. };
  445. static struct regulator_init_data lp3974_esafeout2_data = {
  446. .constraints = {
  447. .name = "SAFEOUT2",
  448. .boot_on = 1,
  449. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  450. .state_mem = {
  451. .enabled = 1,
  452. },
  453. },
  454. };
  455. static struct max8998_regulator_data lp3974_regulators[] = {
  456. { MAX8998_LDO2, &lp3974_ldo2_data },
  457. { MAX8998_LDO3, &lp3974_ldo3_data },
  458. { MAX8998_LDO4, &lp3974_ldo4_data },
  459. { MAX8998_LDO5, &lp3974_ldo5_data },
  460. { MAX8998_LDO6, &lp3974_ldo6_data },
  461. { MAX8998_LDO7, &lp3974_ldo7_data },
  462. { MAX8998_LDO8, &lp3974_ldo8_data },
  463. { MAX8998_LDO9, &lp3974_ldo9_data },
  464. { MAX8998_LDO10, &lp3974_ldo10_data },
  465. { MAX8998_LDO11, &lp3974_ldo11_data },
  466. { MAX8998_LDO12, &lp3974_ldo12_data },
  467. { MAX8998_LDO13, &lp3974_ldo13_data },
  468. { MAX8998_LDO14, &lp3974_ldo14_data },
  469. { MAX8998_LDO15, &lp3974_ldo15_data },
  470. { MAX8998_LDO16, &lp3974_ldo16_data },
  471. { MAX8998_LDO17, &lp3974_ldo17_data },
  472. { MAX8998_BUCK1, &lp3974_buck1_data },
  473. { MAX8998_BUCK2, &lp3974_buck2_data },
  474. { MAX8998_BUCK3, &lp3974_buck3_data },
  475. { MAX8998_BUCK4, &lp3974_buck4_data },
  476. { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
  477. { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
  478. { MAX8998_ENVICHG, &lp3974_vichg_data },
  479. { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
  480. { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
  481. };
  482. static struct max8998_platform_data universal_lp3974_pdata = {
  483. .num_regulators = ARRAY_SIZE(lp3974_regulators),
  484. .regulators = lp3974_regulators,
  485. .buck1_voltage1 = 1100000, /* INT */
  486. .buck1_voltage2 = 1000000,
  487. .buck1_voltage3 = 1100000,
  488. .buck1_voltage4 = 1000000,
  489. .buck1_set1 = EXYNOS4_GPX0(5),
  490. .buck1_set2 = EXYNOS4_GPX0(6),
  491. .buck2_voltage1 = 1200000, /* G3D */
  492. .buck2_voltage2 = 1100000,
  493. .buck1_default_idx = 0,
  494. .buck2_set3 = EXYNOS4_GPE2(0),
  495. .buck2_default_idx = 0,
  496. .wakeup = true,
  497. };
  498. enum fixed_regulator_id {
  499. FIXED_REG_ID_MMC0,
  500. FIXED_REG_ID_HDMI_5V,
  501. FIXED_REG_ID_CAM_S_IF,
  502. FIXED_REG_ID_CAM_I_CORE,
  503. FIXED_REG_ID_CAM_VT_DIO,
  504. };
  505. static struct regulator_consumer_supply hdmi_fixed_consumer =
  506. REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
  507. static struct regulator_init_data hdmi_fixed_voltage_init_data = {
  508. .constraints = {
  509. .name = "HDMI_5V",
  510. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  511. },
  512. .num_consumer_supplies = 1,
  513. .consumer_supplies = &hdmi_fixed_consumer,
  514. };
  515. static struct fixed_voltage_config hdmi_fixed_voltage_config = {
  516. .supply_name = "HDMI_EN1",
  517. .microvolts = 5000000,
  518. .gpio = EXYNOS4_GPE0(1),
  519. .enable_high = true,
  520. .init_data = &hdmi_fixed_voltage_init_data,
  521. };
  522. static struct platform_device hdmi_fixed_voltage = {
  523. .name = "reg-fixed-voltage",
  524. .id = FIXED_REG_ID_HDMI_5V,
  525. .dev = {
  526. .platform_data = &hdmi_fixed_voltage_config,
  527. },
  528. };
  529. /* GPIO I2C 5 (PMIC) */
  530. static struct i2c_board_info i2c5_devs[] __initdata = {
  531. {
  532. I2C_BOARD_INFO("max8952", 0xC0 >> 1),
  533. .platform_data = &universal_max8952_pdata,
  534. }, {
  535. I2C_BOARD_INFO("lp3974", 0xCC >> 1),
  536. .platform_data = &universal_lp3974_pdata,
  537. },
  538. };
  539. /* I2C3 (TSP) */
  540. static struct mxt_platform_data qt602240_platform_data = {
  541. .x_line = 19,
  542. .y_line = 11,
  543. .x_size = 800,
  544. .y_size = 480,
  545. .blen = 0x11,
  546. .threshold = 0x28,
  547. .voltage = 2800000, /* 2.8V */
  548. .orient = MXT_DIAGONAL,
  549. .irqflags = IRQF_TRIGGER_FALLING,
  550. };
  551. static struct i2c_board_info i2c3_devs[] __initdata = {
  552. {
  553. I2C_BOARD_INFO("qt602240_ts", 0x4a),
  554. .platform_data = &qt602240_platform_data,
  555. },
  556. };
  557. static void __init universal_tsp_init(void)
  558. {
  559. int gpio;
  560. /* TSP_LDO_ON: XMDMADDR_11 */
  561. gpio = EXYNOS4_GPE2(3);
  562. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
  563. gpio_export(gpio, 0);
  564. /* TSP_INT: XMDMADDR_7 */
  565. gpio = EXYNOS4_GPE1(7);
  566. gpio_request(gpio, "TSP_INT");
  567. s5p_register_gpio_interrupt(gpio);
  568. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  569. s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
  570. i2c3_devs[0].irq = gpio_to_irq(gpio);
  571. }
  572. /* GPIO I2C 12 (3 Touchkey) */
  573. static uint32_t touchkey_keymap[] = {
  574. /* MCS_KEY_MAP(value, keycode) */
  575. MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
  576. MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
  577. };
  578. static struct mcs_platform_data touchkey_data = {
  579. .keymap = touchkey_keymap,
  580. .keymap_size = ARRAY_SIZE(touchkey_keymap),
  581. .key_maxval = 2,
  582. };
  583. /* GPIO I2C 3_TOUCH 2.8V */
  584. #define I2C_GPIO_BUS_12 12
  585. static struct i2c_gpio_platform_data i2c_gpio12_data = {
  586. .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
  587. .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
  588. };
  589. static struct platform_device i2c_gpio12 = {
  590. .name = "i2c-gpio",
  591. .id = I2C_GPIO_BUS_12,
  592. .dev = {
  593. .platform_data = &i2c_gpio12_data,
  594. },
  595. };
  596. static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
  597. {
  598. I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
  599. .platform_data = &touchkey_data,
  600. },
  601. };
  602. static void __init universal_touchkey_init(void)
  603. {
  604. int gpio;
  605. gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
  606. gpio_request(gpio, "3_TOUCH_INT");
  607. s5p_register_gpio_interrupt(gpio);
  608. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  609. i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
  610. gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
  611. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
  612. }
  613. static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
  614. .frequency = 300 * 1000,
  615. .sda_delay = 200,
  616. };
  617. /* GPIO KEYS */
  618. static struct gpio_keys_button universal_gpio_keys_tables[] = {
  619. {
  620. .code = KEY_VOLUMEUP,
  621. .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
  622. .desc = "gpio-keys: KEY_VOLUMEUP",
  623. .type = EV_KEY,
  624. .active_low = 1,
  625. .debounce_interval = 1,
  626. }, {
  627. .code = KEY_VOLUMEDOWN,
  628. .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
  629. .desc = "gpio-keys: KEY_VOLUMEDOWN",
  630. .type = EV_KEY,
  631. .active_low = 1,
  632. .debounce_interval = 1,
  633. }, {
  634. .code = KEY_CONFIG,
  635. .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
  636. .desc = "gpio-keys: KEY_CONFIG",
  637. .type = EV_KEY,
  638. .active_low = 1,
  639. .debounce_interval = 1,
  640. }, {
  641. .code = KEY_CAMERA,
  642. .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
  643. .desc = "gpio-keys: KEY_CAMERA",
  644. .type = EV_KEY,
  645. .active_low = 1,
  646. .debounce_interval = 1,
  647. }, {
  648. .code = KEY_OK,
  649. .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
  650. .desc = "gpio-keys: KEY_OK",
  651. .type = EV_KEY,
  652. .active_low = 1,
  653. .debounce_interval = 1,
  654. },
  655. };
  656. static struct gpio_keys_platform_data universal_gpio_keys_data = {
  657. .buttons = universal_gpio_keys_tables,
  658. .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
  659. };
  660. static struct platform_device universal_gpio_keys = {
  661. .name = "gpio-keys",
  662. .dev = {
  663. .platform_data = &universal_gpio_keys_data,
  664. },
  665. };
  666. /* eMMC */
  667. static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
  668. .max_width = 8,
  669. .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  670. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  671. .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
  672. .cd_type = S3C_SDHCI_CD_PERMANENT,
  673. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  674. };
  675. static struct regulator_consumer_supply mmc0_supplies[] = {
  676. REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
  677. };
  678. static struct regulator_init_data mmc0_fixed_voltage_init_data = {
  679. .constraints = {
  680. .name = "VMEM_VDD_2.8V",
  681. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  682. },
  683. .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
  684. .consumer_supplies = mmc0_supplies,
  685. };
  686. static struct fixed_voltage_config mmc0_fixed_voltage_config = {
  687. .supply_name = "MASSMEMORY_EN",
  688. .microvolts = 2800000,
  689. .gpio = EXYNOS4_GPE1(3),
  690. .enable_high = true,
  691. .init_data = &mmc0_fixed_voltage_init_data,
  692. };
  693. static struct platform_device mmc0_fixed_voltage = {
  694. .name = "reg-fixed-voltage",
  695. .id = FIXED_REG_ID_MMC0,
  696. .dev = {
  697. .platform_data = &mmc0_fixed_voltage_config,
  698. },
  699. };
  700. /* SD */
  701. static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
  702. .max_width = 4,
  703. .host_caps = MMC_CAP_4_BIT_DATA |
  704. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  705. .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
  706. .ext_cd_gpio_invert = 1,
  707. .cd_type = S3C_SDHCI_CD_GPIO,
  708. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  709. };
  710. /* WiFi */
  711. static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
  712. .max_width = 4,
  713. .host_caps = MMC_CAP_4_BIT_DATA |
  714. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  715. .cd_type = S3C_SDHCI_CD_EXTERNAL,
  716. };
  717. static void __init universal_sdhci_init(void)
  718. {
  719. s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
  720. s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
  721. s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
  722. }
  723. /* I2C1 */
  724. static struct i2c_board_info i2c1_devs[] __initdata = {
  725. /* Gyro, To be updated */
  726. };
  727. /* Frame Buffer */
  728. static struct s3c_fb_pd_win universal_fb_win0 = {
  729. .win_mode = {
  730. .left_margin = 16,
  731. .right_margin = 16,
  732. .upper_margin = 2,
  733. .lower_margin = 28,
  734. .hsync_len = 2,
  735. .vsync_len = 1,
  736. .xres = 480,
  737. .yres = 800,
  738. .refresh = 55,
  739. },
  740. .max_bpp = 32,
  741. .default_bpp = 16,
  742. .virtual_x = 480,
  743. .virtual_y = 2 * 800,
  744. };
  745. static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
  746. .win[0] = &universal_fb_win0,
  747. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  748. VIDCON0_CLKSEL_LCD,
  749. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  750. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  751. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  752. };
  753. static struct regulator_consumer_supply cam_vt_dio_supply =
  754. REGULATOR_SUPPLY("vdd_core", "0-003c");
  755. static struct regulator_init_data cam_vt_dio_reg_init_data = {
  756. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  757. .num_consumer_supplies = 1,
  758. .consumer_supplies = &cam_vt_dio_supply,
  759. };
  760. static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
  761. .supply_name = "CAM_VT_D_IO",
  762. .microvolts = 2800000,
  763. .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
  764. .enable_high = 1,
  765. .init_data = &cam_vt_dio_reg_init_data,
  766. };
  767. static struct platform_device cam_vt_dio_fixed_reg_dev = {
  768. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
  769. .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
  770. };
  771. static struct regulator_consumer_supply cam_i_core_supply =
  772. REGULATOR_SUPPLY("core", "0-001f");
  773. static struct regulator_init_data cam_i_core_reg_init_data = {
  774. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  775. .num_consumer_supplies = 1,
  776. .consumer_supplies = &cam_i_core_supply,
  777. };
  778. static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
  779. .supply_name = "CAM_I_CORE_1.2V",
  780. .microvolts = 1200000,
  781. .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
  782. .enable_high = 1,
  783. .init_data = &cam_i_core_reg_init_data,
  784. };
  785. static struct platform_device cam_i_core_fixed_reg_dev = {
  786. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
  787. .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
  788. };
  789. static struct regulator_consumer_supply cam_s_if_supply =
  790. REGULATOR_SUPPLY("d_sensor", "0-001f");
  791. static struct regulator_init_data cam_s_if_reg_init_data = {
  792. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  793. .num_consumer_supplies = 1,
  794. .consumer_supplies = &cam_s_if_supply,
  795. };
  796. static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
  797. .supply_name = "CAM_S_IF_1.8V",
  798. .microvolts = 1800000,
  799. .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
  800. .enable_high = 1,
  801. .init_data = &cam_s_if_reg_init_data,
  802. };
  803. static struct platform_device cam_s_if_fixed_reg_dev = {
  804. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
  805. .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
  806. };
  807. static struct s5p_platform_mipi_csis mipi_csis_platdata = {
  808. .clk_rate = 166000000UL,
  809. .lanes = 2,
  810. .alignment = 32,
  811. .hs_settle = 12,
  812. .phy_enable = s5p_csis_phy_enable,
  813. };
  814. #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
  815. #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
  816. #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
  817. #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
  818. #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
  819. static int s5k6aa_set_power(int on)
  820. {
  821. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  822. return 0;
  823. }
  824. static struct s5k6aa_platform_data s5k6aa_platdata = {
  825. .mclk_frequency = 21600000UL,
  826. .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
  827. .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
  828. .bus_type = V4L2_MBUS_PARALLEL,
  829. .horiz_flip = 1,
  830. .set_power = s5k6aa_set_power,
  831. };
  832. static struct i2c_board_info s5k6aa_board_info = {
  833. I2C_BOARD_INFO("S5K6AA", 0x3C),
  834. .platform_data = &s5k6aa_platdata,
  835. };
  836. static int m5mols_set_power(struct device *dev, int on)
  837. {
  838. gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
  839. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  840. return 0;
  841. }
  842. static struct m5mols_platform_data m5mols_platdata = {
  843. .gpio_reset = GPIO_CAM_MEGA_nRST,
  844. .reset_polarity = 0,
  845. .set_power = m5mols_set_power,
  846. };
  847. static struct i2c_board_info m5mols_board_info = {
  848. I2C_BOARD_INFO("M5MOLS", 0x1F),
  849. .platform_data = &m5mols_platdata,
  850. };
  851. static struct s5p_fimc_isp_info universal_camera_sensors[] = {
  852. {
  853. .mux_id = 0,
  854. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  855. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  856. .bus_type = FIMC_ITU_601,
  857. .board_info = &s5k6aa_board_info,
  858. .i2c_bus_num = 0,
  859. .clk_frequency = 24000000UL,
  860. }, {
  861. .mux_id = 0,
  862. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  863. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  864. .bus_type = FIMC_MIPI_CSI2,
  865. .board_info = &m5mols_board_info,
  866. .i2c_bus_num = 0,
  867. .clk_frequency = 24000000UL,
  868. .csi_data_align = 32,
  869. },
  870. };
  871. static struct s5p_platform_fimc fimc_md_platdata = {
  872. .isp_info = universal_camera_sensors,
  873. .num_clients = ARRAY_SIZE(universal_camera_sensors),
  874. };
  875. static struct gpio universal_camera_gpios[] = {
  876. { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
  877. { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
  878. { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
  879. { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
  880. { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
  881. { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
  882. };
  883. static void __init universal_camera_init(void)
  884. {
  885. s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
  886. &s5p_device_mipi_csis0);
  887. s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
  888. &s5p_device_fimc_md);
  889. if (gpio_request_array(universal_camera_gpios,
  890. ARRAY_SIZE(universal_camera_gpios))) {
  891. pr_err("%s: GPIO request failed\n", __func__);
  892. return;
  893. }
  894. if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
  895. m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
  896. else
  897. pr_err("Failed to configure 8M_ISP_INT GPIO\n");
  898. /* Free GPIOs controlled directly by the sensor drivers. */
  899. gpio_free(GPIO_CAM_MEGA_nRST);
  900. gpio_free(GPIO_CAM_8M_ISP_INT);
  901. gpio_free(GPIO_CAM_VGA_NRST);
  902. gpio_free(GPIO_CAM_VGA_NSTBY);
  903. if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
  904. pr_err("Camera port A setup failed\n");
  905. }
  906. static struct platform_device *universal_devices[] __initdata = {
  907. /* Samsung Platform Devices */
  908. &s5p_device_mipi_csis0,
  909. &s5p_device_fimc0,
  910. &s5p_device_fimc1,
  911. &s5p_device_fimc2,
  912. &s5p_device_fimc3,
  913. &s5p_device_g2d,
  914. &mmc0_fixed_voltage,
  915. &s3c_device_hsmmc0,
  916. &s3c_device_hsmmc2,
  917. &s3c_device_hsmmc3,
  918. &s3c_device_i2c0,
  919. &s3c_device_i2c3,
  920. &s3c_device_i2c5,
  921. &s5p_device_i2c_hdmiphy,
  922. &hdmi_fixed_voltage,
  923. &s5p_device_hdmi,
  924. &s5p_device_sdo,
  925. &s5p_device_mixer,
  926. /* Universal Devices */
  927. &i2c_gpio12,
  928. &universal_gpio_keys,
  929. &s5p_device_onenand,
  930. &s5p_device_fimd0,
  931. &s5p_device_jpeg,
  932. &s5p_device_mfc,
  933. &s5p_device_mfc_l,
  934. &s5p_device_mfc_r,
  935. &cam_vt_dio_fixed_reg_dev,
  936. &cam_i_core_fixed_reg_dev,
  937. &cam_s_if_fixed_reg_dev,
  938. &s5p_device_fimc_md,
  939. };
  940. static void __init universal_map_io(void)
  941. {
  942. clk_xusbxti.rate = 24000000;
  943. exynos_init_io(NULL, 0);
  944. s3c24xx_init_clocks(24000000);
  945. s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
  946. s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
  947. }
  948. static void s5p_tv_setup(void)
  949. {
  950. /* direct HPD to HDMI chip */
  951. gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
  952. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  953. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  954. }
  955. static void __init universal_reserve(void)
  956. {
  957. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  958. }
  959. static void __init universal_machine_init(void)
  960. {
  961. universal_sdhci_init();
  962. s5p_tv_setup();
  963. s3c_i2c0_set_platdata(&universal_i2c0_platdata);
  964. i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
  965. universal_tsp_init();
  966. s3c_i2c3_set_platdata(NULL);
  967. i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
  968. s3c_i2c5_set_platdata(NULL);
  969. s5p_i2c_hdmiphy_set_platdata(NULL);
  970. i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
  971. s5p_fimd0_set_platdata(&universal_lcd_pdata);
  972. universal_touchkey_init();
  973. i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
  974. ARRAY_SIZE(i2c_gpio12_devs));
  975. universal_camera_init();
  976. /* Last */
  977. platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
  978. }
  979. MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
  980. /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
  981. .atag_offset = 0x100,
  982. .init_irq = exynos4_init_irq,
  983. .map_io = universal_map_io,
  984. .handle_irq = gic_handle_irq,
  985. .init_machine = universal_machine_init,
  986. .timer = &s5p_timer,
  987. .reserve = &universal_reserve,
  988. .restart = exynos4_restart,
  989. MACHINE_END