timbuart.c 13 KB

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  1. /*
  2. * timbuart.c timberdale FPGA UART driver
  3. * Copyright (c) 2009 Intel Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* Supports:
  19. * Timberdale FPGA UART
  20. */
  21. #include <linux/pci.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/serial_core.h>
  24. #include <linux/tty.h>
  25. #include <linux/tty_flip.h>
  26. #include <linux/kernel.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/ioport.h>
  29. #include <linux/slab.h>
  30. #include <linux/module.h>
  31. #include "timbuart.h"
  32. struct timbuart_port {
  33. struct uart_port port;
  34. struct tasklet_struct tasklet;
  35. int usedma;
  36. u32 last_ier;
  37. struct platform_device *dev;
  38. };
  39. static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
  40. 921600, 1843200, 3250000};
  41. static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);
  42. static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
  43. static void timbuart_stop_rx(struct uart_port *port)
  44. {
  45. /* spin lock held by upper layer, disable all RX interrupts */
  46. u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
  47. iowrite32(ier, port->membase + TIMBUART_IER);
  48. }
  49. static void timbuart_stop_tx(struct uart_port *port)
  50. {
  51. /* spinlock held by upper layer, disable TX interrupt */
  52. u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
  53. iowrite32(ier, port->membase + TIMBUART_IER);
  54. }
  55. static void timbuart_start_tx(struct uart_port *port)
  56. {
  57. struct timbuart_port *uart =
  58. container_of(port, struct timbuart_port, port);
  59. /* do not transfer anything here -> fire off the tasklet */
  60. tasklet_schedule(&uart->tasklet);
  61. }
  62. static unsigned int timbuart_tx_empty(struct uart_port *port)
  63. {
  64. u32 isr = ioread32(port->membase + TIMBUART_ISR);
  65. return (isr & TXBE) ? TIOCSER_TEMT : 0;
  66. }
  67. static void timbuart_flush_buffer(struct uart_port *port)
  68. {
  69. if (!timbuart_tx_empty(port)) {
  70. u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
  71. TIMBUART_CTRL_FLSHTX;
  72. iowrite8(ctl, port->membase + TIMBUART_CTRL);
  73. iowrite32(TXBF, port->membase + TIMBUART_ISR);
  74. }
  75. }
  76. static void timbuart_rx_chars(struct uart_port *port)
  77. {
  78. struct tty_struct *tty = port->state->port.tty;
  79. while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
  80. u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
  81. port->icount.rx++;
  82. tty_insert_flip_char(tty, ch, TTY_NORMAL);
  83. }
  84. spin_unlock(&port->lock);
  85. tty_flip_buffer_push(port->state->port.tty);
  86. spin_lock(&port->lock);
  87. dev_dbg(port->dev, "%s - total read %d bytes\n",
  88. __func__, port->icount.rx);
  89. }
  90. static void timbuart_tx_chars(struct uart_port *port)
  91. {
  92. struct circ_buf *xmit = &port->state->xmit;
  93. while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
  94. !uart_circ_empty(xmit)) {
  95. iowrite8(xmit->buf[xmit->tail],
  96. port->membase + TIMBUART_TXFIFO);
  97. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  98. port->icount.tx++;
  99. }
  100. dev_dbg(port->dev,
  101. "%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
  102. __func__,
  103. port->icount.tx,
  104. ioread8(port->membase + TIMBUART_CTRL),
  105. port->mctrl & TIOCM_RTS,
  106. ioread8(port->membase + TIMBUART_BAUDRATE));
  107. }
  108. static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
  109. {
  110. struct timbuart_port *uart =
  111. container_of(port, struct timbuart_port, port);
  112. struct circ_buf *xmit = &port->state->xmit;
  113. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  114. return;
  115. if (port->x_char)
  116. return;
  117. if (isr & TXFLAGS) {
  118. timbuart_tx_chars(port);
  119. /* clear all TX interrupts */
  120. iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
  121. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  122. uart_write_wakeup(port);
  123. } else
  124. /* Re-enable any tx interrupt */
  125. *ier |= uart->last_ier & TXFLAGS;
  126. /* enable interrupts if there are chars in the transmit buffer,
  127. * Or if we delivered some bytes and want the almost empty interrupt
  128. * we wake up the upper layer later when we got the interrupt
  129. * to give it some time to go out...
  130. */
  131. if (!uart_circ_empty(xmit))
  132. *ier |= TXBAE;
  133. dev_dbg(port->dev, "%s - leaving\n", __func__);
  134. }
  135. void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
  136. {
  137. if (isr & RXFLAGS) {
  138. /* Some RX status is set */
  139. if (isr & RXBF) {
  140. u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
  141. TIMBUART_CTRL_FLSHRX;
  142. iowrite8(ctl, port->membase + TIMBUART_CTRL);
  143. port->icount.overrun++;
  144. } else if (isr & (RXDP))
  145. timbuart_rx_chars(port);
  146. /* ack all RX interrupts */
  147. iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
  148. }
  149. /* always have the RX interrupts enabled */
  150. *ier |= RXBAF | RXBF | RXTT;
  151. dev_dbg(port->dev, "%s - leaving\n", __func__);
  152. }
  153. void timbuart_tasklet(unsigned long arg)
  154. {
  155. struct timbuart_port *uart = (struct timbuart_port *)arg;
  156. u32 isr, ier = 0;
  157. spin_lock(&uart->port.lock);
  158. isr = ioread32(uart->port.membase + TIMBUART_ISR);
  159. dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
  160. if (!uart->usedma)
  161. timbuart_handle_tx_port(&uart->port, isr, &ier);
  162. timbuart_mctrl_check(&uart->port, isr, &ier);
  163. if (!uart->usedma)
  164. timbuart_handle_rx_port(&uart->port, isr, &ier);
  165. iowrite32(ier, uart->port.membase + TIMBUART_IER);
  166. spin_unlock(&uart->port.lock);
  167. dev_dbg(uart->port.dev, "%s leaving\n", __func__);
  168. }
  169. static unsigned int timbuart_get_mctrl(struct uart_port *port)
  170. {
  171. u8 cts = ioread8(port->membase + TIMBUART_CTRL);
  172. dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);
  173. if (cts & TIMBUART_CTRL_CTS)
  174. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  175. else
  176. return TIOCM_DSR | TIOCM_CAR;
  177. }
  178. static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  179. {
  180. dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);
  181. if (mctrl & TIOCM_RTS)
  182. iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
  183. else
  184. iowrite8(0, port->membase + TIMBUART_CTRL);
  185. }
  186. static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
  187. {
  188. unsigned int cts;
  189. if (isr & CTS_DELTA) {
  190. /* ack */
  191. iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
  192. cts = timbuart_get_mctrl(port);
  193. uart_handle_cts_change(port, cts & TIOCM_CTS);
  194. wake_up_interruptible(&port->state->port.delta_msr_wait);
  195. }
  196. *ier |= CTS_DELTA;
  197. }
  198. static void timbuart_enable_ms(struct uart_port *port)
  199. {
  200. /* N/A */
  201. }
  202. static void timbuart_break_ctl(struct uart_port *port, int ctl)
  203. {
  204. /* N/A */
  205. }
  206. static int timbuart_startup(struct uart_port *port)
  207. {
  208. struct timbuart_port *uart =
  209. container_of(port, struct timbuart_port, port);
  210. dev_dbg(port->dev, "%s\n", __func__);
  211. iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
  212. iowrite32(0x1ff, port->membase + TIMBUART_ISR);
  213. /* Enable all but TX interrupts */
  214. iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
  215. port->membase + TIMBUART_IER);
  216. return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
  217. "timb-uart", uart);
  218. }
  219. static void timbuart_shutdown(struct uart_port *port)
  220. {
  221. struct timbuart_port *uart =
  222. container_of(port, struct timbuart_port, port);
  223. dev_dbg(port->dev, "%s\n", __func__);
  224. free_irq(port->irq, uart);
  225. iowrite32(0, port->membase + TIMBUART_IER);
  226. }
  227. static int get_bindex(int baud)
  228. {
  229. int i;
  230. for (i = 0; i < ARRAY_SIZE(baudrates); i++)
  231. if (baud <= baudrates[i])
  232. return i;
  233. return -1;
  234. }
  235. static void timbuart_set_termios(struct uart_port *port,
  236. struct ktermios *termios,
  237. struct ktermios *old)
  238. {
  239. unsigned int baud;
  240. short bindex;
  241. unsigned long flags;
  242. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
  243. bindex = get_bindex(baud);
  244. dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);
  245. if (bindex < 0)
  246. bindex = 0;
  247. baud = baudrates[bindex];
  248. /* The serial layer calls into this once with old = NULL when setting
  249. up initially */
  250. if (old)
  251. tty_termios_copy_hw(termios, old);
  252. tty_termios_encode_baud_rate(termios, baud, baud);
  253. spin_lock_irqsave(&port->lock, flags);
  254. iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
  255. uart_update_timeout(port, termios->c_cflag, baud);
  256. spin_unlock_irqrestore(&port->lock, flags);
  257. }
  258. static const char *timbuart_type(struct uart_port *port)
  259. {
  260. return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
  261. }
  262. /* We do not request/release mappings of the registers here,
  263. * currently it's done in the proble function.
  264. */
  265. static void timbuart_release_port(struct uart_port *port)
  266. {
  267. struct platform_device *pdev = to_platform_device(port->dev);
  268. int size =
  269. resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
  270. if (port->flags & UPF_IOREMAP) {
  271. iounmap(port->membase);
  272. port->membase = NULL;
  273. }
  274. release_mem_region(port->mapbase, size);
  275. }
  276. static int timbuart_request_port(struct uart_port *port)
  277. {
  278. struct platform_device *pdev = to_platform_device(port->dev);
  279. int size =
  280. resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
  281. if (!request_mem_region(port->mapbase, size, "timb-uart"))
  282. return -EBUSY;
  283. if (port->flags & UPF_IOREMAP) {
  284. port->membase = ioremap(port->mapbase, size);
  285. if (port->membase == NULL) {
  286. release_mem_region(port->mapbase, size);
  287. return -ENOMEM;
  288. }
  289. }
  290. return 0;
  291. }
  292. static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
  293. {
  294. struct timbuart_port *uart = (struct timbuart_port *)devid;
  295. if (ioread8(uart->port.membase + TIMBUART_IPR)) {
  296. uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
  297. /* disable interrupts, the tasklet enables them again */
  298. iowrite32(0, uart->port.membase + TIMBUART_IER);
  299. /* fire off bottom half */
  300. tasklet_schedule(&uart->tasklet);
  301. return IRQ_HANDLED;
  302. } else
  303. return IRQ_NONE;
  304. }
  305. /*
  306. * Configure/autoconfigure the port.
  307. */
  308. static void timbuart_config_port(struct uart_port *port, int flags)
  309. {
  310. if (flags & UART_CONFIG_TYPE) {
  311. port->type = PORT_TIMBUART;
  312. timbuart_request_port(port);
  313. }
  314. }
  315. static int timbuart_verify_port(struct uart_port *port,
  316. struct serial_struct *ser)
  317. {
  318. /* we don't want the core code to modify any port params */
  319. return -EINVAL;
  320. }
  321. static struct uart_ops timbuart_ops = {
  322. .tx_empty = timbuart_tx_empty,
  323. .set_mctrl = timbuart_set_mctrl,
  324. .get_mctrl = timbuart_get_mctrl,
  325. .stop_tx = timbuart_stop_tx,
  326. .start_tx = timbuart_start_tx,
  327. .flush_buffer = timbuart_flush_buffer,
  328. .stop_rx = timbuart_stop_rx,
  329. .enable_ms = timbuart_enable_ms,
  330. .break_ctl = timbuart_break_ctl,
  331. .startup = timbuart_startup,
  332. .shutdown = timbuart_shutdown,
  333. .set_termios = timbuart_set_termios,
  334. .type = timbuart_type,
  335. .release_port = timbuart_release_port,
  336. .request_port = timbuart_request_port,
  337. .config_port = timbuart_config_port,
  338. .verify_port = timbuart_verify_port
  339. };
  340. static struct uart_driver timbuart_driver = {
  341. .owner = THIS_MODULE,
  342. .driver_name = "timberdale_uart",
  343. .dev_name = "ttyTU",
  344. .major = TIMBUART_MAJOR,
  345. .minor = TIMBUART_MINOR,
  346. .nr = 1
  347. };
  348. static int __devinit timbuart_probe(struct platform_device *dev)
  349. {
  350. int err, irq;
  351. struct timbuart_port *uart;
  352. struct resource *iomem;
  353. dev_dbg(&dev->dev, "%s\n", __func__);
  354. uart = kzalloc(sizeof(*uart), GFP_KERNEL);
  355. if (!uart) {
  356. err = -EINVAL;
  357. goto err_mem;
  358. }
  359. uart->usedma = 0;
  360. uart->port.uartclk = 3250000 * 16;
  361. uart->port.fifosize = TIMBUART_FIFO_SIZE;
  362. uart->port.regshift = 2;
  363. uart->port.iotype = UPIO_MEM;
  364. uart->port.ops = &timbuart_ops;
  365. uart->port.irq = 0;
  366. uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
  367. uart->port.line = 0;
  368. uart->port.dev = &dev->dev;
  369. iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
  370. if (!iomem) {
  371. err = -ENOMEM;
  372. goto err_register;
  373. }
  374. uart->port.mapbase = iomem->start;
  375. uart->port.membase = NULL;
  376. irq = platform_get_irq(dev, 0);
  377. if (irq < 0) {
  378. err = -EINVAL;
  379. goto err_register;
  380. }
  381. uart->port.irq = irq;
  382. tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);
  383. err = uart_register_driver(&timbuart_driver);
  384. if (err)
  385. goto err_register;
  386. err = uart_add_one_port(&timbuart_driver, &uart->port);
  387. if (err)
  388. goto err_add_port;
  389. platform_set_drvdata(dev, uart);
  390. return 0;
  391. err_add_port:
  392. uart_unregister_driver(&timbuart_driver);
  393. err_register:
  394. kfree(uart);
  395. err_mem:
  396. printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
  397. err);
  398. return err;
  399. }
  400. static int __devexit timbuart_remove(struct platform_device *dev)
  401. {
  402. struct timbuart_port *uart = platform_get_drvdata(dev);
  403. tasklet_kill(&uart->tasklet);
  404. uart_remove_one_port(&timbuart_driver, &uart->port);
  405. uart_unregister_driver(&timbuart_driver);
  406. kfree(uart);
  407. return 0;
  408. }
  409. static struct platform_driver timbuart_platform_driver = {
  410. .driver = {
  411. .name = "timb-uart",
  412. .owner = THIS_MODULE,
  413. },
  414. .probe = timbuart_probe,
  415. .remove = __devexit_p(timbuart_remove),
  416. };
  417. module_platform_driver(timbuart_platform_driver);
  418. MODULE_DESCRIPTION("Timberdale UART driver");
  419. MODULE_LICENSE("GPL v2");
  420. MODULE_ALIAS("platform:timb-uart");