max3100.c 21 KB

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  1. /*
  2. *
  3. * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. *
  11. * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
  12. * to use polling for flow control. TX empty IRQ is unusable, since
  13. * writing conf clears FIFO buffer and we cannot have this interrupt
  14. * always asking us for attention.
  15. *
  16. * Example platform data:
  17. static struct plat_max3100 max3100_plat_data = {
  18. .loopback = 0,
  19. .crystal = 0,
  20. .poll_time = 100,
  21. };
  22. static struct spi_board_info spi_board_info[] = {
  23. {
  24. .modalias = "max3100",
  25. .platform_data = &max3100_plat_data,
  26. .irq = IRQ_EINT12,
  27. .max_speed_hz = 5*1000*1000,
  28. .chip_select = 0,
  29. },
  30. };
  31. * The initial minor number is 209 in the low-density serial port:
  32. * mknod /dev/ttyMAX0 c 204 209
  33. */
  34. #define MAX3100_MAJOR 204
  35. #define MAX3100_MINOR 209
  36. /* 4 MAX3100s should be enough for everyone */
  37. #define MAX_MAX3100 4
  38. #include <linux/delay.h>
  39. #include <linux/slab.h>
  40. #include <linux/device.h>
  41. #include <linux/module.h>
  42. #include <linux/serial_core.h>
  43. #include <linux/serial.h>
  44. #include <linux/spi/spi.h>
  45. #include <linux/freezer.h>
  46. #include <linux/tty.h>
  47. #include <linux/tty_flip.h>
  48. #include <linux/serial_max3100.h>
  49. #define MAX3100_C (1<<14)
  50. #define MAX3100_D (0<<14)
  51. #define MAX3100_W (1<<15)
  52. #define MAX3100_RX (0<<15)
  53. #define MAX3100_WC (MAX3100_W | MAX3100_C)
  54. #define MAX3100_RC (MAX3100_RX | MAX3100_C)
  55. #define MAX3100_WD (MAX3100_W | MAX3100_D)
  56. #define MAX3100_RD (MAX3100_RX | MAX3100_D)
  57. #define MAX3100_CMD (3 << 14)
  58. #define MAX3100_T (1<<14)
  59. #define MAX3100_R (1<<15)
  60. #define MAX3100_FEN (1<<13)
  61. #define MAX3100_SHDN (1<<12)
  62. #define MAX3100_TM (1<<11)
  63. #define MAX3100_RM (1<<10)
  64. #define MAX3100_PM (1<<9)
  65. #define MAX3100_RAM (1<<8)
  66. #define MAX3100_IR (1<<7)
  67. #define MAX3100_ST (1<<6)
  68. #define MAX3100_PE (1<<5)
  69. #define MAX3100_L (1<<4)
  70. #define MAX3100_BAUD (0xf)
  71. #define MAX3100_TE (1<<10)
  72. #define MAX3100_RAFE (1<<10)
  73. #define MAX3100_RTS (1<<9)
  74. #define MAX3100_CTS (1<<9)
  75. #define MAX3100_PT (1<<8)
  76. #define MAX3100_DATA (0xff)
  77. #define MAX3100_RT (MAX3100_R | MAX3100_T)
  78. #define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
  79. /* the following simulate a status reg for ignore_status_mask */
  80. #define MAX3100_STATUS_PE 1
  81. #define MAX3100_STATUS_FE 2
  82. #define MAX3100_STATUS_OE 4
  83. struct max3100_port {
  84. struct uart_port port;
  85. struct spi_device *spi;
  86. int cts; /* last CTS received for flow ctrl */
  87. int tx_empty; /* last TX empty bit */
  88. spinlock_t conf_lock; /* shared data */
  89. int conf_commit; /* need to make changes */
  90. int conf; /* configuration for the MAX31000
  91. * (bits 0-7, bits 8-11 are irqs) */
  92. int rts_commit; /* need to change rts */
  93. int rts; /* rts status */
  94. int baud; /* current baud rate */
  95. int parity; /* keeps track if we should send parity */
  96. #define MAX3100_PARITY_ON 1
  97. #define MAX3100_PARITY_ODD 2
  98. #define MAX3100_7BIT 4
  99. int rx_enabled; /* if we should rx chars */
  100. int irq; /* irq assigned to the max3100 */
  101. int minor; /* minor number */
  102. int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */
  103. int loopback; /* 1 if we are in loopback mode */
  104. /* for handling irqs: need workqueue since we do spi_sync */
  105. struct workqueue_struct *workqueue;
  106. struct work_struct work;
  107. /* set to 1 to make the workhandler exit as soon as possible */
  108. int force_end_work;
  109. /* need to know we are suspending to avoid deadlock on workqueue */
  110. int suspending;
  111. /* hook for suspending MAX3100 via dedicated pin */
  112. void (*max3100_hw_suspend) (int suspend);
  113. /* poll time (in ms) for ctrl lines */
  114. int poll_time;
  115. /* and its timer */
  116. struct timer_list timer;
  117. };
  118. static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
  119. static DEFINE_MUTEX(max3100s_lock); /* race on probe */
  120. static int max3100_do_parity(struct max3100_port *s, u16 c)
  121. {
  122. int parity;
  123. if (s->parity & MAX3100_PARITY_ODD)
  124. parity = 1;
  125. else
  126. parity = 0;
  127. if (s->parity & MAX3100_7BIT)
  128. c &= 0x7f;
  129. else
  130. c &= 0xff;
  131. parity = parity ^ (hweight8(c) & 1);
  132. return parity;
  133. }
  134. static int max3100_check_parity(struct max3100_port *s, u16 c)
  135. {
  136. return max3100_do_parity(s, c) == ((c >> 8) & 1);
  137. }
  138. static void max3100_calc_parity(struct max3100_port *s, u16 *c)
  139. {
  140. if (s->parity & MAX3100_7BIT)
  141. *c &= 0x7f;
  142. else
  143. *c &= 0xff;
  144. if (s->parity & MAX3100_PARITY_ON)
  145. *c |= max3100_do_parity(s, *c) << 8;
  146. }
  147. static void max3100_work(struct work_struct *w);
  148. static void max3100_dowork(struct max3100_port *s)
  149. {
  150. if (!s->force_end_work && !work_pending(&s->work) &&
  151. !freezing(current) && !s->suspending)
  152. queue_work(s->workqueue, &s->work);
  153. }
  154. static void max3100_timeout(unsigned long data)
  155. {
  156. struct max3100_port *s = (struct max3100_port *)data;
  157. if (s->port.state) {
  158. max3100_dowork(s);
  159. mod_timer(&s->timer, jiffies + s->poll_time);
  160. }
  161. }
  162. static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
  163. {
  164. struct spi_message message;
  165. u16 etx, erx;
  166. int status;
  167. struct spi_transfer tran = {
  168. .tx_buf = &etx,
  169. .rx_buf = &erx,
  170. .len = 2,
  171. };
  172. etx = cpu_to_be16(tx);
  173. spi_message_init(&message);
  174. spi_message_add_tail(&tran, &message);
  175. status = spi_sync(s->spi, &message);
  176. if (status) {
  177. dev_warn(&s->spi->dev, "error while calling spi_sync\n");
  178. return -EIO;
  179. }
  180. *rx = be16_to_cpu(erx);
  181. s->tx_empty = (*rx & MAX3100_T) > 0;
  182. dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
  183. return 0;
  184. }
  185. static int max3100_handlerx(struct max3100_port *s, u16 rx)
  186. {
  187. unsigned int ch, flg, status = 0;
  188. int ret = 0, cts;
  189. if (rx & MAX3100_R && s->rx_enabled) {
  190. dev_dbg(&s->spi->dev, "%s\n", __func__);
  191. ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
  192. if (rx & MAX3100_RAFE) {
  193. s->port.icount.frame++;
  194. flg = TTY_FRAME;
  195. status |= MAX3100_STATUS_FE;
  196. } else {
  197. if (s->parity & MAX3100_PARITY_ON) {
  198. if (max3100_check_parity(s, rx)) {
  199. s->port.icount.rx++;
  200. flg = TTY_NORMAL;
  201. } else {
  202. s->port.icount.parity++;
  203. flg = TTY_PARITY;
  204. status |= MAX3100_STATUS_PE;
  205. }
  206. } else {
  207. s->port.icount.rx++;
  208. flg = TTY_NORMAL;
  209. }
  210. }
  211. uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
  212. ret = 1;
  213. }
  214. cts = (rx & MAX3100_CTS) > 0;
  215. if (s->cts != cts) {
  216. s->cts = cts;
  217. uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
  218. }
  219. return ret;
  220. }
  221. static void max3100_work(struct work_struct *w)
  222. {
  223. struct max3100_port *s = container_of(w, struct max3100_port, work);
  224. int rxchars;
  225. u16 tx, rx;
  226. int conf, cconf, rts, crts;
  227. struct circ_buf *xmit = &s->port.state->xmit;
  228. dev_dbg(&s->spi->dev, "%s\n", __func__);
  229. rxchars = 0;
  230. do {
  231. spin_lock(&s->conf_lock);
  232. conf = s->conf;
  233. cconf = s->conf_commit;
  234. s->conf_commit = 0;
  235. rts = s->rts;
  236. crts = s->rts_commit;
  237. s->rts_commit = 0;
  238. spin_unlock(&s->conf_lock);
  239. if (cconf)
  240. max3100_sr(s, MAX3100_WC | conf, &rx);
  241. if (crts) {
  242. max3100_sr(s, MAX3100_WD | MAX3100_TE |
  243. (s->rts ? MAX3100_RTS : 0), &rx);
  244. rxchars += max3100_handlerx(s, rx);
  245. }
  246. max3100_sr(s, MAX3100_RD, &rx);
  247. rxchars += max3100_handlerx(s, rx);
  248. if (rx & MAX3100_T) {
  249. tx = 0xffff;
  250. if (s->port.x_char) {
  251. tx = s->port.x_char;
  252. s->port.icount.tx++;
  253. s->port.x_char = 0;
  254. } else if (!uart_circ_empty(xmit) &&
  255. !uart_tx_stopped(&s->port)) {
  256. tx = xmit->buf[xmit->tail];
  257. xmit->tail = (xmit->tail + 1) &
  258. (UART_XMIT_SIZE - 1);
  259. s->port.icount.tx++;
  260. }
  261. if (tx != 0xffff) {
  262. max3100_calc_parity(s, &tx);
  263. tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
  264. max3100_sr(s, tx, &rx);
  265. rxchars += max3100_handlerx(s, rx);
  266. }
  267. }
  268. if (rxchars > 16 && s->port.state->port.tty != NULL) {
  269. tty_flip_buffer_push(s->port.state->port.tty);
  270. rxchars = 0;
  271. }
  272. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  273. uart_write_wakeup(&s->port);
  274. } while (!s->force_end_work &&
  275. !freezing(current) &&
  276. ((rx & MAX3100_R) ||
  277. (!uart_circ_empty(xmit) &&
  278. !uart_tx_stopped(&s->port))));
  279. if (rxchars > 0 && s->port.state->port.tty != NULL)
  280. tty_flip_buffer_push(s->port.state->port.tty);
  281. }
  282. static irqreturn_t max3100_irq(int irqno, void *dev_id)
  283. {
  284. struct max3100_port *s = dev_id;
  285. dev_dbg(&s->spi->dev, "%s\n", __func__);
  286. max3100_dowork(s);
  287. return IRQ_HANDLED;
  288. }
  289. static void max3100_enable_ms(struct uart_port *port)
  290. {
  291. struct max3100_port *s = container_of(port,
  292. struct max3100_port,
  293. port);
  294. if (s->poll_time > 0)
  295. mod_timer(&s->timer, jiffies);
  296. dev_dbg(&s->spi->dev, "%s\n", __func__);
  297. }
  298. static void max3100_start_tx(struct uart_port *port)
  299. {
  300. struct max3100_port *s = container_of(port,
  301. struct max3100_port,
  302. port);
  303. dev_dbg(&s->spi->dev, "%s\n", __func__);
  304. max3100_dowork(s);
  305. }
  306. static void max3100_stop_rx(struct uart_port *port)
  307. {
  308. struct max3100_port *s = container_of(port,
  309. struct max3100_port,
  310. port);
  311. dev_dbg(&s->spi->dev, "%s\n", __func__);
  312. s->rx_enabled = 0;
  313. spin_lock(&s->conf_lock);
  314. s->conf &= ~MAX3100_RM;
  315. s->conf_commit = 1;
  316. spin_unlock(&s->conf_lock);
  317. max3100_dowork(s);
  318. }
  319. static unsigned int max3100_tx_empty(struct uart_port *port)
  320. {
  321. struct max3100_port *s = container_of(port,
  322. struct max3100_port,
  323. port);
  324. dev_dbg(&s->spi->dev, "%s\n", __func__);
  325. /* may not be truly up-to-date */
  326. max3100_dowork(s);
  327. return s->tx_empty;
  328. }
  329. static unsigned int max3100_get_mctrl(struct uart_port *port)
  330. {
  331. struct max3100_port *s = container_of(port,
  332. struct max3100_port,
  333. port);
  334. dev_dbg(&s->spi->dev, "%s\n", __func__);
  335. /* may not be truly up-to-date */
  336. max3100_dowork(s);
  337. /* always assert DCD and DSR since these lines are not wired */
  338. return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
  339. }
  340. static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
  341. {
  342. struct max3100_port *s = container_of(port,
  343. struct max3100_port,
  344. port);
  345. int rts;
  346. dev_dbg(&s->spi->dev, "%s\n", __func__);
  347. rts = (mctrl & TIOCM_RTS) > 0;
  348. spin_lock(&s->conf_lock);
  349. if (s->rts != rts) {
  350. s->rts = rts;
  351. s->rts_commit = 1;
  352. max3100_dowork(s);
  353. }
  354. spin_unlock(&s->conf_lock);
  355. }
  356. static void
  357. max3100_set_termios(struct uart_port *port, struct ktermios *termios,
  358. struct ktermios *old)
  359. {
  360. struct max3100_port *s = container_of(port,
  361. struct max3100_port,
  362. port);
  363. int baud = 0;
  364. unsigned cflag;
  365. u32 param_new, param_mask, parity = 0;
  366. dev_dbg(&s->spi->dev, "%s\n", __func__);
  367. cflag = termios->c_cflag;
  368. param_new = 0;
  369. param_mask = 0;
  370. baud = tty_termios_baud_rate(termios);
  371. param_new = s->conf & MAX3100_BAUD;
  372. switch (baud) {
  373. case 300:
  374. if (s->crystal)
  375. baud = s->baud;
  376. else
  377. param_new = 15;
  378. break;
  379. case 600:
  380. param_new = 14 + s->crystal;
  381. break;
  382. case 1200:
  383. param_new = 13 + s->crystal;
  384. break;
  385. case 2400:
  386. param_new = 12 + s->crystal;
  387. break;
  388. case 4800:
  389. param_new = 11 + s->crystal;
  390. break;
  391. case 9600:
  392. param_new = 10 + s->crystal;
  393. break;
  394. case 19200:
  395. param_new = 9 + s->crystal;
  396. break;
  397. case 38400:
  398. param_new = 8 + s->crystal;
  399. break;
  400. case 57600:
  401. param_new = 1 + s->crystal;
  402. break;
  403. case 115200:
  404. param_new = 0 + s->crystal;
  405. break;
  406. case 230400:
  407. if (s->crystal)
  408. param_new = 0;
  409. else
  410. baud = s->baud;
  411. break;
  412. default:
  413. baud = s->baud;
  414. }
  415. tty_termios_encode_baud_rate(termios, baud, baud);
  416. s->baud = baud;
  417. param_mask |= MAX3100_BAUD;
  418. if ((cflag & CSIZE) == CS8) {
  419. param_new &= ~MAX3100_L;
  420. parity &= ~MAX3100_7BIT;
  421. } else {
  422. param_new |= MAX3100_L;
  423. parity |= MAX3100_7BIT;
  424. cflag = (cflag & ~CSIZE) | CS7;
  425. }
  426. param_mask |= MAX3100_L;
  427. if (cflag & CSTOPB)
  428. param_new |= MAX3100_ST;
  429. else
  430. param_new &= ~MAX3100_ST;
  431. param_mask |= MAX3100_ST;
  432. if (cflag & PARENB) {
  433. param_new |= MAX3100_PE;
  434. parity |= MAX3100_PARITY_ON;
  435. } else {
  436. param_new &= ~MAX3100_PE;
  437. parity &= ~MAX3100_PARITY_ON;
  438. }
  439. param_mask |= MAX3100_PE;
  440. if (cflag & PARODD)
  441. parity |= MAX3100_PARITY_ODD;
  442. else
  443. parity &= ~MAX3100_PARITY_ODD;
  444. /* mask termios capabilities we don't support */
  445. cflag &= ~CMSPAR;
  446. termios->c_cflag = cflag;
  447. s->port.ignore_status_mask = 0;
  448. if (termios->c_iflag & IGNPAR)
  449. s->port.ignore_status_mask |=
  450. MAX3100_STATUS_PE | MAX3100_STATUS_FE |
  451. MAX3100_STATUS_OE;
  452. /* we are sending char from a workqueue so enable */
  453. s->port.state->port.tty->low_latency = 1;
  454. if (s->poll_time > 0)
  455. del_timer_sync(&s->timer);
  456. uart_update_timeout(port, termios->c_cflag, baud);
  457. spin_lock(&s->conf_lock);
  458. s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
  459. s->conf_commit = 1;
  460. s->parity = parity;
  461. spin_unlock(&s->conf_lock);
  462. max3100_dowork(s);
  463. if (UART_ENABLE_MS(&s->port, termios->c_cflag))
  464. max3100_enable_ms(&s->port);
  465. }
  466. static void max3100_shutdown(struct uart_port *port)
  467. {
  468. struct max3100_port *s = container_of(port,
  469. struct max3100_port,
  470. port);
  471. dev_dbg(&s->spi->dev, "%s\n", __func__);
  472. if (s->suspending)
  473. return;
  474. s->force_end_work = 1;
  475. if (s->poll_time > 0)
  476. del_timer_sync(&s->timer);
  477. if (s->workqueue) {
  478. flush_workqueue(s->workqueue);
  479. destroy_workqueue(s->workqueue);
  480. s->workqueue = NULL;
  481. }
  482. if (s->irq)
  483. free_irq(s->irq, s);
  484. /* set shutdown mode to save power */
  485. if (s->max3100_hw_suspend)
  486. s->max3100_hw_suspend(1);
  487. else {
  488. u16 tx, rx;
  489. tx = MAX3100_WC | MAX3100_SHDN;
  490. max3100_sr(s, tx, &rx);
  491. }
  492. }
  493. static int max3100_startup(struct uart_port *port)
  494. {
  495. struct max3100_port *s = container_of(port,
  496. struct max3100_port,
  497. port);
  498. char b[12];
  499. dev_dbg(&s->spi->dev, "%s\n", __func__);
  500. s->conf = MAX3100_RM;
  501. s->baud = s->crystal ? 230400 : 115200;
  502. s->rx_enabled = 1;
  503. if (s->suspending)
  504. return 0;
  505. s->force_end_work = 0;
  506. s->parity = 0;
  507. s->rts = 0;
  508. sprintf(b, "max3100-%d", s->minor);
  509. s->workqueue = create_freezable_workqueue(b);
  510. if (!s->workqueue) {
  511. dev_warn(&s->spi->dev, "cannot create workqueue\n");
  512. return -EBUSY;
  513. }
  514. INIT_WORK(&s->work, max3100_work);
  515. if (request_irq(s->irq, max3100_irq,
  516. IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
  517. dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
  518. s->irq = 0;
  519. destroy_workqueue(s->workqueue);
  520. s->workqueue = NULL;
  521. return -EBUSY;
  522. }
  523. if (s->loopback) {
  524. u16 tx, rx;
  525. tx = 0x4001;
  526. max3100_sr(s, tx, &rx);
  527. }
  528. if (s->max3100_hw_suspend)
  529. s->max3100_hw_suspend(0);
  530. s->conf_commit = 1;
  531. max3100_dowork(s);
  532. /* wait for clock to settle */
  533. msleep(50);
  534. max3100_enable_ms(&s->port);
  535. return 0;
  536. }
  537. static const char *max3100_type(struct uart_port *port)
  538. {
  539. struct max3100_port *s = container_of(port,
  540. struct max3100_port,
  541. port);
  542. dev_dbg(&s->spi->dev, "%s\n", __func__);
  543. return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
  544. }
  545. static void max3100_release_port(struct uart_port *port)
  546. {
  547. struct max3100_port *s = container_of(port,
  548. struct max3100_port,
  549. port);
  550. dev_dbg(&s->spi->dev, "%s\n", __func__);
  551. }
  552. static void max3100_config_port(struct uart_port *port, int flags)
  553. {
  554. struct max3100_port *s = container_of(port,
  555. struct max3100_port,
  556. port);
  557. dev_dbg(&s->spi->dev, "%s\n", __func__);
  558. if (flags & UART_CONFIG_TYPE)
  559. s->port.type = PORT_MAX3100;
  560. }
  561. static int max3100_verify_port(struct uart_port *port,
  562. struct serial_struct *ser)
  563. {
  564. struct max3100_port *s = container_of(port,
  565. struct max3100_port,
  566. port);
  567. int ret = -EINVAL;
  568. dev_dbg(&s->spi->dev, "%s\n", __func__);
  569. if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
  570. ret = 0;
  571. return ret;
  572. }
  573. static void max3100_stop_tx(struct uart_port *port)
  574. {
  575. struct max3100_port *s = container_of(port,
  576. struct max3100_port,
  577. port);
  578. dev_dbg(&s->spi->dev, "%s\n", __func__);
  579. }
  580. static int max3100_request_port(struct uart_port *port)
  581. {
  582. struct max3100_port *s = container_of(port,
  583. struct max3100_port,
  584. port);
  585. dev_dbg(&s->spi->dev, "%s\n", __func__);
  586. return 0;
  587. }
  588. static void max3100_break_ctl(struct uart_port *port, int break_state)
  589. {
  590. struct max3100_port *s = container_of(port,
  591. struct max3100_port,
  592. port);
  593. dev_dbg(&s->spi->dev, "%s\n", __func__);
  594. }
  595. static struct uart_ops max3100_ops = {
  596. .tx_empty = max3100_tx_empty,
  597. .set_mctrl = max3100_set_mctrl,
  598. .get_mctrl = max3100_get_mctrl,
  599. .stop_tx = max3100_stop_tx,
  600. .start_tx = max3100_start_tx,
  601. .stop_rx = max3100_stop_rx,
  602. .enable_ms = max3100_enable_ms,
  603. .break_ctl = max3100_break_ctl,
  604. .startup = max3100_startup,
  605. .shutdown = max3100_shutdown,
  606. .set_termios = max3100_set_termios,
  607. .type = max3100_type,
  608. .release_port = max3100_release_port,
  609. .request_port = max3100_request_port,
  610. .config_port = max3100_config_port,
  611. .verify_port = max3100_verify_port,
  612. };
  613. static struct uart_driver max3100_uart_driver = {
  614. .owner = THIS_MODULE,
  615. .driver_name = "ttyMAX",
  616. .dev_name = "ttyMAX",
  617. .major = MAX3100_MAJOR,
  618. .minor = MAX3100_MINOR,
  619. .nr = MAX_MAX3100,
  620. };
  621. static int uart_driver_registered;
  622. static int __devinit max3100_probe(struct spi_device *spi)
  623. {
  624. int i, retval;
  625. struct plat_max3100 *pdata;
  626. u16 tx, rx;
  627. mutex_lock(&max3100s_lock);
  628. if (!uart_driver_registered) {
  629. uart_driver_registered = 1;
  630. retval = uart_register_driver(&max3100_uart_driver);
  631. if (retval) {
  632. printk(KERN_ERR "Couldn't register max3100 uart driver\n");
  633. mutex_unlock(&max3100s_lock);
  634. return retval;
  635. }
  636. }
  637. for (i = 0; i < MAX_MAX3100; i++)
  638. if (!max3100s[i])
  639. break;
  640. if (i == MAX_MAX3100) {
  641. dev_warn(&spi->dev, "too many MAX3100 chips\n");
  642. mutex_unlock(&max3100s_lock);
  643. return -ENOMEM;
  644. }
  645. max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
  646. if (!max3100s[i]) {
  647. dev_warn(&spi->dev,
  648. "kmalloc for max3100 structure %d failed!\n", i);
  649. mutex_unlock(&max3100s_lock);
  650. return -ENOMEM;
  651. }
  652. max3100s[i]->spi = spi;
  653. max3100s[i]->irq = spi->irq;
  654. spin_lock_init(&max3100s[i]->conf_lock);
  655. dev_set_drvdata(&spi->dev, max3100s[i]);
  656. pdata = spi->dev.platform_data;
  657. max3100s[i]->crystal = pdata->crystal;
  658. max3100s[i]->loopback = pdata->loopback;
  659. max3100s[i]->poll_time = pdata->poll_time * HZ / 1000;
  660. if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
  661. max3100s[i]->poll_time = 1;
  662. max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
  663. max3100s[i]->minor = i;
  664. init_timer(&max3100s[i]->timer);
  665. max3100s[i]->timer.function = max3100_timeout;
  666. max3100s[i]->timer.data = (unsigned long) max3100s[i];
  667. dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
  668. max3100s[i]->port.irq = max3100s[i]->irq;
  669. max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
  670. max3100s[i]->port.fifosize = 16;
  671. max3100s[i]->port.ops = &max3100_ops;
  672. max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
  673. max3100s[i]->port.line = i;
  674. max3100s[i]->port.type = PORT_MAX3100;
  675. max3100s[i]->port.dev = &spi->dev;
  676. retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
  677. if (retval < 0)
  678. dev_warn(&spi->dev,
  679. "uart_add_one_port failed for line %d with error %d\n",
  680. i, retval);
  681. /* set shutdown mode to save power. Will be woken-up on open */
  682. if (max3100s[i]->max3100_hw_suspend)
  683. max3100s[i]->max3100_hw_suspend(1);
  684. else {
  685. tx = MAX3100_WC | MAX3100_SHDN;
  686. max3100_sr(max3100s[i], tx, &rx);
  687. }
  688. mutex_unlock(&max3100s_lock);
  689. return 0;
  690. }
  691. static int __devexit max3100_remove(struct spi_device *spi)
  692. {
  693. struct max3100_port *s = dev_get_drvdata(&spi->dev);
  694. int i;
  695. mutex_lock(&max3100s_lock);
  696. /* find out the index for the chip we are removing */
  697. for (i = 0; i < MAX_MAX3100; i++)
  698. if (max3100s[i] == s)
  699. break;
  700. dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
  701. uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
  702. kfree(max3100s[i]);
  703. max3100s[i] = NULL;
  704. /* check if this is the last chip we have */
  705. for (i = 0; i < MAX_MAX3100; i++)
  706. if (max3100s[i]) {
  707. mutex_unlock(&max3100s_lock);
  708. return 0;
  709. }
  710. pr_debug("removing max3100 driver\n");
  711. uart_unregister_driver(&max3100_uart_driver);
  712. mutex_unlock(&max3100s_lock);
  713. return 0;
  714. }
  715. #ifdef CONFIG_PM
  716. static int max3100_suspend(struct spi_device *spi, pm_message_t state)
  717. {
  718. struct max3100_port *s = dev_get_drvdata(&spi->dev);
  719. dev_dbg(&s->spi->dev, "%s\n", __func__);
  720. disable_irq(s->irq);
  721. s->suspending = 1;
  722. uart_suspend_port(&max3100_uart_driver, &s->port);
  723. if (s->max3100_hw_suspend)
  724. s->max3100_hw_suspend(1);
  725. else {
  726. /* no HW suspend, so do SW one */
  727. u16 tx, rx;
  728. tx = MAX3100_WC | MAX3100_SHDN;
  729. max3100_sr(s, tx, &rx);
  730. }
  731. return 0;
  732. }
  733. static int max3100_resume(struct spi_device *spi)
  734. {
  735. struct max3100_port *s = dev_get_drvdata(&spi->dev);
  736. dev_dbg(&s->spi->dev, "%s\n", __func__);
  737. if (s->max3100_hw_suspend)
  738. s->max3100_hw_suspend(0);
  739. uart_resume_port(&max3100_uart_driver, &s->port);
  740. s->suspending = 0;
  741. enable_irq(s->irq);
  742. s->conf_commit = 1;
  743. if (s->workqueue)
  744. max3100_dowork(s);
  745. return 0;
  746. }
  747. #else
  748. #define max3100_suspend NULL
  749. #define max3100_resume NULL
  750. #endif
  751. static struct spi_driver max3100_driver = {
  752. .driver = {
  753. .name = "max3100",
  754. .owner = THIS_MODULE,
  755. },
  756. .probe = max3100_probe,
  757. .remove = __devexit_p(max3100_remove),
  758. .suspend = max3100_suspend,
  759. .resume = max3100_resume,
  760. };
  761. static int __init max3100_init(void)
  762. {
  763. return spi_register_driver(&max3100_driver);
  764. }
  765. module_init(max3100_init);
  766. static void __exit max3100_exit(void)
  767. {
  768. spi_unregister_driver(&max3100_driver);
  769. }
  770. module_exit(max3100_exit);
  771. MODULE_DESCRIPTION("MAX3100 driver");
  772. MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
  773. MODULE_LICENSE("GPL");
  774. MODULE_ALIAS("spi:max3100");