dz.c 23 KB

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  1. /*
  2. * dz.c: Serial port driver for DECstations equipped
  3. * with the DZ chipset.
  4. *
  5. * Copyright (C) 1998 Olivier A. D. Lebaillif
  6. *
  7. * Email: olivier.lebaillif@ifrsys.com
  8. *
  9. * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
  10. *
  11. * [31-AUG-98] triemer
  12. * Changed IRQ to use Harald's dec internals interrupts.h
  13. * removed base_addr code - moving address assignment to setup.c
  14. * Changed name of dz_init to rs_init to be consistent with tc code
  15. * [13-NOV-98] triemer fixed code to receive characters
  16. * after patches by harald to irq code.
  17. * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
  18. * field from "current" - somewhere between 2.1.121 and 2.1.131
  19. Qua Jun 27 15:02:26 BRT 2001
  20. * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
  21. *
  22. * Parts (C) 1999 David Airlie, airlied@linux.ie
  23. * [07-SEP-99] Bugfixes
  24. *
  25. * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
  26. * Converted to new serial core
  27. */
  28. #undef DEBUG_DZ
  29. #if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/bitops.h>
  33. #include <linux/compiler.h>
  34. #include <linux/console.h>
  35. #include <linux/delay.h>
  36. #include <linux/errno.h>
  37. #include <linux/init.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/ioport.h>
  40. #include <linux/kernel.h>
  41. #include <linux/major.h>
  42. #include <linux/module.h>
  43. #include <linux/serial.h>
  44. #include <linux/serial_core.h>
  45. #include <linux/sysrq.h>
  46. #include <linux/tty.h>
  47. #include <linux/tty_flip.h>
  48. #include <linux/atomic.h>
  49. #include <asm/bootinfo.h>
  50. #include <asm/io.h>
  51. #include <asm/dec/interrupts.h>
  52. #include <asm/dec/kn01.h>
  53. #include <asm/dec/kn02.h>
  54. #include <asm/dec/machtype.h>
  55. #include <asm/dec/prom.h>
  56. #include <asm/dec/system.h>
  57. #include "dz.h"
  58. MODULE_DESCRIPTION("DECstation DZ serial driver");
  59. MODULE_LICENSE("GPL");
  60. static char dz_name[] __initdata = "DECstation DZ serial driver version ";
  61. static char dz_version[] __initdata = "1.04";
  62. struct dz_port {
  63. struct dz_mux *mux;
  64. struct uart_port port;
  65. unsigned int cflag;
  66. };
  67. struct dz_mux {
  68. struct dz_port dport[DZ_NB_PORT];
  69. atomic_t map_guard;
  70. atomic_t irq_guard;
  71. int initialised;
  72. };
  73. static struct dz_mux dz_mux;
  74. static inline struct dz_port *to_dport(struct uart_port *uport)
  75. {
  76. return container_of(uport, struct dz_port, port);
  77. }
  78. /*
  79. * ------------------------------------------------------------
  80. * dz_in () and dz_out ()
  81. *
  82. * These routines are used to access the registers of the DZ
  83. * chip, hiding relocation differences between implementation.
  84. * ------------------------------------------------------------
  85. */
  86. static u16 dz_in(struct dz_port *dport, unsigned offset)
  87. {
  88. void __iomem *addr = dport->port.membase + offset;
  89. return readw(addr);
  90. }
  91. static void dz_out(struct dz_port *dport, unsigned offset, u16 value)
  92. {
  93. void __iomem *addr = dport->port.membase + offset;
  94. writew(value, addr);
  95. }
  96. /*
  97. * ------------------------------------------------------------
  98. * rs_stop () and rs_start ()
  99. *
  100. * These routines are called before setting or resetting
  101. * tty->stopped. They enable or disable transmitter interrupts,
  102. * as necessary.
  103. * ------------------------------------------------------------
  104. */
  105. static void dz_stop_tx(struct uart_port *uport)
  106. {
  107. struct dz_port *dport = to_dport(uport);
  108. u16 tmp, mask = 1 << dport->port.line;
  109. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  110. tmp &= ~mask; /* clear the TX flag */
  111. dz_out(dport, DZ_TCR, tmp);
  112. }
  113. static void dz_start_tx(struct uart_port *uport)
  114. {
  115. struct dz_port *dport = to_dport(uport);
  116. u16 tmp, mask = 1 << dport->port.line;
  117. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  118. tmp |= mask; /* set the TX flag */
  119. dz_out(dport, DZ_TCR, tmp);
  120. }
  121. static void dz_stop_rx(struct uart_port *uport)
  122. {
  123. struct dz_port *dport = to_dport(uport);
  124. dport->cflag &= ~DZ_RXENAB;
  125. dz_out(dport, DZ_LPR, dport->cflag);
  126. }
  127. static void dz_enable_ms(struct uart_port *uport)
  128. {
  129. /* nothing to do */
  130. }
  131. /*
  132. * ------------------------------------------------------------
  133. *
  134. * Here start the interrupt handling routines. All of the following
  135. * subroutines are declared as inline and are folded into
  136. * dz_interrupt. They were separated out for readability's sake.
  137. *
  138. * Note: dz_interrupt() is a "fast" interrupt, which means that it
  139. * runs with interrupts turned off. People who may want to modify
  140. * dz_interrupt() should try to keep the interrupt handler as fast as
  141. * possible. After you are done making modifications, it is not a bad
  142. * idea to do:
  143. *
  144. * make drivers/serial/dz.s
  145. *
  146. * and look at the resulting assemble code in dz.s.
  147. *
  148. * ------------------------------------------------------------
  149. */
  150. /*
  151. * ------------------------------------------------------------
  152. * receive_char ()
  153. *
  154. * This routine deals with inputs from any lines.
  155. * ------------------------------------------------------------
  156. */
  157. static inline void dz_receive_chars(struct dz_mux *mux)
  158. {
  159. struct uart_port *uport;
  160. struct dz_port *dport = &mux->dport[0];
  161. struct tty_struct *tty = NULL;
  162. struct uart_icount *icount;
  163. int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
  164. unsigned char ch, flag;
  165. u16 status;
  166. int i;
  167. while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) {
  168. dport = &mux->dport[LINE(status)];
  169. uport = &dport->port;
  170. tty = uport->state->port.tty; /* point to the proper dev */
  171. ch = UCHAR(status); /* grab the char */
  172. flag = TTY_NORMAL;
  173. icount = &uport->icount;
  174. icount->rx++;
  175. if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) {
  176. /*
  177. * There is no separate BREAK status bit, so treat
  178. * null characters with framing errors as BREAKs;
  179. * normally, otherwise. For this move the Framing
  180. * Error bit to a simulated BREAK bit.
  181. */
  182. if (!ch) {
  183. status |= (status & DZ_FERR) >>
  184. (ffs(DZ_FERR) - ffs(DZ_BREAK));
  185. status &= ~DZ_FERR;
  186. }
  187. /* Handle SysRq/SAK & keep track of the statistics. */
  188. if (status & DZ_BREAK) {
  189. icount->brk++;
  190. if (uart_handle_break(uport))
  191. continue;
  192. } else if (status & DZ_FERR)
  193. icount->frame++;
  194. else if (status & DZ_PERR)
  195. icount->parity++;
  196. if (status & DZ_OERR)
  197. icount->overrun++;
  198. status &= uport->read_status_mask;
  199. if (status & DZ_BREAK)
  200. flag = TTY_BREAK;
  201. else if (status & DZ_FERR)
  202. flag = TTY_FRAME;
  203. else if (status & DZ_PERR)
  204. flag = TTY_PARITY;
  205. }
  206. if (uart_handle_sysrq_char(uport, ch))
  207. continue;
  208. uart_insert_char(uport, status, DZ_OERR, ch, flag);
  209. lines_rx[LINE(status)] = 1;
  210. }
  211. for (i = 0; i < DZ_NB_PORT; i++)
  212. if (lines_rx[i])
  213. tty_flip_buffer_push(mux->dport[i].port.state->port.tty);
  214. }
  215. /*
  216. * ------------------------------------------------------------
  217. * transmit_char ()
  218. *
  219. * This routine deals with outputs to any lines.
  220. * ------------------------------------------------------------
  221. */
  222. static inline void dz_transmit_chars(struct dz_mux *mux)
  223. {
  224. struct dz_port *dport = &mux->dport[0];
  225. struct circ_buf *xmit;
  226. unsigned char tmp;
  227. u16 status;
  228. status = dz_in(dport, DZ_CSR);
  229. dport = &mux->dport[LINE(status)];
  230. xmit = &dport->port.state->xmit;
  231. if (dport->port.x_char) { /* XON/XOFF chars */
  232. dz_out(dport, DZ_TDR, dport->port.x_char);
  233. dport->port.icount.tx++;
  234. dport->port.x_char = 0;
  235. return;
  236. }
  237. /* If nothing to do or stopped or hardware stopped. */
  238. if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
  239. spin_lock(&dport->port.lock);
  240. dz_stop_tx(&dport->port);
  241. spin_unlock(&dport->port.lock);
  242. return;
  243. }
  244. /*
  245. * If something to do... (remember the dz has no output fifo,
  246. * so we go one char at a time) :-<
  247. */
  248. tmp = xmit->buf[xmit->tail];
  249. xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
  250. dz_out(dport, DZ_TDR, tmp);
  251. dport->port.icount.tx++;
  252. if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
  253. uart_write_wakeup(&dport->port);
  254. /* Are we are done. */
  255. if (uart_circ_empty(xmit)) {
  256. spin_lock(&dport->port.lock);
  257. dz_stop_tx(&dport->port);
  258. spin_unlock(&dport->port.lock);
  259. }
  260. }
  261. /*
  262. * ------------------------------------------------------------
  263. * check_modem_status()
  264. *
  265. * DS 3100 & 5100: Only valid for the MODEM line, duh!
  266. * DS 5000/200: Valid for the MODEM and PRINTER line.
  267. * ------------------------------------------------------------
  268. */
  269. static inline void check_modem_status(struct dz_port *dport)
  270. {
  271. /*
  272. * FIXME:
  273. * 1. No status change interrupt; use a timer.
  274. * 2. Handle the 3100/5000 as appropriate. --macro
  275. */
  276. u16 status;
  277. /* If not the modem line just return. */
  278. if (dport->port.line != DZ_MODEM)
  279. return;
  280. status = dz_in(dport, DZ_MSR);
  281. /* it's easy, since DSR2 is the only bit in the register */
  282. if (status)
  283. dport->port.icount.dsr++;
  284. }
  285. /*
  286. * ------------------------------------------------------------
  287. * dz_interrupt ()
  288. *
  289. * this is the main interrupt routine for the DZ chip.
  290. * It deals with the multiple ports.
  291. * ------------------------------------------------------------
  292. */
  293. static irqreturn_t dz_interrupt(int irq, void *dev_id)
  294. {
  295. struct dz_mux *mux = dev_id;
  296. struct dz_port *dport = &mux->dport[0];
  297. u16 status;
  298. /* get the reason why we just got an irq */
  299. status = dz_in(dport, DZ_CSR);
  300. if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
  301. dz_receive_chars(mux);
  302. if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
  303. dz_transmit_chars(mux);
  304. return IRQ_HANDLED;
  305. }
  306. /*
  307. * -------------------------------------------------------------------
  308. * Here ends the DZ interrupt routines.
  309. * -------------------------------------------------------------------
  310. */
  311. static unsigned int dz_get_mctrl(struct uart_port *uport)
  312. {
  313. /*
  314. * FIXME: Handle the 3100/5000 as appropriate. --macro
  315. */
  316. struct dz_port *dport = to_dport(uport);
  317. unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  318. if (dport->port.line == DZ_MODEM) {
  319. if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
  320. mctrl &= ~TIOCM_DSR;
  321. }
  322. return mctrl;
  323. }
  324. static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
  325. {
  326. /*
  327. * FIXME: Handle the 3100/5000 as appropriate. --macro
  328. */
  329. struct dz_port *dport = to_dport(uport);
  330. u16 tmp;
  331. if (dport->port.line == DZ_MODEM) {
  332. tmp = dz_in(dport, DZ_TCR);
  333. if (mctrl & TIOCM_DTR)
  334. tmp &= ~DZ_MODEM_DTR;
  335. else
  336. tmp |= DZ_MODEM_DTR;
  337. dz_out(dport, DZ_TCR, tmp);
  338. }
  339. }
  340. /*
  341. * -------------------------------------------------------------------
  342. * startup ()
  343. *
  344. * various initialization tasks
  345. * -------------------------------------------------------------------
  346. */
  347. static int dz_startup(struct uart_port *uport)
  348. {
  349. struct dz_port *dport = to_dport(uport);
  350. struct dz_mux *mux = dport->mux;
  351. unsigned long flags;
  352. int irq_guard;
  353. int ret;
  354. u16 tmp;
  355. irq_guard = atomic_add_return(1, &mux->irq_guard);
  356. if (irq_guard != 1)
  357. return 0;
  358. ret = request_irq(dport->port.irq, dz_interrupt,
  359. IRQF_SHARED, "dz", mux);
  360. if (ret) {
  361. atomic_add(-1, &mux->irq_guard);
  362. printk(KERN_ERR "dz: Cannot get IRQ %d!\n", dport->port.irq);
  363. return ret;
  364. }
  365. spin_lock_irqsave(&dport->port.lock, flags);
  366. /* Enable interrupts. */
  367. tmp = dz_in(dport, DZ_CSR);
  368. tmp |= DZ_RIE | DZ_TIE;
  369. dz_out(dport, DZ_CSR, tmp);
  370. spin_unlock_irqrestore(&dport->port.lock, flags);
  371. return 0;
  372. }
  373. /*
  374. * -------------------------------------------------------------------
  375. * shutdown ()
  376. *
  377. * This routine will shutdown a serial port; interrupts are disabled, and
  378. * DTR is dropped if the hangup on close termio flag is on.
  379. * -------------------------------------------------------------------
  380. */
  381. static void dz_shutdown(struct uart_port *uport)
  382. {
  383. struct dz_port *dport = to_dport(uport);
  384. struct dz_mux *mux = dport->mux;
  385. unsigned long flags;
  386. int irq_guard;
  387. u16 tmp;
  388. spin_lock_irqsave(&dport->port.lock, flags);
  389. dz_stop_tx(&dport->port);
  390. spin_unlock_irqrestore(&dport->port.lock, flags);
  391. irq_guard = atomic_add_return(-1, &mux->irq_guard);
  392. if (!irq_guard) {
  393. /* Disable interrupts. */
  394. tmp = dz_in(dport, DZ_CSR);
  395. tmp &= ~(DZ_RIE | DZ_TIE);
  396. dz_out(dport, DZ_CSR, tmp);
  397. free_irq(dport->port.irq, mux);
  398. }
  399. }
  400. /*
  401. * -------------------------------------------------------------------
  402. * dz_tx_empty() -- get the transmitter empty status
  403. *
  404. * Purpose: Let user call ioctl() to get info when the UART physically
  405. * is emptied. On bus types like RS485, the transmitter must
  406. * release the bus after transmitting. This must be done when
  407. * the transmit shift register is empty, not be done when the
  408. * transmit holding register is empty. This functionality
  409. * allows an RS485 driver to be written in user space.
  410. * -------------------------------------------------------------------
  411. */
  412. static unsigned int dz_tx_empty(struct uart_port *uport)
  413. {
  414. struct dz_port *dport = to_dport(uport);
  415. unsigned short tmp, mask = 1 << dport->port.line;
  416. tmp = dz_in(dport, DZ_TCR);
  417. tmp &= mask;
  418. return tmp ? 0 : TIOCSER_TEMT;
  419. }
  420. static void dz_break_ctl(struct uart_port *uport, int break_state)
  421. {
  422. /*
  423. * FIXME: Can't access BREAK bits in TDR easily;
  424. * reuse the code for polled TX. --macro
  425. */
  426. struct dz_port *dport = to_dport(uport);
  427. unsigned long flags;
  428. unsigned short tmp, mask = 1 << dport->port.line;
  429. spin_lock_irqsave(&uport->lock, flags);
  430. tmp = dz_in(dport, DZ_TCR);
  431. if (break_state)
  432. tmp |= mask;
  433. else
  434. tmp &= ~mask;
  435. dz_out(dport, DZ_TCR, tmp);
  436. spin_unlock_irqrestore(&uport->lock, flags);
  437. }
  438. static int dz_encode_baud_rate(unsigned int baud)
  439. {
  440. switch (baud) {
  441. case 50:
  442. return DZ_B50;
  443. case 75:
  444. return DZ_B75;
  445. case 110:
  446. return DZ_B110;
  447. case 134:
  448. return DZ_B134;
  449. case 150:
  450. return DZ_B150;
  451. case 300:
  452. return DZ_B300;
  453. case 600:
  454. return DZ_B600;
  455. case 1200:
  456. return DZ_B1200;
  457. case 1800:
  458. return DZ_B1800;
  459. case 2000:
  460. return DZ_B2000;
  461. case 2400:
  462. return DZ_B2400;
  463. case 3600:
  464. return DZ_B3600;
  465. case 4800:
  466. return DZ_B4800;
  467. case 7200:
  468. return DZ_B7200;
  469. case 9600:
  470. return DZ_B9600;
  471. default:
  472. return -1;
  473. }
  474. }
  475. static void dz_reset(struct dz_port *dport)
  476. {
  477. struct dz_mux *mux = dport->mux;
  478. if (mux->initialised)
  479. return;
  480. dz_out(dport, DZ_CSR, DZ_CLR);
  481. while (dz_in(dport, DZ_CSR) & DZ_CLR);
  482. iob();
  483. /* Enable scanning. */
  484. dz_out(dport, DZ_CSR, DZ_MSE);
  485. mux->initialised = 1;
  486. }
  487. static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
  488. struct ktermios *old_termios)
  489. {
  490. struct dz_port *dport = to_dport(uport);
  491. unsigned long flags;
  492. unsigned int cflag, baud;
  493. int bflag;
  494. cflag = dport->port.line;
  495. switch (termios->c_cflag & CSIZE) {
  496. case CS5:
  497. cflag |= DZ_CS5;
  498. break;
  499. case CS6:
  500. cflag |= DZ_CS6;
  501. break;
  502. case CS7:
  503. cflag |= DZ_CS7;
  504. break;
  505. case CS8:
  506. default:
  507. cflag |= DZ_CS8;
  508. }
  509. if (termios->c_cflag & CSTOPB)
  510. cflag |= DZ_CSTOPB;
  511. if (termios->c_cflag & PARENB)
  512. cflag |= DZ_PARENB;
  513. if (termios->c_cflag & PARODD)
  514. cflag |= DZ_PARODD;
  515. baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
  516. bflag = dz_encode_baud_rate(baud);
  517. if (bflag < 0) { /* Try to keep unchanged. */
  518. baud = uart_get_baud_rate(uport, old_termios, NULL, 50, 9600);
  519. bflag = dz_encode_baud_rate(baud);
  520. if (bflag < 0) { /* Resort to 9600. */
  521. baud = 9600;
  522. bflag = DZ_B9600;
  523. }
  524. tty_termios_encode_baud_rate(termios, baud, baud);
  525. }
  526. cflag |= bflag;
  527. if (termios->c_cflag & CREAD)
  528. cflag |= DZ_RXENAB;
  529. spin_lock_irqsave(&dport->port.lock, flags);
  530. uart_update_timeout(uport, termios->c_cflag, baud);
  531. dz_out(dport, DZ_LPR, cflag);
  532. dport->cflag = cflag;
  533. /* setup accept flag */
  534. dport->port.read_status_mask = DZ_OERR;
  535. if (termios->c_iflag & INPCK)
  536. dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
  537. if (termios->c_iflag & (BRKINT | PARMRK))
  538. dport->port.read_status_mask |= DZ_BREAK;
  539. /* characters to ignore */
  540. uport->ignore_status_mask = 0;
  541. if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
  542. dport->port.ignore_status_mask |= DZ_OERR;
  543. if (termios->c_iflag & IGNPAR)
  544. dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
  545. if (termios->c_iflag & IGNBRK)
  546. dport->port.ignore_status_mask |= DZ_BREAK;
  547. spin_unlock_irqrestore(&dport->port.lock, flags);
  548. }
  549. /*
  550. * Hack alert!
  551. * Required solely so that the initial PROM-based console
  552. * works undisturbed in parallel with this one.
  553. */
  554. static void dz_pm(struct uart_port *uport, unsigned int state,
  555. unsigned int oldstate)
  556. {
  557. struct dz_port *dport = to_dport(uport);
  558. unsigned long flags;
  559. spin_lock_irqsave(&dport->port.lock, flags);
  560. if (state < 3)
  561. dz_start_tx(&dport->port);
  562. else
  563. dz_stop_tx(&dport->port);
  564. spin_unlock_irqrestore(&dport->port.lock, flags);
  565. }
  566. static const char *dz_type(struct uart_port *uport)
  567. {
  568. return "DZ";
  569. }
  570. static void dz_release_port(struct uart_port *uport)
  571. {
  572. struct dz_mux *mux = to_dport(uport)->mux;
  573. int map_guard;
  574. iounmap(uport->membase);
  575. uport->membase = NULL;
  576. map_guard = atomic_add_return(-1, &mux->map_guard);
  577. if (!map_guard)
  578. release_mem_region(uport->mapbase, dec_kn_slot_size);
  579. }
  580. static int dz_map_port(struct uart_port *uport)
  581. {
  582. if (!uport->membase)
  583. uport->membase = ioremap_nocache(uport->mapbase,
  584. dec_kn_slot_size);
  585. if (!uport->membase) {
  586. printk(KERN_ERR "dz: Cannot map MMIO\n");
  587. return -ENOMEM;
  588. }
  589. return 0;
  590. }
  591. static int dz_request_port(struct uart_port *uport)
  592. {
  593. struct dz_mux *mux = to_dport(uport)->mux;
  594. int map_guard;
  595. int ret;
  596. map_guard = atomic_add_return(1, &mux->map_guard);
  597. if (map_guard == 1) {
  598. if (!request_mem_region(uport->mapbase, dec_kn_slot_size,
  599. "dz")) {
  600. atomic_add(-1, &mux->map_guard);
  601. printk(KERN_ERR
  602. "dz: Unable to reserve MMIO resource\n");
  603. return -EBUSY;
  604. }
  605. }
  606. ret = dz_map_port(uport);
  607. if (ret) {
  608. map_guard = atomic_add_return(-1, &mux->map_guard);
  609. if (!map_guard)
  610. release_mem_region(uport->mapbase, dec_kn_slot_size);
  611. return ret;
  612. }
  613. return 0;
  614. }
  615. static void dz_config_port(struct uart_port *uport, int flags)
  616. {
  617. struct dz_port *dport = to_dport(uport);
  618. if (flags & UART_CONFIG_TYPE) {
  619. if (dz_request_port(uport))
  620. return;
  621. uport->type = PORT_DZ;
  622. dz_reset(dport);
  623. }
  624. }
  625. /*
  626. * Verify the new serial_struct (for TIOCSSERIAL).
  627. */
  628. static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser)
  629. {
  630. int ret = 0;
  631. if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
  632. ret = -EINVAL;
  633. if (ser->irq != uport->irq)
  634. ret = -EINVAL;
  635. return ret;
  636. }
  637. static struct uart_ops dz_ops = {
  638. .tx_empty = dz_tx_empty,
  639. .get_mctrl = dz_get_mctrl,
  640. .set_mctrl = dz_set_mctrl,
  641. .stop_tx = dz_stop_tx,
  642. .start_tx = dz_start_tx,
  643. .stop_rx = dz_stop_rx,
  644. .enable_ms = dz_enable_ms,
  645. .break_ctl = dz_break_ctl,
  646. .startup = dz_startup,
  647. .shutdown = dz_shutdown,
  648. .set_termios = dz_set_termios,
  649. .pm = dz_pm,
  650. .type = dz_type,
  651. .release_port = dz_release_port,
  652. .request_port = dz_request_port,
  653. .config_port = dz_config_port,
  654. .verify_port = dz_verify_port,
  655. };
  656. static void __init dz_init_ports(void)
  657. {
  658. static int first = 1;
  659. unsigned long base;
  660. int line;
  661. if (!first)
  662. return;
  663. first = 0;
  664. if (mips_machtype == MACH_DS23100 || mips_machtype == MACH_DS5100)
  665. base = dec_kn_slot_base + KN01_DZ11;
  666. else
  667. base = dec_kn_slot_base + KN02_DZ11;
  668. for (line = 0; line < DZ_NB_PORT; line++) {
  669. struct dz_port *dport = &dz_mux.dport[line];
  670. struct uart_port *uport = &dport->port;
  671. dport->mux = &dz_mux;
  672. uport->irq = dec_interrupt[DEC_IRQ_DZ11];
  673. uport->fifosize = 1;
  674. uport->iotype = UPIO_MEM;
  675. uport->flags = UPF_BOOT_AUTOCONF;
  676. uport->ops = &dz_ops;
  677. uport->line = line;
  678. uport->mapbase = base;
  679. }
  680. }
  681. #ifdef CONFIG_SERIAL_DZ_CONSOLE
  682. /*
  683. * -------------------------------------------------------------------
  684. * dz_console_putchar() -- transmit a character
  685. *
  686. * Polled transmission. This is tricky. We need to mask transmit
  687. * interrupts so that they do not interfere, enable the transmitter
  688. * for the line requested and then wait till the transmit scanner
  689. * requests data for this line. But it may request data for another
  690. * line first, in which case we have to disable its transmitter and
  691. * repeat waiting till our line pops up. Only then the character may
  692. * be transmitted. Finally, the state of the transmitter mask is
  693. * restored. Welcome to the world of PDP-11!
  694. * -------------------------------------------------------------------
  695. */
  696. static void dz_console_putchar(struct uart_port *uport, int ch)
  697. {
  698. struct dz_port *dport = to_dport(uport);
  699. unsigned long flags;
  700. unsigned short csr, tcr, trdy, mask;
  701. int loops = 10000;
  702. spin_lock_irqsave(&dport->port.lock, flags);
  703. csr = dz_in(dport, DZ_CSR);
  704. dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
  705. tcr = dz_in(dport, DZ_TCR);
  706. tcr |= 1 << dport->port.line;
  707. mask = tcr;
  708. dz_out(dport, DZ_TCR, mask);
  709. iob();
  710. spin_unlock_irqrestore(&dport->port.lock, flags);
  711. do {
  712. trdy = dz_in(dport, DZ_CSR);
  713. if (!(trdy & DZ_TRDY))
  714. continue;
  715. trdy = (trdy & DZ_TLINE) >> 8;
  716. if (trdy == dport->port.line)
  717. break;
  718. mask &= ~(1 << trdy);
  719. dz_out(dport, DZ_TCR, mask);
  720. iob();
  721. udelay(2);
  722. } while (--loops);
  723. if (loops) /* Cannot send otherwise. */
  724. dz_out(dport, DZ_TDR, ch);
  725. dz_out(dport, DZ_TCR, tcr);
  726. dz_out(dport, DZ_CSR, csr);
  727. }
  728. /*
  729. * -------------------------------------------------------------------
  730. * dz_console_print ()
  731. *
  732. * dz_console_print is registered for printk.
  733. * The console must be locked when we get here.
  734. * -------------------------------------------------------------------
  735. */
  736. static void dz_console_print(struct console *co,
  737. const char *str,
  738. unsigned int count)
  739. {
  740. struct dz_port *dport = &dz_mux.dport[co->index];
  741. #ifdef DEBUG_DZ
  742. prom_printf((char *) str);
  743. #endif
  744. uart_console_write(&dport->port, str, count, dz_console_putchar);
  745. }
  746. static int __init dz_console_setup(struct console *co, char *options)
  747. {
  748. struct dz_port *dport = &dz_mux.dport[co->index];
  749. struct uart_port *uport = &dport->port;
  750. int baud = 9600;
  751. int bits = 8;
  752. int parity = 'n';
  753. int flow = 'n';
  754. int ret;
  755. ret = dz_map_port(uport);
  756. if (ret)
  757. return ret;
  758. spin_lock_init(&dport->port.lock); /* For dz_pm(). */
  759. dz_reset(dport);
  760. dz_pm(uport, 0, -1);
  761. if (options)
  762. uart_parse_options(options, &baud, &parity, &bits, &flow);
  763. return uart_set_options(&dport->port, co, baud, parity, bits, flow);
  764. }
  765. static struct uart_driver dz_reg;
  766. static struct console dz_console = {
  767. .name = "ttyS",
  768. .write = dz_console_print,
  769. .device = uart_console_device,
  770. .setup = dz_console_setup,
  771. .flags = CON_PRINTBUFFER,
  772. .index = -1,
  773. .data = &dz_reg,
  774. };
  775. static int __init dz_serial_console_init(void)
  776. {
  777. if (!IOASIC) {
  778. dz_init_ports();
  779. register_console(&dz_console);
  780. return 0;
  781. } else
  782. return -ENXIO;
  783. }
  784. console_initcall(dz_serial_console_init);
  785. #define SERIAL_DZ_CONSOLE &dz_console
  786. #else
  787. #define SERIAL_DZ_CONSOLE NULL
  788. #endif /* CONFIG_SERIAL_DZ_CONSOLE */
  789. static struct uart_driver dz_reg = {
  790. .owner = THIS_MODULE,
  791. .driver_name = "serial",
  792. .dev_name = "ttyS",
  793. .major = TTY_MAJOR,
  794. .minor = 64,
  795. .nr = DZ_NB_PORT,
  796. .cons = SERIAL_DZ_CONSOLE,
  797. };
  798. static int __init dz_init(void)
  799. {
  800. int ret, i;
  801. if (IOASIC)
  802. return -ENXIO;
  803. printk("%s%s\n", dz_name, dz_version);
  804. dz_init_ports();
  805. ret = uart_register_driver(&dz_reg);
  806. if (ret)
  807. return ret;
  808. for (i = 0; i < DZ_NB_PORT; i++)
  809. uart_add_one_port(&dz_reg, &dz_mux.dport[i].port);
  810. return 0;
  811. }
  812. module_init(dz_init);