pm8018-core.c 19 KB

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  1. /*
  2. * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #define pr_fmt(fmt) "%s: " fmt, __func__
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/string.h>
  19. #include <linux/err.h>
  20. #include <linux/msm_ssbi.h>
  21. #include <linux/mfd/core.h>
  22. #include <linux/mfd/pm8xxx/pm8018.h>
  23. #include <linux/mfd/pm8xxx/core.h>
  24. #include <linux/mfd/pm8xxx/regulator.h>
  25. #include <linux/leds-pm8xxx.h>
  26. /* PMIC PM8018 SSBI Addresses */
  27. #define REG_HWREV 0x002 /* PMIC4 revision */
  28. #define REG_HWREV_2 0x0E8 /* PMIC4 revision 2 */
  29. #define REG_MPP_BASE 0x050
  30. #define REG_IRQ_BASE 0x1BB
  31. #define REG_RTC_BASE 0x11D
  32. #define REG_TEMP_ALARM_CTRL 0x01B
  33. #define REG_TEMP_ALARM_PWM 0x09B
  34. #define PM8018_VERSION_MASK 0xFFF0
  35. #define PM8018_VERSION_VALUE 0x08F0
  36. #define PM8018_REVISION_MASK 0x000F
  37. #define REG_PM8018_PON_CNTRL_3 0x01D
  38. #define SINGLE_IRQ_RESOURCE(_name, _irq) \
  39. { \
  40. .name = _name, \
  41. .start = _irq, \
  42. .end = _irq, \
  43. .flags = IORESOURCE_IRQ, \
  44. }
  45. struct pm8018 {
  46. struct device *dev;
  47. struct pm_irq_chip *irq_chip;
  48. struct mfd_cell *mfd_regulators;
  49. struct pm8xxx_regulator_core_platform_data *regulator_cdata;
  50. u32 rev_registers;
  51. u8 restart_reason;
  52. };
  53. static int pm8018_readb(const struct device *dev, u16 addr, u8 *val)
  54. {
  55. const struct pm8xxx_drvdata *pm8018_drvdata = dev_get_drvdata(dev);
  56. const struct pm8018 *pmic = pm8018_drvdata->pm_chip_data;
  57. return msm_ssbi_read(pmic->dev->parent, addr, val, 1);
  58. }
  59. static int pm8018_writeb(const struct device *dev, u16 addr, u8 val)
  60. {
  61. const struct pm8xxx_drvdata *pm8018_drvdata = dev_get_drvdata(dev);
  62. const struct pm8018 *pmic = pm8018_drvdata->pm_chip_data;
  63. return msm_ssbi_write(pmic->dev->parent, addr, &val, 1);
  64. }
  65. static int pm8018_read_buf(const struct device *dev, u16 addr, u8 *buf,
  66. int cnt)
  67. {
  68. const struct pm8xxx_drvdata *pm8018_drvdata = dev_get_drvdata(dev);
  69. const struct pm8018 *pmic = pm8018_drvdata->pm_chip_data;
  70. return msm_ssbi_read(pmic->dev->parent, addr, buf, cnt);
  71. }
  72. static int pm8018_write_buf(const struct device *dev, u16 addr, u8 *buf,
  73. int cnt)
  74. {
  75. const struct pm8xxx_drvdata *pm8018_drvdata = dev_get_drvdata(dev);
  76. const struct pm8018 *pmic = pm8018_drvdata->pm_chip_data;
  77. return msm_ssbi_write(pmic->dev->parent, addr, buf, cnt);
  78. }
  79. static int pm8018_read_irq_stat(const struct device *dev, int irq)
  80. {
  81. const struct pm8xxx_drvdata *pm8018_drvdata = dev_get_drvdata(dev);
  82. const struct pm8018 *pmic = pm8018_drvdata->pm_chip_data;
  83. return pm8xxx_get_irq_stat(pmic->irq_chip, irq);
  84. }
  85. static enum pm8xxx_version pm8018_get_version(const struct device *dev)
  86. {
  87. const struct pm8xxx_drvdata *pm8018_drvdata = dev_get_drvdata(dev);
  88. const struct pm8018 *pmic = pm8018_drvdata->pm_chip_data;
  89. enum pm8xxx_version version = -ENODEV;
  90. if ((pmic->rev_registers & PM8018_VERSION_MASK) == PM8018_VERSION_VALUE)
  91. version = PM8XXX_VERSION_8018;
  92. return version;
  93. }
  94. static int pm8018_get_revision(const struct device *dev)
  95. {
  96. const struct pm8xxx_drvdata *pm8018_drvdata = dev_get_drvdata(dev);
  97. const struct pm8018 *pmic = pm8018_drvdata->pm_chip_data;
  98. return pmic->rev_registers & PM8018_REVISION_MASK;
  99. }
  100. static u8 pm8018_restart_reason(const struct device *dev)
  101. {
  102. const struct pm8xxx_drvdata *pm8018_drvdata = dev_get_drvdata(dev);
  103. const struct pm8018 *pmic = pm8018_drvdata->pm_chip_data;
  104. return pmic->restart_reason;
  105. }
  106. static struct pm8xxx_drvdata pm8018_drvdata = {
  107. .pmic_readb = pm8018_readb,
  108. .pmic_writeb = pm8018_writeb,
  109. .pmic_read_buf = pm8018_read_buf,
  110. .pmic_write_buf = pm8018_write_buf,
  111. .pmic_read_irq_stat = pm8018_read_irq_stat,
  112. .pmic_get_version = pm8018_get_version,
  113. .pmic_get_revision = pm8018_get_revision,
  114. .pmic_restart_reason = pm8018_restart_reason,
  115. };
  116. static const struct resource gpio_cell_resources[] __devinitconst = {
  117. [0] = {
  118. .start = PM8018_IRQ_BLOCK_BIT(PM8018_GPIO_BLOCK_START, 0),
  119. .end = PM8018_IRQ_BLOCK_BIT(PM8018_GPIO_BLOCK_START, 0)
  120. + PM8018_NR_GPIOS - 1,
  121. .flags = IORESOURCE_IRQ,
  122. },
  123. };
  124. static struct mfd_cell gpio_cell __devinitdata = {
  125. .name = PM8XXX_GPIO_DEV_NAME,
  126. .id = -1,
  127. .resources = gpio_cell_resources,
  128. .num_resources = ARRAY_SIZE(gpio_cell_resources),
  129. };
  130. static const struct resource adc_cell_resources[] __devinitconst = {
  131. SINGLE_IRQ_RESOURCE(NULL, PM8018_ADC_EOC_USR_IRQ),
  132. SINGLE_IRQ_RESOURCE(NULL, PM8018_ADC_BATT_TEMP_WARM_IRQ),
  133. SINGLE_IRQ_RESOURCE(NULL, PM8018_ADC_BATT_TEMP_COLD_IRQ),
  134. };
  135. static struct mfd_cell adc_cell __devinitdata = {
  136. .name = PM8XXX_ADC_DEV_NAME,
  137. .id = -1,
  138. .resources = adc_cell_resources,
  139. .num_resources = ARRAY_SIZE(adc_cell_resources),
  140. };
  141. static const struct resource mpp_cell_resources[] __devinitconst = {
  142. {
  143. .start = PM8018_IRQ_BLOCK_BIT(PM8018_MPP_BLOCK_START, 0),
  144. .end = PM8018_IRQ_BLOCK_BIT(PM8018_MPP_BLOCK_START, 0)
  145. + PM8018_NR_MPPS - 1,
  146. .flags = IORESOURCE_IRQ,
  147. },
  148. };
  149. static struct mfd_cell mpp_cell __devinitdata = {
  150. .name = PM8XXX_MPP_DEV_NAME,
  151. .id = -1,
  152. .resources = mpp_cell_resources,
  153. .num_resources = ARRAY_SIZE(mpp_cell_resources),
  154. };
  155. static const struct resource rtc_cell_resources[] __devinitconst = {
  156. [0] = SINGLE_IRQ_RESOURCE(NULL, PM8018_RTC_ALARM_IRQ),
  157. [1] = {
  158. .name = "pmic_rtc_base",
  159. .start = REG_RTC_BASE,
  160. .end = REG_RTC_BASE,
  161. .flags = IORESOURCE_IO,
  162. },
  163. };
  164. static struct mfd_cell rtc_cell __devinitdata = {
  165. .name = PM8XXX_RTC_DEV_NAME,
  166. .id = -1,
  167. .resources = rtc_cell_resources,
  168. .num_resources = ARRAY_SIZE(rtc_cell_resources),
  169. };
  170. static const struct resource resources_pwrkey[] __devinitconst = {
  171. SINGLE_IRQ_RESOURCE(NULL, PM8018_PWRKEY_REL_IRQ),
  172. SINGLE_IRQ_RESOURCE(NULL, PM8018_PWRKEY_PRESS_IRQ),
  173. };
  174. static struct mfd_cell pwrkey_cell __devinitdata = {
  175. .name = PM8XXX_PWRKEY_DEV_NAME,
  176. .id = -1,
  177. .num_resources = ARRAY_SIZE(resources_pwrkey),
  178. .resources = resources_pwrkey,
  179. };
  180. static struct mfd_cell misc_cell __devinitdata = {
  181. .name = PM8XXX_MISC_DEV_NAME,
  182. .id = -1,
  183. };
  184. static struct mfd_cell debugfs_cell __devinitdata = {
  185. .name = "pm8xxx-debug",
  186. .id = -1,
  187. .platform_data = "pm8018-dbg",
  188. .pdata_size = sizeof("pm8018-dbg"),
  189. };
  190. static struct mfd_cell pwm_cell __devinitdata = {
  191. .name = PM8XXX_PWM_DEV_NAME,
  192. .id = -1,
  193. };
  194. static struct mfd_cell leds_cell __devinitdata = {
  195. .name = PM8XXX_LEDS_DEV_NAME,
  196. .id = -1,
  197. };
  198. static const struct resource thermal_alarm_cell_resources[] __devinitconst = {
  199. SINGLE_IRQ_RESOURCE("pm8018_tempstat_irq", PM8018_TEMPSTAT_IRQ),
  200. SINGLE_IRQ_RESOURCE("pm8018_overtemp_irq", PM8018_OVERTEMP_IRQ),
  201. };
  202. static struct pm8xxx_tm_core_data thermal_alarm_cdata = {
  203. .adc_channel = CHANNEL_DIE_TEMP,
  204. .adc_type = PM8XXX_TM_ADC_PM8XXX_ADC,
  205. .reg_addr_temp_alarm_ctrl = REG_TEMP_ALARM_CTRL,
  206. .reg_addr_temp_alarm_pwm = REG_TEMP_ALARM_PWM,
  207. .tm_name = "pm8018_tz",
  208. .irq_name_temp_stat = "pm8018_tempstat_irq",
  209. .irq_name_over_temp = "pm8018_overtemp_irq",
  210. };
  211. static struct mfd_cell thermal_alarm_cell __devinitdata = {
  212. .name = PM8XXX_TM_DEV_NAME,
  213. .id = -1,
  214. .resources = thermal_alarm_cell_resources,
  215. .num_resources = ARRAY_SIZE(thermal_alarm_cell_resources),
  216. .platform_data = &thermal_alarm_cdata,
  217. .pdata_size = sizeof(struct pm8xxx_tm_core_data),
  218. };
  219. static struct pm8xxx_vreg regulator_data[] = {
  220. /* name pc_name ctrl test hpm_min */
  221. PLDO("8018_l2", "8018_l2_pc", 0x0B0, 0x0B1, LDO_50),
  222. PLDO("8018_l3", "8018_l3_pc", 0x0B2, 0x0B3, LDO_50),
  223. PLDO("8018_l4", "8018_l4_pc", 0x0B4, 0x0B5, LDO_300),
  224. PLDO("8018_l5", "8018_l5_pc", 0x0B6, 0x0B7, LDO_150),
  225. PLDO("8018_l6", "8018_l6_pc", 0x0B8, 0x0B9, LDO_150),
  226. PLDO("8018_l7", "8018_l7_pc", 0x0BA, 0x0BB, LDO_300),
  227. NLDO("8018_l8", "8018_l8_pc", 0x0BC, 0x0BD, LDO_150),
  228. NLDO1200("8018_l9", 0x0BE, 0x0BF, LDO_1200),
  229. NLDO1200("8018_l10", 0x0C0, 0x0C1, LDO_1200),
  230. NLDO1200("8018_l11", 0x0C2, 0x0C3, LDO_1200),
  231. NLDO1200("8018_l12", 0x0C4, 0x0C5, LDO_1200),
  232. PLDO("8018_l13", "8018_l13_pc", 0x0C8, 0x0C9, LDO_50),
  233. PLDO("8018_l14", "8018_l14_pc", 0x0CA, 0x0CB, LDO_50),
  234. /* name pc_name ctrl test2 clk sleep hpm_min */
  235. SMPS("8018_s1", "8018_s1_pc", 0x1D0, 0x1D5, 0x009, 0x1D2, SMPS_1500),
  236. SMPS("8018_s2", "8018_s2_pc", 0x1D8, 0x1DD, 0x00A, 0x1DA, SMPS_1500),
  237. SMPS("8018_s3", "8018_s3_pc", 0x1E0, 0x1E5, 0x00B, 0x1E2, SMPS_1500),
  238. SMPS("8018_s4", "8018_s4_pc", 0x1E8, 0x1ED, 0x00C, 0x1EA, SMPS_1500),
  239. SMPS("8018_s5", "8018_s5_pc", 0x1F0, 0x1F5, 0x00D, 0x1F2, SMPS_1500),
  240. /* name pc_name ctrl test */
  241. VS("8018_lvs1", "8018_lvs1_pc", 0x060, 0x061),
  242. };
  243. #define MAX_NAME_COMPARISON_LEN 32
  244. static int __devinit match_regulator(
  245. struct pm8xxx_regulator_core_platform_data *core_data, const char *name)
  246. {
  247. int found = 0;
  248. int i;
  249. for (i = 0; i < ARRAY_SIZE(regulator_data); i++) {
  250. if (regulator_data[i].rdesc.name
  251. && strncmp(regulator_data[i].rdesc.name, name,
  252. MAX_NAME_COMPARISON_LEN) == 0) {
  253. core_data->is_pin_controlled = false;
  254. core_data->vreg = &regulator_data[i];
  255. found = 1;
  256. break;
  257. } else if (regulator_data[i].rdesc_pc.name
  258. && strncmp(regulator_data[i].rdesc_pc.name, name,
  259. MAX_NAME_COMPARISON_LEN) == 0) {
  260. core_data->is_pin_controlled = true;
  261. core_data->vreg = &regulator_data[i];
  262. found = 1;
  263. break;
  264. }
  265. }
  266. if (!found)
  267. pr_err("could not find a match for regulator: %s\n", name);
  268. return found;
  269. }
  270. static int __devinit
  271. pm8018_add_regulators(const struct pm8018_platform_data *pdata,
  272. struct pm8018 *pmic, int irq_base)
  273. {
  274. int ret = 0;
  275. struct mfd_cell *mfd_regulators;
  276. struct pm8xxx_regulator_core_platform_data *cdata;
  277. int i;
  278. /* Add one device for each regulator used by the board. */
  279. mfd_regulators = kzalloc(sizeof(struct mfd_cell)
  280. * (pdata->num_regulators), GFP_KERNEL);
  281. if (!mfd_regulators) {
  282. pr_err("Cannot allocate %d bytes for pm8018 regulator "
  283. "mfd cells\n", sizeof(struct mfd_cell)
  284. * (pdata->num_regulators));
  285. return -ENOMEM;
  286. }
  287. cdata = kzalloc(sizeof(struct pm8xxx_regulator_core_platform_data)
  288. * pdata->num_regulators, GFP_KERNEL);
  289. if (!cdata) {
  290. pr_err("Cannot allocate %d bytes for pm8018 regulator "
  291. "core data\n", pdata->num_regulators
  292. * sizeof(struct pm8xxx_regulator_core_platform_data));
  293. kfree(mfd_regulators);
  294. return -ENOMEM;
  295. }
  296. for (i = 0; i < ARRAY_SIZE(regulator_data); i++)
  297. mutex_init(&regulator_data[i].pc_lock);
  298. for (i = 0; i < pdata->num_regulators; i++) {
  299. if (!pdata->regulator_pdatas[i].init_data.constraints.name) {
  300. pr_err("name missing for regulator %d\n", i);
  301. ret = -EINVAL;
  302. goto bail;
  303. }
  304. if (!match_regulator(&cdata[i],
  305. pdata->regulator_pdatas[i].init_data.constraints.name)) {
  306. ret = -ENODEV;
  307. goto bail;
  308. }
  309. cdata[i].pdata = &(pdata->regulator_pdatas[i]);
  310. mfd_regulators[i].name = PM8XXX_REGULATOR_DEV_NAME;
  311. mfd_regulators[i].id = cdata[i].pdata->id;
  312. mfd_regulators[i].platform_data = &cdata[i];
  313. mfd_regulators[i].pdata_size =
  314. sizeof(struct pm8xxx_regulator_core_platform_data);
  315. }
  316. ret = mfd_add_devices(pmic->dev, 0, mfd_regulators,
  317. pdata->num_regulators, NULL, irq_base);
  318. if (ret)
  319. goto bail;
  320. pmic->mfd_regulators = mfd_regulators;
  321. pmic->regulator_cdata = cdata;
  322. return ret;
  323. bail:
  324. for (i = 0; i < ARRAY_SIZE(regulator_data); i++)
  325. mutex_destroy(&regulator_data[i].pc_lock);
  326. kfree(mfd_regulators);
  327. kfree(cdata);
  328. return ret;
  329. }
  330. static int __devinit
  331. pm8018_add_subdevices(const struct pm8018_platform_data *pdata,
  332. struct pm8018 *pmic)
  333. {
  334. int ret = 0, irq_base = 0;
  335. struct pm_irq_chip *irq_chip;
  336. if (pdata->irq_pdata) {
  337. pdata->irq_pdata->irq_cdata.nirqs = PM8018_NR_IRQS;
  338. pdata->irq_pdata->irq_cdata.base_addr = REG_IRQ_BASE;
  339. irq_base = pdata->irq_pdata->irq_base;
  340. irq_chip = pm8xxx_irq_init(pmic->dev, pdata->irq_pdata);
  341. if (IS_ERR(irq_chip)) {
  342. pr_err("Failed to init interrupts ret=%ld\n",
  343. PTR_ERR(irq_chip));
  344. return PTR_ERR(irq_chip);
  345. }
  346. pmic->irq_chip = irq_chip;
  347. }
  348. if (pdata->gpio_pdata) {
  349. pdata->gpio_pdata->gpio_cdata.ngpios = PM8018_NR_GPIOS;
  350. gpio_cell.platform_data = pdata->gpio_pdata;
  351. gpio_cell.pdata_size = sizeof(struct pm8xxx_gpio_platform_data);
  352. ret = mfd_add_devices(pmic->dev, 0, &gpio_cell, 1,
  353. NULL, irq_base);
  354. if (ret) {
  355. pr_err("Failed to add gpio subdevice ret=%d\n", ret);
  356. goto bail;
  357. }
  358. }
  359. if (pdata->mpp_pdata) {
  360. pdata->mpp_pdata->core_data.nmpps = PM8018_NR_MPPS;
  361. pdata->mpp_pdata->core_data.base_addr = REG_MPP_BASE;
  362. mpp_cell.platform_data = pdata->mpp_pdata;
  363. mpp_cell.pdata_size = sizeof(struct pm8xxx_mpp_platform_data);
  364. ret = mfd_add_devices(pmic->dev, 0, &mpp_cell, 1, NULL,
  365. irq_base);
  366. if (ret) {
  367. pr_err("Failed to add mpp subdevice ret=%d\n", ret);
  368. goto bail;
  369. }
  370. }
  371. if (pdata->rtc_pdata) {
  372. rtc_cell.platform_data = pdata->rtc_pdata;
  373. rtc_cell.pdata_size = sizeof(struct pm8xxx_rtc_platform_data);
  374. ret = mfd_add_devices(pmic->dev, 0, &rtc_cell, 1, NULL,
  375. irq_base);
  376. if (ret) {
  377. pr_err("Failed to add rtc subdevice ret=%d\n", ret);
  378. goto bail;
  379. }
  380. }
  381. if (pdata->pwrkey_pdata) {
  382. pwrkey_cell.platform_data = pdata->pwrkey_pdata;
  383. pwrkey_cell.pdata_size =
  384. sizeof(struct pm8xxx_pwrkey_platform_data);
  385. ret = mfd_add_devices(pmic->dev, 0, &pwrkey_cell, 1, NULL,
  386. irq_base);
  387. if (ret) {
  388. pr_err("Failed to add pwrkey subdevice ret=%d\n", ret);
  389. goto bail;
  390. }
  391. }
  392. if (pdata->misc_pdata) {
  393. misc_cell.platform_data = pdata->misc_pdata;
  394. misc_cell.pdata_size = sizeof(struct pm8xxx_misc_platform_data);
  395. ret = mfd_add_devices(pmic->dev, 0, &misc_cell, 1, NULL,
  396. irq_base);
  397. if (ret) {
  398. pr_err("Failed to add misc subdevice ret=%d\n", ret);
  399. goto bail;
  400. }
  401. }
  402. if (pdata->adc_pdata) {
  403. adc_cell.platform_data = pdata->adc_pdata;
  404. adc_cell.pdata_size = sizeof(struct pm8xxx_adc_platform_data);
  405. ret = mfd_add_devices(pmic->dev, 0, &adc_cell, 1, NULL,
  406. irq_base);
  407. if (ret) {
  408. pr_err("Failed to add adc subdevice ret=%d\n", ret);
  409. }
  410. }
  411. if (pdata->leds_pdata) {
  412. leds_cell.platform_data = pdata->leds_pdata;
  413. leds_cell.pdata_size = sizeof(struct pm8xxx_led_platform_data);
  414. ret = mfd_add_devices(pmic->dev, 0, &leds_cell, 1, NULL, 0);
  415. if (ret) {
  416. pr_err("Failed to add leds subdevice ret=%d\n", ret);
  417. goto bail;
  418. }
  419. }
  420. ret = mfd_add_devices(pmic->dev, 0, &debugfs_cell, 1, NULL, irq_base);
  421. if (ret) {
  422. pr_err("Failed to add debugfs subdevice ret=%d\n", ret);
  423. goto bail;
  424. }
  425. ret = mfd_add_devices(pmic->dev, 0, &pwm_cell, 1, NULL, 0);
  426. if (ret) {
  427. pr_err("Failed to add pwm subdevice ret=%d\n", ret);
  428. goto bail;
  429. }
  430. if (pdata->num_regulators > 0 && pdata->regulator_pdatas) {
  431. ret = pm8018_add_regulators(pdata, pmic, irq_base);
  432. if (ret) {
  433. pr_err("Failed to add regulator subdevices ret=%d\n",
  434. ret);
  435. goto bail;
  436. }
  437. }
  438. ret = mfd_add_devices(pmic->dev, 0, &thermal_alarm_cell, 1, NULL,
  439. irq_base);
  440. if (ret) {
  441. pr_err("Failed to add thermal alarm subdevice, ret=%d\n", ret);
  442. goto bail;
  443. }
  444. return 0;
  445. bail:
  446. if (pmic->irq_chip) {
  447. pm8xxx_irq_exit(pmic->irq_chip);
  448. pmic->irq_chip = NULL;
  449. }
  450. return ret;
  451. }
  452. static const char * const pm8018_rev_names[] = {
  453. [PM8XXX_REVISION_8018_TEST] = "test",
  454. [PM8XXX_REVISION_8018_1p0] = "1.0",
  455. [PM8XXX_REVISION_8018_2p0] = "2.0",
  456. [PM8XXX_REVISION_8018_2p1] = "2.1",
  457. };
  458. static int __devinit pm8018_probe(struct platform_device *pdev)
  459. {
  460. const struct pm8018_platform_data *pdata = pdev->dev.platform_data;
  461. const char *revision_name = "unknown";
  462. struct pm8018 *pmic;
  463. enum pm8xxx_version version;
  464. int revision;
  465. int rc;
  466. u8 val;
  467. if (!pdata) {
  468. pr_err("missing platform data\n");
  469. return -EINVAL;
  470. }
  471. pmic = kzalloc(sizeof(struct pm8018), GFP_KERNEL);
  472. if (!pmic) {
  473. pr_err("Cannot alloc pm8018 struct\n");
  474. return -ENOMEM;
  475. }
  476. /* Read PMIC chip revision */
  477. rc = msm_ssbi_read(pdev->dev.parent, REG_HWREV, &val, sizeof(val));
  478. if (rc) {
  479. pr_err("Failed to read hw rev 1 reg %d:rc=%d\n", REG_HWREV, rc);
  480. goto err_read_rev;
  481. }
  482. pr_info("PMIC revision 1: %02X\n", val);
  483. pmic->rev_registers = val;
  484. /* Read PMIC chip revision 2 */
  485. rc = msm_ssbi_read(pdev->dev.parent, REG_HWREV_2, &val, sizeof(val));
  486. if (rc) {
  487. pr_err("Failed to read hw rev 2 reg %d:rc=%d\n", REG_HWREV_2,
  488. rc);
  489. goto err_read_rev;
  490. }
  491. pr_info("PMIC revision 2: %02X\n", val);
  492. pmic->rev_registers |= val << BITS_PER_BYTE;
  493. pmic->dev = &pdev->dev;
  494. pm8018_drvdata.pm_chip_data = pmic;
  495. platform_set_drvdata(pdev, &pm8018_drvdata);
  496. /* Print out human readable version and revision names. */
  497. version = pm8xxx_get_version(pmic->dev);
  498. if (version == PM8XXX_VERSION_8018) {
  499. revision = pm8xxx_get_revision(pmic->dev);
  500. if (revision >= 0 && revision < ARRAY_SIZE(pm8018_rev_names))
  501. revision_name = pm8018_rev_names[revision];
  502. pr_info("PMIC version: PM8018 rev %s\n", revision_name);
  503. } else {
  504. WARN_ON(version != PM8XXX_VERSION_8018);
  505. }
  506. /* Log human readable restart reason */
  507. rc = msm_ssbi_read(pdev->dev.parent, REG_PM8018_PON_CNTRL_3, &val, 1);
  508. if (rc) {
  509. pr_err("Cannot read restart reason rc=%d\n", rc);
  510. goto err_read_rev;
  511. }
  512. val &= PM8XXX_RESTART_REASON_MASK;
  513. pr_info("PMIC Restart Reason: %s\n", pm8xxx_restart_reason_str[val]);
  514. pmic->restart_reason = val;
  515. rc = pm8018_add_subdevices(pdata, pmic);
  516. if (rc) {
  517. pr_err("Cannot add subdevices rc=%d\n", rc);
  518. goto err;
  519. }
  520. /* gpio might not work if no irq device is found */
  521. WARN_ON(pmic->irq_chip == NULL);
  522. return 0;
  523. err:
  524. mfd_remove_devices(pmic->dev);
  525. platform_set_drvdata(pdev, NULL);
  526. kfree(pmic->mfd_regulators);
  527. kfree(pmic->regulator_cdata);
  528. err_read_rev:
  529. kfree(pmic);
  530. return rc;
  531. }
  532. static int __devexit pm8018_remove(struct platform_device *pdev)
  533. {
  534. struct pm8xxx_drvdata *drvdata;
  535. struct pm8018 *pmic = NULL;
  536. int i;
  537. drvdata = platform_get_drvdata(pdev);
  538. if (drvdata)
  539. pmic = drvdata->pm_chip_data;
  540. if (pmic) {
  541. if (pmic->dev)
  542. mfd_remove_devices(pmic->dev);
  543. if (pmic->irq_chip) {
  544. pm8xxx_irq_exit(pmic->irq_chip);
  545. pmic->irq_chip = NULL;
  546. }
  547. if (pmic->mfd_regulators) {
  548. for (i = 0; i < ARRAY_SIZE(regulator_data); i++)
  549. mutex_destroy(&regulator_data[i].pc_lock);
  550. }
  551. kfree(pmic->mfd_regulators);
  552. kfree(pmic->regulator_cdata);
  553. kfree(pmic);
  554. }
  555. platform_set_drvdata(pdev, NULL);
  556. return 0;
  557. }
  558. static struct platform_driver pm8018_driver = {
  559. .probe = pm8018_probe,
  560. .remove = __devexit_p(pm8018_remove),
  561. .driver = {
  562. .name = PM8018_CORE_DEV_NAME,
  563. .owner = THIS_MODULE,
  564. },
  565. };
  566. static int __init pm8018_init(void)
  567. {
  568. return platform_driver_register(&pm8018_driver);
  569. }
  570. postcore_initcall(pm8018_init);
  571. static void __exit pm8018_exit(void)
  572. {
  573. platform_driver_unregister(&pm8018_driver);
  574. }
  575. module_exit(pm8018_exit);
  576. MODULE_LICENSE("GPL v2");
  577. MODULE_DESCRIPTION("PMIC 8018 core driver");
  578. MODULE_VERSION("1.0");
  579. MODULE_ALIAS("platform:" PM8018_CORE_DEV_NAME);