regulator.h 9.4 KB

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  1. /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #ifndef __MFD_PM8XXX_REGULATOR_H__
  13. #define __MFD_PM8XXX_REGULATOR_H__
  14. #include <linux/mutex.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/regulator/driver.h>
  17. #include <linux/regulator/pm8xxx-regulator.h>
  18. /**
  19. * enum pm8xxx_regulator_type - possible PM8XXX voltage regulator types
  20. * %PM8XXX_REGULATOR_TYPE_PLDO: PMOS low drop-out linear regulator
  21. * %PM8XXX_REGULATOR_TYPE_NLDO: NMOS low drop-out linear regulator
  22. * %PM8XXX_REGULATOR_TYPE_NLDO1200: NMOS low drop-out linear regulator
  23. * capable of supplying up to 1200 mA
  24. * %PM8XXX_REGULATOR_TYPE_SMPS: switched-mode power supply (buck)
  25. * %PM8XXX_REGULATOR_TYPE_FTSMPS: fast transient switched-mode power
  26. * supply (buck)
  27. * %PM8XXX_REGULATOR_TYPE_VS: voltage switch capable of sourcing 100mA
  28. * %PM8XXX_REGULATOR_TYPE_VS300: voltage switch capable of sourcing 300mA
  29. * %PM8XXX_REGULATOR_TYPE_NCP: negative charge pump
  30. * %PM8XXX_REGULATOR_TYPE_BOOST: boost regulator
  31. * %PM8XXX_REGULATOR_TYPE_MAX: used internally for error checking; not
  32. * a valid regulator type.
  33. *
  34. * Each of these has a different register control interface.
  35. */
  36. enum pm8xxx_regulator_type {
  37. PM8XXX_REGULATOR_TYPE_PLDO,
  38. PM8XXX_REGULATOR_TYPE_NLDO,
  39. PM8XXX_REGULATOR_TYPE_NLDO1200,
  40. PM8XXX_REGULATOR_TYPE_SMPS,
  41. PM8XXX_REGULATOR_TYPE_FTSMPS,
  42. PM8XXX_REGULATOR_TYPE_VS,
  43. PM8XXX_REGULATOR_TYPE_VS300,
  44. PM8XXX_REGULATOR_TYPE_NCP,
  45. PM8XXX_REGULATOR_TYPE_BOOST,
  46. PM8XXX_REGULATOR_TYPE_MAX,
  47. };
  48. /**
  49. * struct pm8xxx_vreg - regulator configuration and state data used by the
  50. * pm8xxx-regulator driver
  51. * @rdesc: regulator description
  52. * @rdesc_pc: pin control regulator description. rdesc_pc.name == NULL
  53. * implies that there is no pin control version of this
  54. * regulator.
  55. * @type: regulator type
  56. * @hpm_min_load: minimum load in uA that will result in the regulator
  57. * being set to high power mode
  58. * @ctrl_addr: control register SSBI address
  59. * @test_addr: test register SSBI address (not needed for all types)
  60. * @clk_ctrl_addr: clock control register SSBI address (only used by SMPS
  61. * type regulators)
  62. * @sleep_ctrl_addr: sleep control register SSBI address (only used by SMPS
  63. * type regulators)
  64. * @pfm_ctrl_addr: pulse-frequency modulation control register SSBI address
  65. * (only used by FTSMPS type regulators)
  66. * @pwr_cnfg_addr: power configuration register SSBI address (only used by
  67. * FTSMPS type regulators)
  68. * @pdata: this platform data struct is filled based using the
  69. * platform data pointed to in a core platform data struct
  70. * @rdev: pointer to regulator device which is created with
  71. * regulator_register
  72. * @rdev_pc: pointer to pin controlled regulator device which is
  73. * created with regulator_register
  74. * @dev: pointer to pm8xxx-regulator device
  75. * @dev_pc: pointer to pin control pm8xxx-regulator device
  76. * @pc_lock: mutex lock to handle sharing between pin controlled and
  77. * non-pin controlled versions of a given regulator. Note,
  78. * this lock must be initialized in the PMIC core driver.)
  79. * @save_uV: current regulator voltage in uV
  80. * @mode: current mode of the regulator
  81. * @write_count: number of SSBI writes that have taken place for this
  82. * regulator. This is used for debug printing to determine
  83. * if a given operation is redundant.
  84. * @prev_write_count: number of SSBI writes that have taken place for this
  85. * regulator at the start of an operation. This is used for
  86. * debug printing to determine if a given operation is
  87. * redundant.
  88. * @is_enabled: true if the regulator is currently enabled, false if not
  89. * @is_enabled_pc: true if the pin controlled version of the regulator is
  90. * currently enabled (i.e. pin control is active), false if
  91. * not
  92. * @test_reg: last value read from or written to each of the banks of
  93. * the test register
  94. * @ctrl_reg: last value read from or written to the control register
  95. * @clk_ctrl_reg: last value read from or written to the clock control
  96. * register
  97. * @sleep_ctrl_reg: last value read from or written to the sleep control
  98. * register
  99. * @pfm_ctrl_reg: last value read from or written to the PFM control
  100. * register
  101. * @pwr_cnfg_reg: last value read from or written to the power
  102. * configuration register
  103. *
  104. * This data structure should only need to be instantiated in a PMIC core driver
  105. * It is used to specify PMIC specific as opposed to board specific
  106. * configuration data. It is also used to hold all state variables needed by
  107. * the pm8xxx-regulator driver as these variables need to be shared between
  108. * pin controlled and non-pin controlled versions of a given regulator, which
  109. * are probed separately.
  110. */
  111. struct pm8xxx_vreg {
  112. /* Configuration data */
  113. struct regulator_desc rdesc;
  114. struct regulator_desc rdesc_pc;
  115. enum pm8xxx_regulator_type type;
  116. const int hpm_min_load;
  117. const u16 ctrl_addr;
  118. const u16 test_addr;
  119. const u16 clk_ctrl_addr;
  120. const u16 sleep_ctrl_addr;
  121. const u16 pfm_ctrl_addr;
  122. const u16 pwr_cnfg_addr;
  123. /* State data */
  124. struct pm8xxx_regulator_platform_data pdata;
  125. struct regulator_dev *rdev;
  126. struct regulator_dev *rdev_pc;
  127. struct device *dev;
  128. struct device *dev_pc;
  129. struct mutex pc_lock;
  130. int save_uV;
  131. int mode;
  132. u32 write_count;
  133. u32 prev_write_count;
  134. bool is_enabled;
  135. bool is_enabled_pc;
  136. u8 test_reg[REGULATOR_TEST_BANKS_MAX];
  137. u8 ctrl_reg;
  138. u8 clk_ctrl_reg;
  139. u8 sleep_ctrl_reg;
  140. u8 pfm_ctrl_reg;
  141. u8 pwr_cnfg_reg;
  142. };
  143. /**
  144. * struct pm8xxx_regulator_core_platform_data - platform data specified in a
  145. * PMIC core driver and utilized in the pm8xxx-regulator driver
  146. * @vreg: pointer to pm8xxx_vreg data structure that may be shared
  147. * between pin controlled and non-pin controlled versions
  148. * of a given regulator. Note that this data must persist
  149. * as long as the regulator device is in use.
  150. * @pdata: pointer to platform data passed in from a board file
  151. * @is_pin_controlled: true if the regulator driver represents the pin control
  152. * portion of a regulator, false if not.
  153. *
  154. * This data structure should only be needed in a PMIC core driver.
  155. */
  156. struct pm8xxx_regulator_core_platform_data {
  157. struct pm8xxx_vreg *vreg;
  158. struct pm8xxx_regulator_platform_data *pdata;
  159. bool is_pin_controlled;
  160. };
  161. /* Helper macros */
  162. #define PLDO(_name, _pc_name, _ctrl_addr, _test_addr, _hpm_min_load) \
  163. { \
  164. .type = PM8XXX_REGULATOR_TYPE_PLDO, \
  165. .ctrl_addr = _ctrl_addr, \
  166. .test_addr = _test_addr, \
  167. .hpm_min_load = PM8XXX_VREG_##_hpm_min_load##_HPM_MIN_LOAD, \
  168. .rdesc.name = _name, \
  169. .rdesc_pc.name = _pc_name, \
  170. .write_count = 0, \
  171. .prev_write_count = -1, \
  172. }
  173. #define NLDO(_name, _pc_name, _ctrl_addr, _test_addr, _hpm_min_load) \
  174. { \
  175. .type = PM8XXX_REGULATOR_TYPE_NLDO, \
  176. .ctrl_addr = _ctrl_addr, \
  177. .test_addr = _test_addr, \
  178. .hpm_min_load = PM8XXX_VREG_##_hpm_min_load##_HPM_MIN_LOAD, \
  179. .rdesc.name = _name, \
  180. .rdesc_pc.name = _pc_name, \
  181. .write_count = 0, \
  182. .prev_write_count = -1, \
  183. }
  184. #define NLDO1200(_name, _ctrl_addr, _test_addr, _hpm_min_load) \
  185. { \
  186. .type = PM8XXX_REGULATOR_TYPE_NLDO1200, \
  187. .ctrl_addr = _ctrl_addr, \
  188. .test_addr = _test_addr, \
  189. .hpm_min_load = PM8XXX_VREG_##_hpm_min_load##_HPM_MIN_LOAD, \
  190. .rdesc.name = _name, \
  191. .write_count = 0, \
  192. .prev_write_count = -1, \
  193. }
  194. #define SMPS(_name, _pc_name, _ctrl_addr, _test_addr, _clk_ctrl_addr, \
  195. _sleep_ctrl_addr, _hpm_min_load) \
  196. { \
  197. .type = PM8XXX_REGULATOR_TYPE_SMPS, \
  198. .ctrl_addr = _ctrl_addr, \
  199. .test_addr = _test_addr, \
  200. .clk_ctrl_addr = _clk_ctrl_addr, \
  201. .sleep_ctrl_addr = _sleep_ctrl_addr, \
  202. .hpm_min_load = PM8XXX_VREG_##_hpm_min_load##_HPM_MIN_LOAD, \
  203. .rdesc.name = _name, \
  204. .rdesc_pc.name = _pc_name, \
  205. .write_count = 0, \
  206. .prev_write_count = -1, \
  207. }
  208. #define FTSMPS(_name, _pwm_ctrl_addr, _fts_cnfg1_addr, _pfm_ctrl_addr, \
  209. _pwr_cnfg_addr, _hpm_min_load) \
  210. { \
  211. .type = PM8XXX_REGULATOR_TYPE_FTSMPS, \
  212. .ctrl_addr = _pwm_ctrl_addr, \
  213. .test_addr = _fts_cnfg1_addr, \
  214. .pfm_ctrl_addr = _pfm_ctrl_addr, \
  215. .pwr_cnfg_addr = _pwr_cnfg_addr, \
  216. .hpm_min_load = PM8XXX_VREG_##_hpm_min_load##_HPM_MIN_LOAD, \
  217. .rdesc.name = _name, \
  218. .write_count = 0, \
  219. .prev_write_count = -1, \
  220. }
  221. #define VS(_name, _pc_name, _ctrl_addr, _test_addr) \
  222. { \
  223. .type = PM8XXX_REGULATOR_TYPE_VS, \
  224. .ctrl_addr = _ctrl_addr, \
  225. .test_addr = _test_addr, \
  226. .rdesc.name = _name, \
  227. .rdesc_pc.name = _pc_name, \
  228. .write_count = 0, \
  229. .prev_write_count = -1, \
  230. }
  231. #define VS300(_name, _ctrl_addr, _test_addr) \
  232. { \
  233. .type = PM8XXX_REGULATOR_TYPE_VS300, \
  234. .ctrl_addr = _ctrl_addr, \
  235. .test_addr = _test_addr, \
  236. .rdesc.name = _name, \
  237. .write_count = 0, \
  238. .prev_write_count = -1, \
  239. }
  240. #define NCP(_name, _ctrl_addr) \
  241. { \
  242. .type = PM8XXX_REGULATOR_TYPE_NCP, \
  243. .ctrl_addr = _ctrl_addr, \
  244. .rdesc.name = _name, \
  245. .write_count = 0, \
  246. .prev_write_count = -1, \
  247. }
  248. #define BOOST(_name, _ctrl_addr) \
  249. { \
  250. .type = PM8XXX_REGULATOR_TYPE_BOOST, \
  251. .ctrl_addr = _ctrl_addr, \
  252. .rdesc.name = _name, \
  253. .write_count = 0, \
  254. .prev_write_count = -1, \
  255. }
  256. #endif