misc.h 8.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299
  1. /*
  2. * Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #ifndef __MFD_PM8XXX_MISC_H__
  14. #define __MFD_PM8XXX_MISC_H__
  15. #include <linux/err.h>
  16. #define PM8XXX_MISC_DEV_NAME "pm8xxx-misc"
  17. /**
  18. * struct pm8xxx_misc_platform_data - PM8xxx misc driver platform data
  19. * @priority: PMIC prority level in a multi-PMIC system. Lower value means
  20. * greater priority. Actions are performed from highest to lowest
  21. * priority PMIC.
  22. */
  23. struct pm8xxx_misc_platform_data {
  24. int priority;
  25. };
  26. enum pm8xxx_uart_path_sel {
  27. UART_NONE,
  28. UART_TX1_RX1,
  29. UART_TX2_RX2,
  30. UART_TX3_RX3,
  31. };
  32. enum pm8xxx_coincell_chg_voltage {
  33. PM8XXX_COINCELL_VOLTAGE_3p2V = 1,
  34. PM8XXX_COINCELL_VOLTAGE_3p1V,
  35. PM8XXX_COINCELL_VOLTAGE_3p0V,
  36. PM8XXX_COINCELL_VOLTAGE_2p5V = 16
  37. };
  38. enum pm8xxx_coincell_chg_resistor {
  39. PM8XXX_COINCELL_RESISTOR_2100_OHMS,
  40. PM8XXX_COINCELL_RESISTOR_1700_OHMS,
  41. PM8XXX_COINCELL_RESISTOR_1200_OHMS,
  42. PM8XXX_COINCELL_RESISTOR_800_OHMS
  43. };
  44. enum pm8xxx_coincell_chg_state {
  45. PM8XXX_COINCELL_CHG_DISABLE,
  46. PM8XXX_COINCELL_CHG_ENABLE
  47. };
  48. struct pm8xxx_coincell_chg {
  49. enum pm8xxx_coincell_chg_state state;
  50. enum pm8xxx_coincell_chg_voltage voltage;
  51. enum pm8xxx_coincell_chg_resistor resistor;
  52. };
  53. enum pm8xxx_smpl_delay {
  54. PM8XXX_SMPL_DELAY_0p5,
  55. PM8XXX_SMPL_DELAY_1p0,
  56. PM8XXX_SMPL_DELAY_1p5,
  57. PM8XXX_SMPL_DELAY_2p0,
  58. };
  59. enum pm8xxx_pon_config {
  60. PM8XXX_DISABLE_HARD_RESET = 0,
  61. PM8XXX_SHUTDOWN_ON_HARD_RESET,
  62. PM8XXX_RESTART_ON_HARD_RESET,
  63. };
  64. enum pm8xxx_aux_clk_id {
  65. CLK_MP3_1,
  66. CLK_MP3_2,
  67. };
  68. enum pm8xxx_aux_clk_div {
  69. XO_DIV_NONE,
  70. XO_DIV_1,
  71. XO_DIV_2,
  72. XO_DIV_4,
  73. XO_DIV_8,
  74. XO_DIV_16,
  75. XO_DIV_32,
  76. XO_DIV_64,
  77. };
  78. enum pm8xxx_hsed_bias {
  79. PM8XXX_HSED_BIAS0,
  80. PM8XXX_HSED_BIAS1,
  81. PM8XXX_HSED_BIAS2,
  82. };
  83. #if defined(CONFIG_MFD_PM8XXX_MISC) || defined(CONFIG_MFD_PM8XXX_MISC_MODULE)
  84. /**
  85. * pm8xxx_reset_pwr_off - switch all PM8XXX PMIC chips attached to the system to
  86. * either reset or shutdown when they are turned off
  87. * @reset: 0 = shudown the PMICs, 1 = shutdown and then restart the PMICs
  88. *
  89. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  90. */
  91. int pm8xxx_reset_pwr_off(int reset);
  92. int pm8xxx_uart_gpio_mux_ctrl(enum pm8xxx_uart_path_sel uart_path_sel);
  93. /**
  94. * pm8xxx_coincell_chg_config - Disables or enables the coincell charger, and
  95. * configures its voltage and resistor settings.
  96. * @chg_config: Holds both voltage and resistor values, and a
  97. * switch to change the state of charger.
  98. * If state is to disable the charger then
  99. * both voltage and resistor are disregarded.
  100. *
  101. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  102. */
  103. int pm8xxx_coincell_chg_config(struct pm8xxx_coincell_chg *chg_config);
  104. /**
  105. * pm8xxx_smpl_control - enables/disables SMPL detection
  106. * @enable: 0 = shutdown PMIC on power loss, 1 = reset PMIC on power loss
  107. *
  108. * This function enables or disables the Sudden Momentary Power Loss detection
  109. * module. If SMPL detection is enabled, then when a sufficiently long power
  110. * loss event occurs, the PMIC will automatically reset itself. If SMPL
  111. * detection is disabled, then the PMIC will shutdown when power loss occurs.
  112. *
  113. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  114. */
  115. int pm8xxx_smpl_control(int enable);
  116. /**
  117. * pm8xxx_smpl_set_delay - sets the SMPL detection time delay
  118. * @delay: enum value corresponding to delay time
  119. *
  120. * This function sets the time delay of the SMPL detection module. If power
  121. * is reapplied within this interval, then the PMIC reset automatically. The
  122. * SMPL detection module must be enabled for this delay time to take effect.
  123. *
  124. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  125. */
  126. int pm8xxx_smpl_set_delay(enum pm8xxx_smpl_delay delay);
  127. /**
  128. * pm8xxx_watchdog_reset_control - enables/disables watchdog reset detection
  129. * @enable: 0 = shutdown when PS_HOLD goes low, 1 = reset when PS_HOLD goes low
  130. *
  131. * This function enables or disables the PMIC watchdog reset detection feature.
  132. * If watchdog reset detection is enabled, then the PMIC will reset itself
  133. * when PS_HOLD goes low. If it is not enabled, then the PMIC will shutdown
  134. * when PS_HOLD goes low.
  135. *
  136. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  137. */
  138. int pm8xxx_watchdog_reset_control(int enable);
  139. /**
  140. * pm8xxx_hard_reset_config - Allows different reset configurations
  141. *
  142. * config = DISABLE_HARD_RESET to disable hard reset
  143. * = SHUTDOWN_ON_HARD_RESET to turn off the system on hard reset
  144. * = RESTART_ON_HARD_RESET to restart the system on hard reset
  145. *
  146. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  147. */
  148. int pm8xxx_hard_reset_config(enum pm8xxx_pon_config config);
  149. /**
  150. * pm8xxx_stay_on - enables stay_on feature
  151. *
  152. * PMIC stay-on feature allows PMIC to ignore MSM PS_HOLD=low
  153. * signal so that some special functions like debugging could be
  154. * performed.
  155. *
  156. * This feature should not be used in any product release.
  157. *
  158. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  159. */
  160. int pm8xxx_stay_on(void);
  161. /**
  162. * pm8xxx_preload_dVdd - preload the dVdd regulator during off state.
  163. *
  164. * This can help to reduce fluctuations in the dVdd voltage during startup
  165. * at the cost of additional off state current draw.
  166. *
  167. * This API should only be called if dVdd startup issues are suspected.
  168. *
  169. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  170. */
  171. int pm8xxx_preload_dVdd(void);
  172. /**
  173. * pm8xxx_usb_id_pullup - Control a pullup for USB ID
  174. *
  175. * @enable: enable (1) or disable (0) the pullup
  176. *
  177. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  178. */
  179. int pm8xxx_usb_id_pullup(int enable);
  180. /**
  181. * pm8xxx_aux_clk_control - Control an auxiliary clock
  182. * @clk_id: ID of clock to be programmed, registers of XO_CNTRL2
  183. * @divider: divisor to use when configuring desired clock
  184. * @enable: enable (1) the designated clock with the supplied division,
  185. * or disable (0) the designated clock
  186. *
  187. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  188. */
  189. int pm8xxx_aux_clk_control(enum pm8xxx_aux_clk_id clk_id,
  190. enum pm8xxx_aux_clk_div divider,
  191. bool enable);
  192. /**
  193. * pm8xxx_hsed_bias_control - Control the HSED_BIAS signal
  194. * @bias: the bias line to be controlled (of the 3)
  195. * @enable: enable/disable the bias line
  196. *
  197. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  198. */
  199. int pm8xxx_hsed_bias_control(enum pm8xxx_hsed_bias bias, bool enable);
  200. /**
  201. * pm8xxx_read_register - Read a PMIC register
  202. * @addr: PMIC register address
  203. * @value: Output parameter which gets the value of the register read.
  204. *
  205. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  206. */
  207. int pm8xxx_read_register(u16 addr, u8 *value);
  208. #else
  209. static inline int pm8xxx_reset_pwr_off(int reset)
  210. {
  211. return -ENODEV;
  212. }
  213. static inline int
  214. pm8xxx_uart_gpio_mux_ctrl(enum pm8xxx_uart_path_sel uart_path_sel)
  215. {
  216. return -ENODEV;
  217. }
  218. static inline int
  219. pm8xxx_coincell_chg_config(struct pm8xxx_coincell_chg *chg_config)
  220. {
  221. return -ENODEV;
  222. }
  223. static inline int pm8xxx_smpl_set_delay(enum pm8xxx_smpl_delay delay)
  224. {
  225. return -ENODEV;
  226. }
  227. static inline int pm8xxx_smpl_control(int enable)
  228. {
  229. return -ENODEV;
  230. }
  231. static inline int pm8xxx_watchdog_reset_control(int enable)
  232. {
  233. return -ENODEV;
  234. }
  235. static inline int pm8xxx_hard_reset_config(enum pm8xxx_pon_config config)
  236. {
  237. return -ENODEV;
  238. }
  239. static inline int pm8xxx_stay_on(void)
  240. {
  241. return -ENODEV;
  242. }
  243. static inline int pm8xxx_preload_dVdd(void)
  244. {
  245. return -ENODEV;
  246. }
  247. static inline int pm8xxx_usb_id_pullup(int enable)
  248. {
  249. return -ENODEV;
  250. }
  251. static inline int pm8xxx_aux_clk_control(enum pm8xxx_aux_clk_id clk_id,
  252. enum pm8xxx_aux_clk_div divider, bool enable)
  253. {
  254. return -ENODEV;
  255. }
  256. static inline int pm8xxx_hsed_bias_control(enum pm8xxx_hsed_bias bias,
  257. bool enable)
  258. {
  259. return -ENODEV;
  260. }
  261. static inline int pm8xxx_read_register(u16 addr, u8 *value)
  262. {
  263. return -ENODEV;
  264. }
  265. #endif
  266. #endif