crc32c-intel.c 5.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204
  1. /*
  2. * Using hardware provided CRC32 instruction to accelerate the CRC32 disposal.
  3. * CRC32C polynomial:0x1EDC6F41(BE)/0x82F63B78(LE)
  4. * CRC32 is a new instruction in Intel SSE4.2, the reference can be found at:
  5. * http://www.intel.com/products/processor/manuals/
  6. * Intel(R) 64 and IA-32 Architectures Software Developer's Manual
  7. * Volume 2A: Instruction Set Reference, A-M
  8. *
  9. * Copyright (C) 2008 Intel Corporation
  10. * Authors: Austin Zhang <austin_zhang@linux.intel.com>
  11. * Kent Liu <kent.liu@intel.com>
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms and conditions of the GNU General Public License,
  15. * version 2, as published by the Free Software Foundation.
  16. *
  17. * This program is distributed in the hope it will be useful, but WITHOUT
  18. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  19. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  20. * more details.
  21. *
  22. * You should have received a copy of the GNU General Public License along with
  23. * this program; if not, write to the Free Software Foundation, Inc.,
  24. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  25. *
  26. */
  27. #include <linux/init.h>
  28. #include <linux/module.h>
  29. #include <linux/string.h>
  30. #include <linux/kernel.h>
  31. #include <crypto/internal/hash.h>
  32. #include <asm/cpufeature.h>
  33. #include <asm/cpu_device_id.h>
  34. #define CHKSUM_BLOCK_SIZE 1
  35. #define CHKSUM_DIGEST_SIZE 4
  36. #define SCALE_F sizeof(unsigned long)
  37. #ifdef CONFIG_X86_64
  38. #define REX_PRE "0x48, "
  39. #else
  40. #define REX_PRE
  41. #endif
  42. static u32 crc32c_intel_le_hw_byte(u32 crc, unsigned char const *data, size_t length)
  43. {
  44. while (length--) {
  45. __asm__ __volatile__(
  46. ".byte 0xf2, 0xf, 0x38, 0xf0, 0xf1"
  47. :"=S"(crc)
  48. :"0"(crc), "c"(*data)
  49. );
  50. data++;
  51. }
  52. return crc;
  53. }
  54. static u32 __pure crc32c_intel_le_hw(u32 crc, unsigned char const *p, size_t len)
  55. {
  56. unsigned int iquotient = len / SCALE_F;
  57. unsigned int iremainder = len % SCALE_F;
  58. unsigned long *ptmp = (unsigned long *)p;
  59. while (iquotient--) {
  60. __asm__ __volatile__(
  61. ".byte 0xf2, " REX_PRE "0xf, 0x38, 0xf1, 0xf1;"
  62. :"=S"(crc)
  63. :"0"(crc), "c"(*ptmp)
  64. );
  65. ptmp++;
  66. }
  67. if (iremainder)
  68. crc = crc32c_intel_le_hw_byte(crc, (unsigned char *)ptmp,
  69. iremainder);
  70. return crc;
  71. }
  72. /*
  73. * Setting the seed allows arbitrary accumulators and flexible XOR policy
  74. * If your algorithm starts with ~0, then XOR with ~0 before you set
  75. * the seed.
  76. */
  77. static int crc32c_intel_setkey(struct crypto_shash *hash, const u8 *key,
  78. unsigned int keylen)
  79. {
  80. u32 *mctx = crypto_shash_ctx(hash);
  81. if (keylen != sizeof(u32)) {
  82. crypto_shash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
  83. return -EINVAL;
  84. }
  85. *mctx = le32_to_cpup((__le32 *)key);
  86. return 0;
  87. }
  88. static int crc32c_intel_init(struct shash_desc *desc)
  89. {
  90. u32 *mctx = crypto_shash_ctx(desc->tfm);
  91. u32 *crcp = shash_desc_ctx(desc);
  92. *crcp = *mctx;
  93. return 0;
  94. }
  95. static int crc32c_intel_update(struct shash_desc *desc, const u8 *data,
  96. unsigned int len)
  97. {
  98. u32 *crcp = shash_desc_ctx(desc);
  99. *crcp = crc32c_intel_le_hw(*crcp, data, len);
  100. return 0;
  101. }
  102. static int __crc32c_intel_finup(u32 *crcp, const u8 *data, unsigned int len,
  103. u8 *out)
  104. {
  105. *(__le32 *)out = ~cpu_to_le32(crc32c_intel_le_hw(*crcp, data, len));
  106. return 0;
  107. }
  108. static int crc32c_intel_finup(struct shash_desc *desc, const u8 *data,
  109. unsigned int len, u8 *out)
  110. {
  111. return __crc32c_intel_finup(shash_desc_ctx(desc), data, len, out);
  112. }
  113. static int crc32c_intel_final(struct shash_desc *desc, u8 *out)
  114. {
  115. u32 *crcp = shash_desc_ctx(desc);
  116. *(__le32 *)out = ~cpu_to_le32p(crcp);
  117. return 0;
  118. }
  119. static int crc32c_intel_digest(struct shash_desc *desc, const u8 *data,
  120. unsigned int len, u8 *out)
  121. {
  122. return __crc32c_intel_finup(crypto_shash_ctx(desc->tfm), data, len,
  123. out);
  124. }
  125. static int crc32c_intel_cra_init(struct crypto_tfm *tfm)
  126. {
  127. u32 *key = crypto_tfm_ctx(tfm);
  128. *key = ~0;
  129. return 0;
  130. }
  131. static struct shash_alg alg = {
  132. .setkey = crc32c_intel_setkey,
  133. .init = crc32c_intel_init,
  134. .update = crc32c_intel_update,
  135. .final = crc32c_intel_final,
  136. .finup = crc32c_intel_finup,
  137. .digest = crc32c_intel_digest,
  138. .descsize = sizeof(u32),
  139. .digestsize = CHKSUM_DIGEST_SIZE,
  140. .base = {
  141. .cra_name = "crc32c",
  142. .cra_driver_name = "crc32c-intel",
  143. .cra_priority = 200,
  144. .cra_blocksize = CHKSUM_BLOCK_SIZE,
  145. .cra_ctxsize = sizeof(u32),
  146. .cra_module = THIS_MODULE,
  147. .cra_init = crc32c_intel_cra_init,
  148. }
  149. };
  150. static const struct x86_cpu_id crc32c_cpu_id[] = {
  151. X86_FEATURE_MATCH(X86_FEATURE_XMM4_2),
  152. {}
  153. };
  154. MODULE_DEVICE_TABLE(x86cpu, crc32c_cpu_id);
  155. static int __init crc32c_intel_mod_init(void)
  156. {
  157. if (!x86_match_cpu(crc32c_cpu_id))
  158. return -ENODEV;
  159. return crypto_register_shash(&alg);
  160. }
  161. static void __exit crc32c_intel_mod_fini(void)
  162. {
  163. crypto_unregister_shash(&alg);
  164. }
  165. module_init(crc32c_intel_mod_init);
  166. module_exit(crc32c_intel_mod_fini);
  167. MODULE_AUTHOR("Austin Zhang <austin.zhang@intel.com>, Kent Liu <kent.liu@intel.com>");
  168. MODULE_DESCRIPTION("CRC32c (Castagnoli) optimization using Intel Hardware.");
  169. MODULE_LICENSE("GPL");
  170. MODULE_ALIAS("crc32c");
  171. MODULE_ALIAS("crc32c-intel");