tegra_spdif.c 8.5 KB

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  1. /*
  2. * tegra_spdif.c - Tegra SPDIF driver
  3. *
  4. * Author: Stephen Warren <swarren@nvidia.com>
  5. * Copyright (C) 2011 - NVIDIA, Inc.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19. * 02110-1301 USA
  20. *
  21. */
  22. #include <linux/clk.h>
  23. #include <linux/module.h>
  24. #include <linux/debugfs.h>
  25. #include <linux/device.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/seq_file.h>
  28. #include <linux/slab.h>
  29. #include <linux/io.h>
  30. #include <mach/iomap.h>
  31. #include <sound/core.h>
  32. #include <sound/pcm.h>
  33. #include <sound/pcm_params.h>
  34. #include <sound/soc.h>
  35. #include "tegra_spdif.h"
  36. #define DRV_NAME "tegra-spdif"
  37. static inline void tegra_spdif_write(struct tegra_spdif *spdif, u32 reg,
  38. u32 val)
  39. {
  40. __raw_writel(val, spdif->regs + reg);
  41. }
  42. static inline u32 tegra_spdif_read(struct tegra_spdif *spdif, u32 reg)
  43. {
  44. return __raw_readl(spdif->regs + reg);
  45. }
  46. #ifdef CONFIG_DEBUG_FS
  47. static int tegra_spdif_show(struct seq_file *s, void *unused)
  48. {
  49. #define REG(r) { r, #r }
  50. static const struct {
  51. int offset;
  52. const char *name;
  53. } regs[] = {
  54. REG(TEGRA_SPDIF_CTRL),
  55. REG(TEGRA_SPDIF_STATUS),
  56. REG(TEGRA_SPDIF_STROBE_CTRL),
  57. REG(TEGRA_SPDIF_DATA_FIFO_CSR),
  58. REG(TEGRA_SPDIF_CH_STA_RX_A),
  59. REG(TEGRA_SPDIF_CH_STA_RX_B),
  60. REG(TEGRA_SPDIF_CH_STA_RX_C),
  61. REG(TEGRA_SPDIF_CH_STA_RX_D),
  62. REG(TEGRA_SPDIF_CH_STA_RX_E),
  63. REG(TEGRA_SPDIF_CH_STA_RX_F),
  64. REG(TEGRA_SPDIF_CH_STA_TX_A),
  65. REG(TEGRA_SPDIF_CH_STA_TX_B),
  66. REG(TEGRA_SPDIF_CH_STA_TX_C),
  67. REG(TEGRA_SPDIF_CH_STA_TX_D),
  68. REG(TEGRA_SPDIF_CH_STA_TX_E),
  69. REG(TEGRA_SPDIF_CH_STA_TX_F),
  70. };
  71. #undef REG
  72. struct tegra_spdif *spdif = s->private;
  73. int i;
  74. clk_enable(spdif->clk_spdif_out);
  75. for (i = 0; i < ARRAY_SIZE(regs); i++) {
  76. u32 val = tegra_spdif_read(spdif, regs[i].offset);
  77. seq_printf(s, "%s = %08x\n", regs[i].name, val);
  78. }
  79. clk_disable(spdif->clk_spdif_out);
  80. return 0;
  81. }
  82. static int tegra_spdif_debug_open(struct inode *inode, struct file *file)
  83. {
  84. return single_open(file, tegra_spdif_show, inode->i_private);
  85. }
  86. static const struct file_operations tegra_spdif_debug_fops = {
  87. .open = tegra_spdif_debug_open,
  88. .read = seq_read,
  89. .llseek = seq_lseek,
  90. .release = single_release,
  91. };
  92. static void tegra_spdif_debug_add(struct tegra_spdif *spdif)
  93. {
  94. spdif->debug = debugfs_create_file(DRV_NAME, S_IRUGO,
  95. snd_soc_debugfs_root, spdif,
  96. &tegra_spdif_debug_fops);
  97. }
  98. static void tegra_spdif_debug_remove(struct tegra_spdif *spdif)
  99. {
  100. if (spdif->debug)
  101. debugfs_remove(spdif->debug);
  102. }
  103. #else
  104. static inline void tegra_spdif_debug_add(struct tegra_spdif *spdif)
  105. {
  106. }
  107. static inline void tegra_spdif_debug_remove(struct tegra_spdif *spdif)
  108. {
  109. }
  110. #endif
  111. static int tegra_spdif_hw_params(struct snd_pcm_substream *substream,
  112. struct snd_pcm_hw_params *params,
  113. struct snd_soc_dai *dai)
  114. {
  115. struct device *dev = substream->pcm->card->dev;
  116. struct tegra_spdif *spdif = snd_soc_dai_get_drvdata(dai);
  117. int ret, spdifclock;
  118. spdif->reg_ctrl &= ~TEGRA_SPDIF_CTRL_PACK;
  119. spdif->reg_ctrl &= ~TEGRA_SPDIF_CTRL_BIT_MODE_MASK;
  120. switch (params_format(params)) {
  121. case SNDRV_PCM_FORMAT_S16_LE:
  122. spdif->reg_ctrl |= TEGRA_SPDIF_CTRL_PACK;
  123. spdif->reg_ctrl |= TEGRA_SPDIF_CTRL_BIT_MODE_16BIT;
  124. break;
  125. default:
  126. return -EINVAL;
  127. }
  128. switch (params_rate(params)) {
  129. case 32000:
  130. spdifclock = 4096000;
  131. break;
  132. case 44100:
  133. spdifclock = 5644800;
  134. break;
  135. case 48000:
  136. spdifclock = 6144000;
  137. break;
  138. case 88200:
  139. spdifclock = 11289600;
  140. break;
  141. case 96000:
  142. spdifclock = 12288000;
  143. break;
  144. case 176400:
  145. spdifclock = 22579200;
  146. break;
  147. case 192000:
  148. spdifclock = 24576000;
  149. break;
  150. default:
  151. return -EINVAL;
  152. }
  153. ret = clk_set_rate(spdif->clk_spdif_out, spdifclock);
  154. if (ret) {
  155. dev_err(dev, "Can't set SPDIF clock rate: %d\n", ret);
  156. return ret;
  157. }
  158. return 0;
  159. }
  160. static void tegra_spdif_start_playback(struct tegra_spdif *spdif)
  161. {
  162. spdif->reg_ctrl |= TEGRA_SPDIF_CTRL_TX_EN;
  163. tegra_spdif_write(spdif, TEGRA_SPDIF_CTRL, spdif->reg_ctrl);
  164. }
  165. static void tegra_spdif_stop_playback(struct tegra_spdif *spdif)
  166. {
  167. spdif->reg_ctrl &= ~TEGRA_SPDIF_CTRL_TX_EN;
  168. tegra_spdif_write(spdif, TEGRA_SPDIF_CTRL, spdif->reg_ctrl);
  169. }
  170. static int tegra_spdif_trigger(struct snd_pcm_substream *substream, int cmd,
  171. struct snd_soc_dai *dai)
  172. {
  173. struct tegra_spdif *spdif = snd_soc_dai_get_drvdata(dai);
  174. switch (cmd) {
  175. case SNDRV_PCM_TRIGGER_START:
  176. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  177. case SNDRV_PCM_TRIGGER_RESUME:
  178. if (!spdif->clk_refs)
  179. clk_enable(spdif->clk_spdif_out);
  180. spdif->clk_refs++;
  181. tegra_spdif_start_playback(spdif);
  182. break;
  183. case SNDRV_PCM_TRIGGER_STOP:
  184. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  185. case SNDRV_PCM_TRIGGER_SUSPEND:
  186. tegra_spdif_stop_playback(spdif);
  187. spdif->clk_refs--;
  188. if (!spdif->clk_refs)
  189. clk_disable(spdif->clk_spdif_out);
  190. break;
  191. default:
  192. return -EINVAL;
  193. }
  194. return 0;
  195. }
  196. static int tegra_spdif_probe(struct snd_soc_dai *dai)
  197. {
  198. struct tegra_spdif *spdif = snd_soc_dai_get_drvdata(dai);
  199. dai->capture_dma_data = NULL;
  200. dai->playback_dma_data = &spdif->playback_dma_data;
  201. return 0;
  202. }
  203. static const struct snd_soc_dai_ops tegra_spdif_dai_ops = {
  204. .hw_params = tegra_spdif_hw_params,
  205. .trigger = tegra_spdif_trigger,
  206. };
  207. static struct snd_soc_dai_driver tegra_spdif_dai = {
  208. .name = DRV_NAME,
  209. .probe = tegra_spdif_probe,
  210. .playback = {
  211. .channels_min = 2,
  212. .channels_max = 2,
  213. .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
  214. SNDRV_PCM_RATE_48000,
  215. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  216. },
  217. .ops = &tegra_spdif_dai_ops,
  218. };
  219. static __devinit int tegra_spdif_platform_probe(struct platform_device *pdev)
  220. {
  221. struct tegra_spdif *spdif;
  222. struct resource *mem, *memregion, *dmareq;
  223. int ret;
  224. spdif = kzalloc(sizeof(struct tegra_spdif), GFP_KERNEL);
  225. if (!spdif) {
  226. dev_err(&pdev->dev, "Can't allocate tegra_spdif\n");
  227. ret = -ENOMEM;
  228. goto exit;
  229. }
  230. dev_set_drvdata(&pdev->dev, spdif);
  231. spdif->clk_spdif_out = clk_get(&pdev->dev, "spdif_out");
  232. if (IS_ERR(spdif->clk_spdif_out)) {
  233. pr_err("Can't retrieve spdif clock\n");
  234. ret = PTR_ERR(spdif->clk_spdif_out);
  235. goto err_free;
  236. }
  237. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  238. if (!mem) {
  239. dev_err(&pdev->dev, "No memory resource\n");
  240. ret = -ENODEV;
  241. goto err_clk_put;
  242. }
  243. dmareq = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  244. if (!dmareq) {
  245. dev_err(&pdev->dev, "No DMA resource\n");
  246. ret = -ENODEV;
  247. goto err_clk_put;
  248. }
  249. memregion = request_mem_region(mem->start, resource_size(mem),
  250. DRV_NAME);
  251. if (!memregion) {
  252. dev_err(&pdev->dev, "Memory region already claimed\n");
  253. ret = -EBUSY;
  254. goto err_clk_put;
  255. }
  256. spdif->regs = ioremap(mem->start, resource_size(mem));
  257. if (!spdif->regs) {
  258. dev_err(&pdev->dev, "ioremap failed\n");
  259. ret = -ENOMEM;
  260. goto err_release;
  261. }
  262. spdif->playback_dma_data.addr = mem->start + TEGRA_SPDIF_DATA_OUT;
  263. spdif->playback_dma_data.wrap = 4;
  264. spdif->playback_dma_data.width = 32;
  265. spdif->playback_dma_data.req_sel = dmareq->start;
  266. ret = snd_soc_register_dai(&pdev->dev, &tegra_spdif_dai);
  267. if (ret) {
  268. dev_err(&pdev->dev, "Could not register DAI: %d\n", ret);
  269. ret = -ENOMEM;
  270. goto err_unmap;
  271. }
  272. tegra_spdif_debug_add(spdif);
  273. return 0;
  274. err_unmap:
  275. iounmap(spdif->regs);
  276. err_release:
  277. release_mem_region(mem->start, resource_size(mem));
  278. err_clk_put:
  279. clk_put(spdif->clk_spdif_out);
  280. err_free:
  281. kfree(spdif);
  282. exit:
  283. return ret;
  284. }
  285. static int __devexit tegra_spdif_platform_remove(struct platform_device *pdev)
  286. {
  287. struct tegra_spdif *spdif = dev_get_drvdata(&pdev->dev);
  288. struct resource *res;
  289. snd_soc_unregister_dai(&pdev->dev);
  290. tegra_spdif_debug_remove(spdif);
  291. iounmap(spdif->regs);
  292. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  293. release_mem_region(res->start, resource_size(res));
  294. clk_put(spdif->clk_spdif_out);
  295. kfree(spdif);
  296. return 0;
  297. }
  298. static struct platform_driver tegra_spdif_driver = {
  299. .driver = {
  300. .name = DRV_NAME,
  301. .owner = THIS_MODULE,
  302. },
  303. .probe = tegra_spdif_platform_probe,
  304. .remove = __devexit_p(tegra_spdif_platform_remove),
  305. };
  306. module_platform_driver(tegra_spdif_driver);
  307. MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
  308. MODULE_DESCRIPTION("Tegra SPDIF ASoC driver");
  309. MODULE_LICENSE("GPL");
  310. MODULE_ALIAS("platform:" DRV_NAME);