spdif.c 12 KB

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  1. /* sound/soc/samsung/spdif.c
  2. *
  3. * ALSA SoC Audio Layer - Samsung S/PDIF Controller driver
  4. *
  5. * Copyright (c) 2010 Samsung Electronics Co. Ltd
  6. * http://www.samsung.com/
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/io.h>
  14. #include <linux/module.h>
  15. #include <sound/soc.h>
  16. #include <sound/pcm_params.h>
  17. #include <plat/audio.h>
  18. #include <mach/dma.h>
  19. #include "dma.h"
  20. #include "spdif.h"
  21. /* Registers */
  22. #define CLKCON 0x00
  23. #define CON 0x04
  24. #define BSTAS 0x08
  25. #define CSTAS 0x0C
  26. #define DATA_OUTBUF 0x10
  27. #define DCNT 0x14
  28. #define BSTAS_S 0x18
  29. #define DCNT_S 0x1C
  30. #define CLKCTL_MASK 0x7
  31. #define CLKCTL_MCLK_EXT (0x1 << 2)
  32. #define CLKCTL_PWR_ON (0x1 << 0)
  33. #define CON_MASK 0x3ffffff
  34. #define CON_FIFO_TH_SHIFT 19
  35. #define CON_FIFO_TH_MASK (0x7 << 19)
  36. #define CON_USERDATA_23RDBIT (0x1 << 12)
  37. #define CON_SW_RESET (0x1 << 5)
  38. #define CON_MCLKDIV_MASK (0x3 << 3)
  39. #define CON_MCLKDIV_256FS (0x0 << 3)
  40. #define CON_MCLKDIV_384FS (0x1 << 3)
  41. #define CON_MCLKDIV_512FS (0x2 << 3)
  42. #define CON_PCM_MASK (0x3 << 1)
  43. #define CON_PCM_16BIT (0x0 << 1)
  44. #define CON_PCM_20BIT (0x1 << 1)
  45. #define CON_PCM_24BIT (0x2 << 1)
  46. #define CON_PCM_DATA (0x1 << 0)
  47. #define CSTAS_MASK 0x3fffffff
  48. #define CSTAS_SAMP_FREQ_MASK (0xF << 24)
  49. #define CSTAS_SAMP_FREQ_44 (0x0 << 24)
  50. #define CSTAS_SAMP_FREQ_48 (0x2 << 24)
  51. #define CSTAS_SAMP_FREQ_32 (0x3 << 24)
  52. #define CSTAS_SAMP_FREQ_96 (0xA << 24)
  53. #define CSTAS_CATEGORY_MASK (0xFF << 8)
  54. #define CSTAS_CATEGORY_CODE_CDP (0x01 << 8)
  55. #define CSTAS_NO_COPYRIGHT (0x1 << 2)
  56. /**
  57. * struct samsung_spdif_info - Samsung S/PDIF Controller information
  58. * @lock: Spin lock for S/PDIF.
  59. * @dev: The parent device passed to use from the probe.
  60. * @regs: The pointer to the device register block.
  61. * @clk_rate: Current clock rate for calcurate ratio.
  62. * @pclk: The peri-clock pointer for spdif master operation.
  63. * @sclk: The source clock pointer for making sync signals.
  64. * @save_clkcon: Backup clkcon reg. in suspend.
  65. * @save_con: Backup con reg. in suspend.
  66. * @save_cstas: Backup cstas reg. in suspend.
  67. * @dma_playback: DMA information for playback channel.
  68. */
  69. struct samsung_spdif_info {
  70. spinlock_t lock;
  71. struct device *dev;
  72. void __iomem *regs;
  73. unsigned long clk_rate;
  74. struct clk *pclk;
  75. struct clk *sclk;
  76. u32 saved_clkcon;
  77. u32 saved_con;
  78. u32 saved_cstas;
  79. struct s3c_dma_params *dma_playback;
  80. };
  81. static struct s3c2410_dma_client spdif_dma_client_out = {
  82. .name = "S/PDIF Stereo out",
  83. };
  84. static struct s3c_dma_params spdif_stereo_out;
  85. static struct samsung_spdif_info spdif_info;
  86. static inline struct samsung_spdif_info *to_info(struct snd_soc_dai *cpu_dai)
  87. {
  88. return snd_soc_dai_get_drvdata(cpu_dai);
  89. }
  90. static void spdif_snd_txctrl(struct samsung_spdif_info *spdif, int on)
  91. {
  92. void __iomem *regs = spdif->regs;
  93. u32 clkcon;
  94. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  95. clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
  96. if (on)
  97. writel(clkcon | CLKCTL_PWR_ON, regs + CLKCON);
  98. else
  99. writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
  100. }
  101. static int spdif_set_sysclk(struct snd_soc_dai *cpu_dai,
  102. int clk_id, unsigned int freq, int dir)
  103. {
  104. struct samsung_spdif_info *spdif = to_info(cpu_dai);
  105. u32 clkcon;
  106. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  107. clkcon = readl(spdif->regs + CLKCON);
  108. if (clk_id == SND_SOC_SPDIF_INT_MCLK)
  109. clkcon &= ~CLKCTL_MCLK_EXT;
  110. else
  111. clkcon |= CLKCTL_MCLK_EXT;
  112. writel(clkcon, spdif->regs + CLKCON);
  113. spdif->clk_rate = freq;
  114. return 0;
  115. }
  116. static int spdif_trigger(struct snd_pcm_substream *substream, int cmd,
  117. struct snd_soc_dai *dai)
  118. {
  119. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  120. struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
  121. unsigned long flags;
  122. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  123. switch (cmd) {
  124. case SNDRV_PCM_TRIGGER_START:
  125. case SNDRV_PCM_TRIGGER_RESUME:
  126. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  127. spin_lock_irqsave(&spdif->lock, flags);
  128. spdif_snd_txctrl(spdif, 1);
  129. spin_unlock_irqrestore(&spdif->lock, flags);
  130. break;
  131. case SNDRV_PCM_TRIGGER_STOP:
  132. case SNDRV_PCM_TRIGGER_SUSPEND:
  133. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  134. spin_lock_irqsave(&spdif->lock, flags);
  135. spdif_snd_txctrl(spdif, 0);
  136. spin_unlock_irqrestore(&spdif->lock, flags);
  137. break;
  138. default:
  139. return -EINVAL;
  140. }
  141. return 0;
  142. }
  143. static int spdif_sysclk_ratios[] = {
  144. 512, 384, 256,
  145. };
  146. static int spdif_hw_params(struct snd_pcm_substream *substream,
  147. struct snd_pcm_hw_params *params,
  148. struct snd_soc_dai *socdai)
  149. {
  150. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  151. struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
  152. void __iomem *regs = spdif->regs;
  153. struct s3c_dma_params *dma_data;
  154. u32 con, clkcon, cstas;
  155. unsigned long flags;
  156. int i, ratio;
  157. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  158. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  159. dma_data = spdif->dma_playback;
  160. else {
  161. dev_err(spdif->dev, "Capture is not supported\n");
  162. return -EINVAL;
  163. }
  164. snd_soc_dai_set_dma_data(rtd->cpu_dai, substream, dma_data);
  165. spin_lock_irqsave(&spdif->lock, flags);
  166. con = readl(regs + CON) & CON_MASK;
  167. cstas = readl(regs + CSTAS) & CSTAS_MASK;
  168. clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
  169. con &= ~CON_FIFO_TH_MASK;
  170. con |= (0x7 << CON_FIFO_TH_SHIFT);
  171. con |= CON_USERDATA_23RDBIT;
  172. con |= CON_PCM_DATA;
  173. con &= ~CON_PCM_MASK;
  174. switch (params_format(params)) {
  175. case SNDRV_PCM_FORMAT_S16_LE:
  176. con |= CON_PCM_16BIT;
  177. break;
  178. default:
  179. dev_err(spdif->dev, "Unsupported data size.\n");
  180. goto err;
  181. }
  182. ratio = spdif->clk_rate / params_rate(params);
  183. for (i = 0; i < ARRAY_SIZE(spdif_sysclk_ratios); i++)
  184. if (ratio == spdif_sysclk_ratios[i])
  185. break;
  186. if (i == ARRAY_SIZE(spdif_sysclk_ratios)) {
  187. dev_err(spdif->dev, "Invalid clock ratio %ld/%d\n",
  188. spdif->clk_rate, params_rate(params));
  189. goto err;
  190. }
  191. con &= ~CON_MCLKDIV_MASK;
  192. switch (ratio) {
  193. case 256:
  194. con |= CON_MCLKDIV_256FS;
  195. break;
  196. case 384:
  197. con |= CON_MCLKDIV_384FS;
  198. break;
  199. case 512:
  200. con |= CON_MCLKDIV_512FS;
  201. break;
  202. }
  203. cstas &= ~CSTAS_SAMP_FREQ_MASK;
  204. switch (params_rate(params)) {
  205. case 44100:
  206. cstas |= CSTAS_SAMP_FREQ_44;
  207. break;
  208. case 48000:
  209. cstas |= CSTAS_SAMP_FREQ_48;
  210. break;
  211. case 32000:
  212. cstas |= CSTAS_SAMP_FREQ_32;
  213. break;
  214. case 96000:
  215. cstas |= CSTAS_SAMP_FREQ_96;
  216. break;
  217. default:
  218. dev_err(spdif->dev, "Invalid sampling rate %d\n",
  219. params_rate(params));
  220. goto err;
  221. }
  222. cstas &= ~CSTAS_CATEGORY_MASK;
  223. cstas |= CSTAS_CATEGORY_CODE_CDP;
  224. cstas |= CSTAS_NO_COPYRIGHT;
  225. writel(con, regs + CON);
  226. writel(cstas, regs + CSTAS);
  227. writel(clkcon, regs + CLKCON);
  228. spin_unlock_irqrestore(&spdif->lock, flags);
  229. return 0;
  230. err:
  231. spin_unlock_irqrestore(&spdif->lock, flags);
  232. return -EINVAL;
  233. }
  234. static void spdif_shutdown(struct snd_pcm_substream *substream,
  235. struct snd_soc_dai *dai)
  236. {
  237. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  238. struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
  239. void __iomem *regs = spdif->regs;
  240. u32 con, clkcon;
  241. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  242. con = readl(regs + CON) & CON_MASK;
  243. clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
  244. writel(con | CON_SW_RESET, regs + CON);
  245. cpu_relax();
  246. writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
  247. }
  248. #ifdef CONFIG_PM
  249. static int spdif_suspend(struct snd_soc_dai *cpu_dai)
  250. {
  251. struct samsung_spdif_info *spdif = to_info(cpu_dai);
  252. u32 con = spdif->saved_con;
  253. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  254. spdif->saved_clkcon = readl(spdif->regs + CLKCON) & CLKCTL_MASK;
  255. spdif->saved_con = readl(spdif->regs + CON) & CON_MASK;
  256. spdif->saved_cstas = readl(spdif->regs + CSTAS) & CSTAS_MASK;
  257. writel(con | CON_SW_RESET, spdif->regs + CON);
  258. cpu_relax();
  259. return 0;
  260. }
  261. static int spdif_resume(struct snd_soc_dai *cpu_dai)
  262. {
  263. struct samsung_spdif_info *spdif = to_info(cpu_dai);
  264. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  265. writel(spdif->saved_clkcon, spdif->regs + CLKCON);
  266. writel(spdif->saved_con, spdif->regs + CON);
  267. writel(spdif->saved_cstas, spdif->regs + CSTAS);
  268. return 0;
  269. }
  270. #else
  271. #define spdif_suspend NULL
  272. #define spdif_resume NULL
  273. #endif
  274. static const struct snd_soc_dai_ops spdif_dai_ops = {
  275. .set_sysclk = spdif_set_sysclk,
  276. .trigger = spdif_trigger,
  277. .hw_params = spdif_hw_params,
  278. .shutdown = spdif_shutdown,
  279. };
  280. static struct snd_soc_dai_driver samsung_spdif_dai = {
  281. .name = "samsung-spdif",
  282. .playback = {
  283. .stream_name = "S/PDIF Playback",
  284. .channels_min = 2,
  285. .channels_max = 2,
  286. .rates = (SNDRV_PCM_RATE_32000 |
  287. SNDRV_PCM_RATE_44100 |
  288. SNDRV_PCM_RATE_48000 |
  289. SNDRV_PCM_RATE_96000),
  290. .formats = SNDRV_PCM_FMTBIT_S16_LE, },
  291. .ops = &spdif_dai_ops,
  292. .suspend = spdif_suspend,
  293. .resume = spdif_resume,
  294. };
  295. static __devinit int spdif_probe(struct platform_device *pdev)
  296. {
  297. struct s3c_audio_pdata *spdif_pdata;
  298. struct resource *mem_res, *dma_res;
  299. struct samsung_spdif_info *spdif;
  300. int ret;
  301. spdif_pdata = pdev->dev.platform_data;
  302. dev_dbg(&pdev->dev, "Entered %s\n", __func__);
  303. dma_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  304. if (!dma_res) {
  305. dev_err(&pdev->dev, "Unable to get dma resource.\n");
  306. return -ENXIO;
  307. }
  308. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  309. if (!mem_res) {
  310. dev_err(&pdev->dev, "Unable to get register resource.\n");
  311. return -ENXIO;
  312. }
  313. if (spdif_pdata && spdif_pdata->cfg_gpio
  314. && spdif_pdata->cfg_gpio(pdev)) {
  315. dev_err(&pdev->dev, "Unable to configure GPIO pins\n");
  316. return -EINVAL;
  317. }
  318. spdif = &spdif_info;
  319. spdif->dev = &pdev->dev;
  320. spin_lock_init(&spdif->lock);
  321. spdif->pclk = clk_get(&pdev->dev, "spdif");
  322. if (IS_ERR(spdif->pclk)) {
  323. dev_err(&pdev->dev, "failed to get peri-clock\n");
  324. ret = -ENOENT;
  325. goto err0;
  326. }
  327. clk_enable(spdif->pclk);
  328. spdif->sclk = clk_get(&pdev->dev, "sclk_spdif");
  329. if (IS_ERR(spdif->sclk)) {
  330. dev_err(&pdev->dev, "failed to get internal source clock\n");
  331. ret = -ENOENT;
  332. goto err1;
  333. }
  334. clk_enable(spdif->sclk);
  335. /* Request S/PDIF Register's memory region */
  336. if (!request_mem_region(mem_res->start,
  337. resource_size(mem_res), "samsung-spdif")) {
  338. dev_err(&pdev->dev, "Unable to request register region\n");
  339. ret = -EBUSY;
  340. goto err2;
  341. }
  342. spdif->regs = ioremap(mem_res->start, 0x100);
  343. if (spdif->regs == NULL) {
  344. dev_err(&pdev->dev, "Cannot ioremap registers\n");
  345. ret = -ENXIO;
  346. goto err3;
  347. }
  348. dev_set_drvdata(&pdev->dev, spdif);
  349. ret = snd_soc_register_dai(&pdev->dev, &samsung_spdif_dai);
  350. if (ret != 0) {
  351. dev_err(&pdev->dev, "fail to register dai\n");
  352. goto err4;
  353. }
  354. spdif_stereo_out.dma_size = 2;
  355. spdif_stereo_out.client = &spdif_dma_client_out;
  356. spdif_stereo_out.dma_addr = mem_res->start + DATA_OUTBUF;
  357. spdif_stereo_out.channel = dma_res->start;
  358. spdif->dma_playback = &spdif_stereo_out;
  359. return 0;
  360. err4:
  361. iounmap(spdif->regs);
  362. err3:
  363. release_mem_region(mem_res->start, resource_size(mem_res));
  364. err2:
  365. clk_disable(spdif->sclk);
  366. clk_put(spdif->sclk);
  367. err1:
  368. clk_disable(spdif->pclk);
  369. clk_put(spdif->pclk);
  370. err0:
  371. return ret;
  372. }
  373. static __devexit int spdif_remove(struct platform_device *pdev)
  374. {
  375. struct samsung_spdif_info *spdif = &spdif_info;
  376. struct resource *mem_res;
  377. snd_soc_unregister_dai(&pdev->dev);
  378. iounmap(spdif->regs);
  379. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  380. if (mem_res)
  381. release_mem_region(mem_res->start, resource_size(mem_res));
  382. clk_disable(spdif->sclk);
  383. clk_put(spdif->sclk);
  384. clk_disable(spdif->pclk);
  385. clk_put(spdif->pclk);
  386. return 0;
  387. }
  388. static struct platform_driver samsung_spdif_driver = {
  389. .probe = spdif_probe,
  390. .remove = __devexit_p(spdif_remove),
  391. .driver = {
  392. .name = "samsung-spdif",
  393. .owner = THIS_MODULE,
  394. },
  395. };
  396. module_platform_driver(samsung_spdif_driver);
  397. MODULE_AUTHOR("Seungwhan Youn, <sw.youn@samsung.com>");
  398. MODULE_DESCRIPTION("Samsung S/PDIF Controller Driver");
  399. MODULE_LICENSE("GPL");
  400. MODULE_ALIAS("platform:samsung-spdif");