msm8x10.c 38 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354
  1. /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/delay.h>
  14. #include <linux/gpio.h>
  15. #include <linux/of_gpio.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/mfd/pm8xxx/pm8921.h>
  19. #include <linux/qpnp/clkdiv.h>
  20. #include <linux/io.h>
  21. #include <sound/core.h>
  22. #include <sound/soc.h>
  23. #include <sound/soc-dapm.h>
  24. #include <sound/pcm.h>
  25. #include <sound/jack.h>
  26. #include <asm/mach-types.h>
  27. #include <mach/socinfo.h>
  28. #include <qdsp6v2/msm-pcm-routing-v2.h>
  29. #include <sound/q6afe-v2.h>
  30. #include <linux/module.h>
  31. #include <mach/gpiomux.h>
  32. #include "../codecs/msm8x10-wcd.h"
  33. #define DRV_NAME "msm8x10-asoc-wcd"
  34. #define BTSCO_RATE_8KHZ 8000
  35. #define BTSCO_RATE_16KHZ 16000
  36. /* It takes about 13ms for Class-D PAs to ramp-up */
  37. #define EXT_CLASS_D_EN_DELAY 13000
  38. #define EXT_CLASS_D_DIS_DELAY 3000
  39. #define EXT_CLASS_D_DELAY_DELTA 2000
  40. #define CDC_EXT_CLK_RATE 9600000
  41. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  42. #define WCD9XXX_MBHC_DEF_RLOADS 5
  43. static int msm_btsco_rate = BTSCO_RATE_8KHZ;
  44. static int msm_btsco_ch = 1;
  45. static int msm_proxy_rx_ch = 2;
  46. static struct platform_device *spdev;
  47. static int ext_spk_amp_gpio = -1;
  48. #if defined (CONFIG_EXT_MAINMIC_BIAS)
  49. static int ext_main_micbias_gpio = -1;
  50. #endif
  51. #if defined (CONFIG_EXT_SUBMIC_BIAS)
  52. static int ext_sub_micbias_gpio = -1;
  53. #endif
  54. /* pointers for digital codec register mappings */
  55. static void __iomem *pcbcr;
  56. static void __iomem *prcgr;
  57. //balaji.k: Enabling the MIC Bias Voltage of Earmic
  58. #ifdef CONFIG_SAMSUNG_JACK
  59. static struct snd_soc_jack hs_jack;
  60. #endif
  61. static int msm_sec_mi2s_rx_ch = 1;
  62. static int msm_pri_mi2s_tx_ch = 1;
  63. static int msm_sec_mi2s_rx_bit_format = SNDRV_PCM_FORMAT_S16_LE;
  64. static inline int param_is_mask(int p)
  65. {
  66. return ((p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  67. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK));
  68. }
  69. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p, int n)
  70. {
  71. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  72. }
  73. static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned bit)
  74. {
  75. if (bit >= SNDRV_MASK_MAX)
  76. return;
  77. if (param_is_mask(n)) {
  78. struct snd_mask *m = param_to_mask(p, n);
  79. m->bits[0] = 0;
  80. m->bits[1] = 0;
  81. m->bits[bit >> 5] |= (1 << (bit & 31));
  82. }
  83. }
  84. static void *def_msm8x10_wcd_mbhc_cal(void);
  85. static int msm8x10_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
  86. bool dapm);
  87. static struct wcd9xxx_mbhc_config mbhc_cfg = {
  88. .read_fw_bin = false,
  89. .calibration = NULL,
  90. .micbias = MBHC_MICBIAS1,
  91. .mclk_cb_fn = msm8x10_enable_codec_ext_clk,
  92. .mclk_rate = CDC_EXT_CLK_RATE,
  93. .gpio = 0,
  94. .gpio_irq = 0,
  95. .gpio_level_insert = 0,
  96. .detect_extn_cable = false,
  97. .insert_detect = true,
  98. .swap_gnd_mic = NULL,
  99. .use_int_rbias = false,
  100. .micbias_enable_flags = 1 << MBHC_MICBIAS_ENABLE_THRESHOLD_HEADSET |
  101. 1 << MBHC_MICBIAS_ENABLE_REGULAR_HEADSET,
  102. .cs_enable_flags = (1 << MBHC_CS_ENABLE_POLLING |
  103. 1 << MBHC_CS_ENABLE_INSERTION |
  104. 1 << MBHC_CS_ENABLE_REMOVAL),
  105. .do_recalibration = false,
  106. .use_vddio_meas = false,
  107. .hw_jack_type = FOUR_POLE_JACK,
  108. };
  109. /*
  110. * There is limitation for the clock root selection from
  111. * either MI2S or DIG_CODEC.
  112. * If DIG_CODEC root can only provide 9.6MHz clock
  113. * to codec while MI2S only can provide
  114. * 12.288MHz.
  115. */
  116. enum {
  117. DIG_CDC_CLK_SEL_DIG_CODEC,
  118. DIG_CDC_CLK_SEL_PRI_MI2S,
  119. DIG_CDC_CLK_SEL_SEC_MI2S,
  120. };
  121. static struct afe_clk_cfg mi2s_rx_clk = {
  122. AFE_API_VERSION_I2S_CONFIG,
  123. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  124. Q6AFE_LPASS_OSR_CLK_12_P288_MHZ,
  125. Q6AFE_LPASS_CLK_SRC_INTERNAL,
  126. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  127. Q6AFE_LPASS_MODE_BOTH_VALID,
  128. 0,
  129. };
  130. static struct afe_clk_cfg mi2s_tx_clk = {
  131. AFE_API_VERSION_I2S_CONFIG,
  132. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  133. Q6AFE_LPASS_OSR_CLK_12_P288_MHZ,
  134. Q6AFE_LPASS_CLK_SRC_INTERNAL,
  135. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  136. Q6AFE_LPASS_MODE_BOTH_VALID,
  137. 0,
  138. };
  139. static struct afe_digital_clk_cfg digital_cdc_clk = {
  140. AFE_API_VERSION_I2S_CONFIG,
  141. 9600000,
  142. 5, /* Digital Codec root */
  143. 0,
  144. };
  145. static atomic_t mclk_rsc_ref;
  146. static struct mutex cdc_mclk_mutex;
  147. static int msm8x10_mclk_event(struct snd_soc_dapm_widget *w,
  148. struct snd_kcontrol *kcontrol, int event);
  149. static int msm_ext_spkramp_event(struct snd_soc_dapm_widget *w,
  150. struct snd_kcontrol *kcontrol, int event);
  151. static void msm8x10_enable_ext_spk_power_amp(u32 on);
  152. #if defined (CONFIG_EXT_MAINMIC_BIAS)
  153. static int msm_ext_mainmic_event(struct snd_soc_dapm_widget *w,
  154. struct snd_kcontrol *kcontrol, int event);
  155. #endif
  156. #if defined (CONFIG_EXT_SUBMIC_BIAS)
  157. static int msm_ext_submic_event(struct snd_soc_dapm_widget *w,
  158. struct snd_kcontrol *kcontrol, int event);
  159. #endif
  160. static const struct snd_soc_dapm_widget msm8x10_dapm_widgets[] = {
  161. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  162. msm8x10_mclk_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  163. SND_SOC_DAPM_SPK("Lineout amp", msm_ext_spkramp_event),
  164. #if defined (CONFIG_EXT_MAINMIC_BIAS)
  165. SND_SOC_DAPM_MIC("Handset Mic", msm_ext_mainmic_event),
  166. #else
  167. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  168. #endif
  169. #if defined (CONFIG_EXT_SUBMIC_BIAS)
  170. SND_SOC_DAPM_MIC("Sub Mic", msm_ext_submic_event),
  171. #endif
  172. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  173. SND_SOC_DAPM_MIC("Secondary Mic", NULL),
  174. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  175. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  176. };
  177. static int msm8x10_ext_spk_power_amp_init(void)
  178. {
  179. int ret = 0;
  180. ext_spk_amp_gpio = of_get_named_gpio(spdev->dev.of_node,
  181. "qcom,ext-spk-amp-gpio", 0);
  182. if (ext_spk_amp_gpio >= 0) {
  183. ret = gpio_request(ext_spk_amp_gpio, "ext_spk_amp_gpio");
  184. if (ret) {
  185. pr_err("%s: gpio_request failed for ext_spk_amp_gpio.\n",
  186. __func__);
  187. return -EINVAL;
  188. }
  189. gpio_direction_output(ext_spk_amp_gpio, 0);
  190. }
  191. return 0;
  192. }
  193. #if defined (CONFIG_MACH_MS04TFN) || defined(CONFIG_SEC_HEAT_PROJECT)
  194. static int msm8x10_ext_micbias_init(void)
  195. {
  196. int ret = 0;
  197. #if defined (CONFIG_EXT_MAINMIC_BIAS)
  198. ext_main_micbias_gpio = of_get_named_gpio(spdev->dev.of_node,
  199. "qcom,ext-main-micbias-gpio", 0);
  200. if (ext_main_micbias_gpio >= 0) {
  201. ret = gpio_request(ext_main_micbias_gpio, "ext_main_micbias_gpio");
  202. if (ret) {
  203. pr_err("%s: gpio_request failed for ext_main_micbias_gpio.\n",
  204. __func__);
  205. return -EINVAL;
  206. }
  207. gpio_direction_output(ext_main_micbias_gpio, 0);
  208. }
  209. #endif
  210. #if defined (CONFIG_EXT_SUBMIC_BIAS)
  211. ext_sub_micbias_gpio = of_get_named_gpio(spdev->dev.of_node,
  212. "qcom,ext-sub-micbias-gpio", 0);
  213. if (ext_sub_micbias_gpio >= 0) {
  214. ret = gpio_request(ext_sub_micbias_gpio, "ext_sub_micbias_gpio");
  215. if (ret) {
  216. pr_err("%s: gpio_request failed for ext_sub_micbias_gpio.\n",
  217. __func__);
  218. return -EINVAL;
  219. }
  220. gpio_direction_output(ext_sub_micbias_gpio, 0);
  221. }
  222. #endif
  223. return 0;
  224. }
  225. #endif
  226. #if defined (CONFIG_EXT_MAINMIC_BIAS)
  227. static int msm_ext_mainmic_event(struct snd_soc_dapm_widget *w,
  228. struct snd_kcontrol *kcontrol, int event)
  229. {
  230. pr_info("%s()\n", __func__);
  231. if (ext_main_micbias_gpio >= 0) {
  232. if (SND_SOC_DAPM_EVENT_ON(event))
  233. gpio_direction_output(ext_main_micbias_gpio, 1);
  234. else
  235. gpio_direction_output(ext_main_micbias_gpio, 0);
  236. }
  237. return 0;
  238. }
  239. #endif
  240. #if defined (CONFIG_EXT_SUBMIC_BIAS)
  241. static int msm_ext_submic_event(struct snd_soc_dapm_widget *w,
  242. struct snd_kcontrol *kcontrol, int event)
  243. {
  244. pr_info("%s()\n", __func__);
  245. if (ext_sub_micbias_gpio >= 0) {
  246. if (SND_SOC_DAPM_EVENT_ON(event))
  247. gpio_direction_output(ext_sub_micbias_gpio, 1);
  248. else
  249. gpio_direction_output(ext_sub_micbias_gpio, 0);
  250. }
  251. return 0;
  252. }
  253. #endif
  254. static int msm_ext_spkramp_event(struct snd_soc_dapm_widget *w,
  255. struct snd_kcontrol *kcontrol, int event)
  256. {
  257. pr_debug("%s()\n", __func__);
  258. if (ext_spk_amp_gpio >= 0) {
  259. if (SND_SOC_DAPM_EVENT_ON(event))
  260. msm8x10_enable_ext_spk_power_amp(1);
  261. else
  262. msm8x10_enable_ext_spk_power_amp(0);
  263. }
  264. return 0;
  265. }
  266. static void msm8x10_enable_ext_spk_power_amp(u32 on)
  267. {
  268. if (on) {
  269. gpio_direction_output(ext_spk_amp_gpio, on);
  270. /*time takes enable the external power amplifier*/
  271. usleep_range(EXT_CLASS_D_EN_DELAY,
  272. EXT_CLASS_D_EN_DELAY + EXT_CLASS_D_DELAY_DELTA);
  273. } else {
  274. gpio_direction_output(ext_spk_amp_gpio, on);
  275. /*time takes disable the external power amplifier*/
  276. usleep_range(EXT_CLASS_D_DIS_DELAY,
  277. EXT_CLASS_D_DIS_DELAY + EXT_CLASS_D_DELAY_DELTA);
  278. }
  279. pr_debug("%s: %s external speaker PAs.\n", __func__,
  280. on ? "Enable" : "Disable");
  281. }
  282. static int msm_config_mclk(u16 port_id, struct afe_digital_clk_cfg *cfg)
  283. {
  284. /* set the drive strength on the clock */
  285. msm_tlmm_misc_reg_write(TLMM_CDC_HDRV_CTL, 0x00);
  286. msm_tlmm_misc_reg_write(TLMM_CDC_HDRV_PULL_CTL, 0x0006db6d);
  287. iowrite32(0x1, pcbcr);
  288. /* Set the update bit to make the settings go through */
  289. iowrite32(0x1, prcgr);
  290. return 0;
  291. }
  292. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  293. struct snd_pcm_hw_params *params)
  294. {
  295. struct snd_interval *rate = hw_param_interval(params,
  296. SNDRV_PCM_HW_PARAM_RATE);
  297. pr_debug("%s()\n", __func__);
  298. rate->min = rate->max = 48000;
  299. return 0;
  300. }
  301. static int msm_be_fm_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  302. struct snd_pcm_hw_params *params)
  303. {
  304. struct snd_interval *rate = hw_param_interval(params,
  305. SNDRV_PCM_HW_PARAM_RATE);
  306. struct snd_interval *channels = hw_param_interval(params,
  307. SNDRV_PCM_HW_PARAM_CHANNELS);
  308. pr_debug("%s()\n", __func__);
  309. rate->min = rate->max = 48000;
  310. channels->min = channels->max = 2;
  311. return 0;
  312. }
  313. static int msm_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  314. struct snd_pcm_hw_params *params)
  315. {
  316. struct snd_interval *rate = hw_param_interval(params,
  317. SNDRV_PCM_HW_PARAM_RATE);
  318. struct snd_interval *channels = hw_param_interval(params,
  319. SNDRV_PCM_HW_PARAM_CHANNELS);
  320. pr_debug("%s(): channel:%d\n", __func__, msm_pri_mi2s_tx_ch);
  321. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  322. msm_sec_mi2s_rx_bit_format);
  323. rate->min = rate->max = 48000;
  324. channels->min = channels->max = msm_sec_mi2s_rx_ch;
  325. return 0;
  326. }
  327. static int msm_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  328. struct snd_pcm_hw_params *params)
  329. {
  330. struct snd_interval *rate = hw_param_interval(params,
  331. SNDRV_PCM_HW_PARAM_RATE);
  332. struct snd_interval *channels = hw_param_interval(params,
  333. SNDRV_PCM_HW_PARAM_CHANNELS);
  334. pr_debug("%s(), channel:%d\n", __func__, msm_pri_mi2s_tx_ch);
  335. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  336. msm_sec_mi2s_rx_bit_format);
  337. rate->min = rate->max = 48000;
  338. channels->min = channels->max = msm_pri_mi2s_tx_ch;
  339. return 0;
  340. }
  341. static const char *const btsco_rate_text[] = {"BTSCO_RATE_8KHZ", "BTSCO_RATE_16KHZ"};
  342. static const struct soc_enum msm_btsco_enum[] = {
  343. SOC_ENUM_SINGLE_EXT(2, btsco_rate_text),
  344. };
  345. static const char *const sec_mi2s_rx_ch_text[] = {"One", "Two"};
  346. static const char *const pri_mi2s_tx_ch_text[] = {"One", "Two"};
  347. static int msm_btsco_rate_get(struct snd_kcontrol *kcontrol,
  348. struct snd_ctl_elem_value *ucontrol)
  349. {
  350. pr_debug("%s: msm_btsco_rate = %d", __func__, msm_btsco_rate);
  351. ucontrol->value.integer.value[0] = msm_btsco_rate;
  352. return 0;
  353. }
  354. static int msm_btsco_rate_put(struct snd_kcontrol *kcontrol,
  355. struct snd_ctl_elem_value *ucontrol)
  356. {
  357. switch (ucontrol->value.integer.value[0]) {
  358. case 0:
  359. msm_btsco_rate = BTSCO_RATE_8KHZ;
  360. break;
  361. case 1:
  362. msm_btsco_rate = BTSCO_RATE_16KHZ;
  363. break;
  364. default:
  365. msm_btsco_rate = BTSCO_RATE_8KHZ;
  366. break;
  367. }
  368. pr_debug("%s: msm_btsco_rate = %d\n", __func__, msm_btsco_rate);
  369. return 0;
  370. }
  371. static int msm_sec_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  372. struct snd_ctl_elem_value *ucontrol)
  373. {
  374. pr_debug("%s: msm_sec_mi2s_rx_ch = %d\n", __func__,
  375. msm_sec_mi2s_rx_ch);
  376. ucontrol->value.integer.value[0] = msm_sec_mi2s_rx_ch - 1;
  377. return 0;
  378. }
  379. static int msm_sec_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  380. struct snd_ctl_elem_value *ucontrol)
  381. {
  382. msm_sec_mi2s_rx_ch = ucontrol->value.integer.value[0] + 1;
  383. pr_debug("%s: msm_sec_mi2s_rx_ch = %d\n", __func__,
  384. msm_sec_mi2s_rx_ch);
  385. return 1;
  386. }
  387. static int msm_pri_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  388. struct snd_ctl_elem_value *ucontrol)
  389. {
  390. pr_debug("%s: msm_pri_mi2s_tx_ch = %d\n", __func__,
  391. msm_pri_mi2s_tx_ch);
  392. ucontrol->value.integer.value[0] = msm_pri_mi2s_tx_ch - 1;
  393. return 0;
  394. }
  395. static int msm_pri_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  396. struct snd_ctl_elem_value *ucontrol)
  397. {
  398. msm_pri_mi2s_tx_ch = ucontrol->value.integer.value[0] + 1;
  399. pr_debug("%s: msm_pri_mi2s_tx_ch = %d\n", __func__, msm_pri_mi2s_tx_ch);
  400. return 1;
  401. }
  402. static int msm_btsco_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  403. struct snd_pcm_hw_params *params)
  404. {
  405. struct snd_interval *rate = hw_param_interval(params,
  406. SNDRV_PCM_HW_PARAM_RATE);
  407. struct snd_interval *channels = hw_param_interval(params,
  408. SNDRV_PCM_HW_PARAM_CHANNELS);
  409. rate->min = rate->max = msm_btsco_rate;
  410. channels->min = channels->max = msm_btsco_ch;
  411. return 0;
  412. }
  413. static int msm_mi2s_snd_hw_params(struct snd_pcm_substream *substream,
  414. struct snd_pcm_hw_params *params)
  415. {
  416. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  417. substream->name, substream->stream);
  418. return 0;
  419. }
  420. static int mi2s_clk_ctl(struct snd_pcm_substream *substream, bool enable)
  421. {
  422. int ret = 0;
  423. if (enable) {
  424. digital_cdc_clk.clk_val = 9600000;
  425. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  426. mi2s_rx_clk.clk_val2 = Q6AFE_LPASS_OSR_CLK_12_P288_MHZ;
  427. mi2s_rx_clk.clk_val1 = Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ;
  428. ret = afe_set_lpass_clock(AFE_PORT_ID_SECONDARY_MI2S_RX,
  429. &mi2s_rx_clk);
  430. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  431. mi2s_tx_clk.clk_val2 = Q6AFE_LPASS_OSR_CLK_12_P288_MHZ;
  432. mi2s_tx_clk.clk_val1 = Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ;
  433. ret = afe_set_lpass_clock(AFE_PORT_ID_PRIMARY_MI2S_RX,
  434. &mi2s_tx_clk);
  435. } else
  436. pr_err("%s:Not valid substream.\n", __func__);
  437. if (ret < 0)
  438. pr_err("%s:afe_set_lpass_clock failed\n", __func__);
  439. } else {
  440. digital_cdc_clk.clk_val = 0;
  441. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  442. mi2s_rx_clk.clk_val2 = Q6AFE_LPASS_OSR_CLK_DISABLE;
  443. mi2s_rx_clk.clk_val1 = Q6AFE_LPASS_IBIT_CLK_DISABLE;
  444. ret = afe_set_lpass_clock(AFE_PORT_ID_SECONDARY_MI2S_RX,
  445. &mi2s_rx_clk);
  446. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  447. mi2s_tx_clk.clk_val2 = Q6AFE_LPASS_OSR_CLK_DISABLE;
  448. mi2s_tx_clk.clk_val1 = Q6AFE_LPASS_IBIT_CLK_DISABLE;
  449. ret = afe_set_lpass_clock(AFE_PORT_ID_PRIMARY_MI2S_RX,
  450. &mi2s_tx_clk);
  451. } else
  452. pr_err("%s:Not valid substream.\n", __func__);
  453. if (ret < 0)
  454. pr_err("%s:afe_set_lpass_clock failed\n", __func__);
  455. }
  456. return ret;
  457. }
  458. static int msm8x10_enable_codec_ext_clk(struct snd_soc_codec *codec,
  459. int enable, bool dapm)
  460. {
  461. int ret = 0;
  462. mutex_lock(&cdc_mclk_mutex);
  463. pr_debug("%s: enable = %d codec name %s enable %d mclk ref counter %d\n",
  464. __func__, enable, codec->name, enable,
  465. atomic_read(&mclk_rsc_ref));
  466. if (enable) {
  467. if (atomic_inc_return(&mclk_rsc_ref) == 1) {
  468. digital_cdc_clk.clk_val = 9600000;
  469. msm_config_mclk(AFE_PORT_ID_SECONDARY_MI2S_RX,
  470. &digital_cdc_clk);
  471. msm8x10_wcd_mclk_enable(codec, 1, dapm);
  472. }
  473. } else {
  474. if (atomic_dec_return(&mclk_rsc_ref) == 0) {
  475. digital_cdc_clk.clk_val = 0;
  476. msm8x10_wcd_mclk_enable(codec, 0, dapm);
  477. msm_config_mclk(AFE_PORT_ID_SECONDARY_MI2S_RX,
  478. &digital_cdc_clk);
  479. }
  480. }
  481. mutex_unlock(&cdc_mclk_mutex);
  482. return ret;
  483. }
  484. static int msm8x10_mclk_event(struct snd_soc_dapm_widget *w,
  485. struct snd_kcontrol *kcontrol, int event)
  486. {
  487. pr_debug("%s: event = %d\n", __func__, event);
  488. switch (event) {
  489. case SND_SOC_DAPM_PRE_PMU:
  490. return msm8x10_enable_codec_ext_clk(w->codec, 1, true);
  491. case SND_SOC_DAPM_POST_PMD:
  492. return msm8x10_enable_codec_ext_clk(w->codec, 0, true);
  493. default:
  494. return -EINVAL;
  495. }
  496. }
  497. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  498. {
  499. int ret;
  500. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  501. substream->name, substream->stream);
  502. ret = mi2s_clk_ctl(substream, false);
  503. if (ret < 0)
  504. pr_err("%s:clock disable failed\n", __func__);
  505. }
  506. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  507. {
  508. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  509. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  510. int ret = 0;
  511. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  512. substream->name, substream->stream);
  513. ret = mi2s_clk_ctl(substream, true);
  514. ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS);
  515. if (ret < 0)
  516. pr_err("set fmt cpu dai failed\n");
  517. return ret;
  518. }
  519. static const struct soc_enum msm_snd_enum[] = {
  520. SOC_ENUM_SINGLE_EXT(2, sec_mi2s_rx_ch_text),
  521. SOC_ENUM_SINGLE_EXT(2, pri_mi2s_tx_ch_text),
  522. };
  523. static const struct snd_kcontrol_new msm_snd_controls[] = {
  524. SOC_ENUM_EXT("Internal BTSCO SampleRate", msm_btsco_enum[0],
  525. msm_btsco_rate_get, msm_btsco_rate_put),
  526. SOC_ENUM_EXT("MI2S_RX Channels", msm_snd_enum[0],
  527. msm_sec_mi2s_rx_ch_get, msm_sec_mi2s_rx_ch_put),
  528. SOC_ENUM_EXT("MI2S_TX Channels", msm_snd_enum[1],
  529. msm_pri_mi2s_tx_ch_get, msm_pri_mi2s_tx_ch_put),
  530. };
  531. static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
  532. {
  533. struct snd_soc_codec *codec = rtd->codec;
  534. struct snd_soc_dapm_context *dapm = &codec->dapm;
  535. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  536. int ret = 0;
  537. pr_debug("%s(),dev_name%s\n", __func__, dev_name(cpu_dai->dev));
  538. msm8x10_ext_spk_power_amp_init();
  539. #if defined (CONFIG_MACH_MS04TFN) || defined(CONFIG_SEC_HEAT_PROJECT)
  540. msm8x10_ext_micbias_init();
  541. #endif
  542. mbhc_cfg.calibration = def_msm8x10_wcd_mbhc_cal();
  543. if (mbhc_cfg.calibration) {
  544. ret = msm8x10_wcd_hs_detect(codec, &mbhc_cfg);
  545. if (ret) {
  546. pr_err("%s: msm8x10_wcd_hs_detect failed\n", __func__);
  547. goto exit;
  548. }
  549. } else {
  550. ret = -ENOMEM;
  551. goto exit;
  552. }
  553. snd_soc_dapm_new_controls(dapm, msm8x10_dapm_widgets,
  554. ARRAY_SIZE(msm8x10_dapm_widgets));
  555. snd_soc_dapm_enable_pin(dapm, "Lineout amp");
  556. snd_soc_dapm_sync(dapm);
  557. #ifdef CONFIG_SAMSUNG_JACK
  558. //balaji.k: Need to remove this code in future
  559. // Below lines has been added only because in need to codec ptr in order to enable
  560. //MIC BIAS2 dapm widget of Codec
  561. ret = snd_soc_jack_new(codec, "Headset Jack",
  562. (SND_JACK_HEADSET | SND_JACK_OC_HPHL | SND_JACK_OC_HPHR),
  563. &hs_jack);
  564. if (ret) {
  565. pr_err("failed to create new jack\n");
  566. return ret;
  567. }
  568. #endif
  569. ret = snd_soc_add_codec_controls(codec, msm_snd_controls,
  570. ARRAY_SIZE(msm_snd_controls));
  571. if (ret < 0)
  572. return ret;
  573. exit:
  574. if (gpio_is_valid(ext_spk_amp_gpio))
  575. gpio_free(ext_spk_amp_gpio);
  576. return ret;
  577. }
  578. static void *def_msm8x10_wcd_mbhc_cal(void)
  579. {
  580. void *msm8x10_wcd_cal;
  581. struct wcd9xxx_mbhc_btn_detect_cfg *btn_cfg;
  582. u16 *btn_low, *btn_high;
  583. u8 *n_ready, *n_cic, *gain;
  584. msm8x10_wcd_cal = kzalloc(WCD9XXX_MBHC_CAL_SIZE(
  585. WCD9XXX_MBHC_DEF_BUTTONS,
  586. WCD9XXX_MBHC_DEF_RLOADS),
  587. GFP_KERNEL);
  588. if (!msm8x10_wcd_cal) {
  589. pr_err("%s: out of memory\n", __func__);
  590. return NULL;
  591. }
  592. #define S(X, Y) ((WCD9XXX_MBHC_CAL_GENERAL_PTR(msm8x10_wcd_cal)->X) = (Y))
  593. S(t_ldoh, 100);
  594. S(t_bg_fast_settle, 100);
  595. S(t_shutdown_plug_rem, 255);
  596. S(mbhc_nsa, 2);
  597. S(mbhc_navg, 128);
  598. #undef S
  599. #define S(X, Y) ((WCD9XXX_MBHC_CAL_PLUG_DET_PTR(msm8x10_wcd_cal)->X) = (Y))
  600. S(mic_current, MSM8X10_WCD_PID_MIC_5_UA);
  601. S(hph_current, MSM8X10_WCD_PID_MIC_5_UA);
  602. S(t_mic_pid, 100);
  603. S(t_ins_complete, 250);
  604. S(t_ins_retry, 200);
  605. #undef S
  606. #define S(X, Y) ((WCD9XXX_MBHC_CAL_PLUG_TYPE_PTR(msm8x10_wcd_cal)->X) = (Y))
  607. S(v_no_mic, 30);
  608. S(v_hs_max, 2550);
  609. #undef S
  610. #define S(X, Y) ((WCD9XXX_MBHC_CAL_BTN_DET_PTR(msm8x10_wcd_cal)->X) = (Y))
  611. S(c[0], 62);
  612. S(c[1], 124);
  613. S(nc, 1);
  614. S(n_meas, 5);
  615. S(mbhc_nsc, 10);
  616. S(n_btn_meas, 1);
  617. S(n_btn_con, 2);
  618. S(num_btn, WCD9XXX_MBHC_DEF_BUTTONS);
  619. S(v_btn_press_delta_sta, 100);
  620. S(v_btn_press_delta_cic, 50);
  621. #undef S
  622. btn_cfg = WCD9XXX_MBHC_CAL_BTN_DET_PTR(msm8x10_wcd_cal);
  623. btn_low = wcd9xxx_mbhc_cal_btn_det_mp(btn_cfg, MBHC_BTN_DET_V_BTN_LOW);
  624. btn_high = wcd9xxx_mbhc_cal_btn_det_mp(btn_cfg,
  625. MBHC_BTN_DET_V_BTN_HIGH);
  626. btn_low[0] = -50;
  627. btn_high[0] = 20;
  628. btn_low[1] = 21;
  629. btn_high[1] = 61;
  630. btn_low[2] = 62;
  631. btn_high[2] = 104;
  632. btn_low[3] = 105;
  633. btn_high[3] = 148;
  634. btn_low[4] = 149;
  635. btn_high[4] = 189;
  636. btn_low[5] = 190;
  637. btn_high[5] = 228;
  638. btn_low[6] = 229;
  639. btn_high[6] = 264;
  640. btn_low[7] = 265;
  641. btn_high[7] = 500;
  642. n_ready = wcd9xxx_mbhc_cal_btn_det_mp(btn_cfg, MBHC_BTN_DET_N_READY);
  643. n_ready[0] = 80;
  644. n_ready[1] = 68;
  645. n_cic = wcd9xxx_mbhc_cal_btn_det_mp(btn_cfg, MBHC_BTN_DET_N_CIC);
  646. n_cic[0] = 60;
  647. n_cic[1] = 47;
  648. gain = wcd9xxx_mbhc_cal_btn_det_mp(btn_cfg, MBHC_BTN_DET_GAIN);
  649. gain[0] = 11;
  650. gain[1] = 14;
  651. return msm8x10_wcd_cal;
  652. }
  653. #ifdef CONFIG_SAMSUNG_JACK
  654. static struct snd_soc_jack hs_jack;
  655. void msm8x10_enable_ear_micbias(bool state)
  656. {
  657. int nRetVal = 0;
  658. struct snd_soc_jack *jack = &hs_jack;
  659. struct snd_soc_codec *codec;
  660. struct snd_soc_dapm_context *dapm;
  661. char *str
  662. #ifdef CONFIG_EXT_EARMIC_BIAS
  663. = "Headset Mic";
  664. #else
  665. = "MIC BIAS Internal2";
  666. #endif
  667. printk("%s : str: %s\n", __func__, str);
  668. if (jack->codec == NULL) { /* audrx_init not yet called */
  669. pr_err("%s codec==NULL\n", __func__);
  670. return;
  671. }
  672. codec = jack->codec;
  673. dapm = &codec->dapm;
  674. mutex_lock(&dapm->codec->mutex);
  675. if (state == 1) {
  676. nRetVal = snd_soc_dapm_force_enable_pin(dapm, str);
  677. pr_info("%s enable the codec pin : %d with state :%d\n", __func__, nRetVal, state);
  678. } else{
  679. nRetVal = snd_soc_dapm_disable_pin(dapm, str);
  680. pr_info("%s disable the codec pin : %d with state :%d\n", __func__, nRetVal, state);
  681. }
  682. snd_soc_dapm_sync(dapm);
  683. mutex_unlock(&dapm->codec->mutex);
  684. }
  685. EXPORT_SYMBOL(msm8x10_enable_ear_micbias);
  686. #endif
  687. static int msm_proxy_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  688. struct snd_pcm_hw_params *params)
  689. {
  690. struct snd_interval *rate = hw_param_interval(params,
  691. SNDRV_PCM_HW_PARAM_RATE);
  692. struct snd_interval *channels = hw_param_interval(params,
  693. SNDRV_PCM_HW_PARAM_CHANNELS);
  694. pr_debug("%s: msm_proxy_rx_ch =%d\n", __func__, msm_proxy_rx_ch);
  695. if (channels->max < 2)
  696. channels->min = channels->max = 2;
  697. channels->min = channels->max = msm_proxy_rx_ch;
  698. rate->min = rate->max = 48000;
  699. return 0;
  700. }
  701. static int msm_proxy_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  702. struct snd_pcm_hw_params *params)
  703. {
  704. struct snd_interval *rate = hw_param_interval(params,
  705. SNDRV_PCM_HW_PARAM_RATE);
  706. rate->min = rate->max = 48000;
  707. return 0;
  708. }
  709. static struct snd_soc_ops msm8x10_mi2s_be_ops = {
  710. .startup = msm_mi2s_snd_startup,
  711. .hw_params = msm_mi2s_snd_hw_params,
  712. .shutdown = msm_mi2s_snd_shutdown,
  713. };
  714. /* Digital audio interface glue - connects codec <---> CPU */
  715. static struct snd_soc_dai_link msm8x10_dai[] = {
  716. /* FrontEnd DAI Links */
  717. {/* hw:x,0 */
  718. .name = "MSM8X10 Media1",
  719. .stream_name = "MultiMedia1",
  720. .cpu_dai_name = "MultiMedia1",
  721. .platform_name = "msm-pcm-dsp.0",
  722. .dynamic = 1,
  723. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  724. SND_SOC_DPCM_TRIGGER_POST},
  725. .codec_dai_name = "snd-soc-dummy-dai",
  726. .codec_name = "snd-soc-dummy",
  727. .ignore_suspend = 1,
  728. /* this dainlink has playback support */
  729. .ignore_pmdown_time = 1,
  730. .be_id = MSM_FRONTEND_DAI_MULTIMEDIA1
  731. },
  732. {/* hw:x,1 */
  733. .name = "MSM8X10 Media2",
  734. .stream_name = "MultiMedia2",
  735. .cpu_dai_name = "MultiMedia2",
  736. .platform_name = "msm-pcm-dsp.0",
  737. .dynamic = 1,
  738. .codec_dai_name = "snd-soc-dummy-dai",
  739. .codec_name = "snd-soc-dummy",
  740. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  741. SND_SOC_DPCM_TRIGGER_POST},
  742. .ignore_suspend = 1,
  743. /* this dainlink has playback support */
  744. .ignore_pmdown_time = 1,
  745. .be_id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  746. },
  747. {/* hw:x,2 */
  748. .name = "Circuit-Switch Voice",
  749. .stream_name = "CS-Voice",
  750. .cpu_dai_name = "CS-VOICE",
  751. .platform_name = "msm-pcm-voice",
  752. .dynamic = 1,
  753. .codec_dai_name = "snd-soc-dummy-dai",
  754. .codec_name = "snd-soc-dummy",
  755. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  756. SND_SOC_DPCM_TRIGGER_POST},
  757. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  758. .ignore_suspend = 1,
  759. /* this dainlink has playback support */
  760. .ignore_pmdown_time = 1,
  761. .be_id = MSM_FRONTEND_DAI_CS_VOICE,
  762. },
  763. {/* hw:x,3 */
  764. .name = "MSM VoIP",
  765. .stream_name = "VoIP",
  766. .cpu_dai_name = "VoIP",
  767. .platform_name = "msm-voip-dsp",
  768. .dynamic = 1,
  769. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  770. SND_SOC_DPCM_TRIGGER_POST},
  771. .codec_dai_name = "snd-soc-dummy-dai",
  772. .codec_name = "snd-soc-dummy",
  773. .ignore_suspend = 1,
  774. /* this dainlink has playback support */
  775. .ignore_pmdown_time = 1,
  776. .be_id = MSM_FRONTEND_DAI_VOIP,
  777. },
  778. {/* hw:x,4 */
  779. .name = "MSM8X10 LPA",
  780. .stream_name = "LPA",
  781. .cpu_dai_name = "MultiMedia3",
  782. .platform_name = "msm-pcm-lpa",
  783. .dynamic = 1,
  784. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  785. SND_SOC_DPCM_TRIGGER_POST},
  786. .codec_dai_name = "snd-soc-dummy-dai",
  787. .codec_name = "snd-soc-dummy",
  788. .ignore_suspend = 1,
  789. /* this dainlink has playback support */
  790. .ignore_pmdown_time = 1,
  791. .be_id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  792. },
  793. /* Hostless PCM purpose */
  794. {/* hw:x,5 */
  795. .name = "Secondary MI2S RX Hostless",
  796. .stream_name = "Secondary MI2S_RX Hostless Playback",
  797. .cpu_dai_name = "SEC_MI2S_RX_HOSTLESS",
  798. .platform_name = "msm-pcm-hostless",
  799. .dynamic = 1,
  800. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  801. SND_SOC_DPCM_TRIGGER_POST},
  802. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  803. .ignore_suspend = 1,
  804. .ignore_pmdown_time = 1,
  805. /* This dainlink has MI2S support */
  806. .codec_dai_name = "snd-soc-dummy-dai",
  807. .codec_name = "snd-soc-dummy",
  808. },
  809. {/* hw:x,6 */
  810. .name = "INT_FM Hostless",
  811. .stream_name = "INT_FM Hostless",
  812. .cpu_dai_name = "INT_FM_HOSTLESS",
  813. .platform_name = "msm-pcm-hostless",
  814. .dynamic = 1,
  815. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  816. SND_SOC_DPCM_TRIGGER_POST},
  817. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  818. .ignore_suspend = 1,
  819. /* this dainlink has playback support */
  820. .ignore_pmdown_time = 1,
  821. .codec_dai_name = "snd-soc-dummy-dai",
  822. .codec_name = "snd-soc-dummy",
  823. },
  824. {/* hw:x,7 */
  825. .name = "MSM AFE-PCM RX",
  826. .stream_name = "AFE-PROXY RX",
  827. .cpu_dai_name = "msm-dai-q6-dev.241",
  828. .codec_name = "msm-stub-codec.1",
  829. .codec_dai_name = "msm-stub-rx",
  830. .platform_name = "msm-pcm-afe",
  831. .ignore_suspend = 1,
  832. /* this dainlink has playback support */
  833. .ignore_pmdown_time = 1,
  834. },
  835. {/* hw:x,8 */
  836. .name = "MSM AFE-PCM TX",
  837. .stream_name = "AFE-PROXY TX",
  838. .cpu_dai_name = "msm-dai-q6-dev.240",
  839. .codec_name = "msm-stub-codec.1",
  840. .codec_dai_name = "msm-stub-tx",
  841. .platform_name = "msm-pcm-afe",
  842. .ignore_suspend = 1,
  843. },
  844. {/* hw:x,9 */
  845. .name = "MSM8X10 Compr",
  846. .stream_name = "COMPR",
  847. .cpu_dai_name = "MultiMedia4",
  848. .platform_name = "msm-compress-dsp",
  849. .dynamic = 1,
  850. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  851. SND_SOC_DPCM_TRIGGER_POST},
  852. .codec_dai_name = "snd-soc-dummy-dai",
  853. .codec_name = "snd-soc-dummy",
  854. .ignore_suspend = 1,
  855. .ignore_pmdown_time = 1,
  856. /* this dainlink has playback support */
  857. .be_id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  858. },
  859. {/* hw:x,10 */
  860. .name = "AUXPCM Hostless",
  861. .stream_name = "AUXPCM Hostless",
  862. .cpu_dai_name = "AUXPCM_HOSTLESS",
  863. .platform_name = "msm-pcm-hostless",
  864. .dynamic = 1,
  865. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  866. SND_SOC_DPCM_TRIGGER_POST},
  867. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  868. .ignore_suspend = 1,
  869. /* this dainlink has playback support */
  870. .ignore_pmdown_time = 1,
  871. .codec_dai_name = "snd-soc-dummy-dai",
  872. .codec_name = "snd-soc-dummy",
  873. },
  874. {/* hw:x,11 */
  875. .name = "Primary MI2S TX Hostless",
  876. .stream_name = "Primary MI2S_TX Hostless Capture",
  877. .cpu_dai_name = "PRI_MI2S_TX_HOSTLESS",
  878. .platform_name = "msm-pcm-hostless",
  879. .dynamic = 1,
  880. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  881. SND_SOC_DPCM_TRIGGER_POST},
  882. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  883. .ignore_suspend = 1,
  884. .ignore_pmdown_time = 1,
  885. /* This dainlink has MI2S support */
  886. .codec_dai_name = "snd-soc-dummy-dai",
  887. .codec_name = "snd-soc-dummy",
  888. },
  889. {/* hw:x,12 */
  890. .name = "MSM8x10 LowLatency",
  891. .stream_name = "MultiMedia5",
  892. .cpu_dai_name = "MultiMedia5",
  893. .platform_name = "msm-pcm-dsp.1",
  894. .dynamic = 1,
  895. .codec_dai_name = "snd-soc-dummy-dai",
  896. .codec_name = "snd-soc-dummy",
  897. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  898. SND_SOC_DPCM_TRIGGER_POST},
  899. .ignore_suspend = 1,
  900. /* this dainlink has playback support */
  901. .ignore_pmdown_time = 1,
  902. .be_id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  903. },
  904. {/* hw:x,13 */
  905. .name = "Voice2",
  906. .stream_name = "Voice2",
  907. .cpu_dai_name = "Voice2",
  908. .platform_name = "msm-pcm-voice",
  909. .dynamic = 1,
  910. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  911. SND_SOC_DPCM_TRIGGER_POST},
  912. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  913. .ignore_suspend = 1,
  914. /* this dainlink has playback support */
  915. .ignore_pmdown_time = 1,
  916. .codec_dai_name = "snd-soc-dummy-dai",
  917. .codec_name = "snd-soc-dummy",
  918. },
  919. {/* hw:x,14 */
  920. .name = "QCHAT",
  921. .stream_name = "QCHAT",
  922. .cpu_dai_name = "QCHAT",
  923. .platform_name = "msm-pcm-voice",
  924. .dynamic = 1,
  925. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  926. SND_SOC_DPCM_TRIGGER_POST},
  927. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  928. .ignore_suspend = 1,
  929. /* this dainlink has playback support */
  930. .ignore_pmdown_time = 1,
  931. .codec_dai_name = "snd-soc-dummy-dai",
  932. .codec_name = "snd-soc-dummy",
  933. .be_id = MSM_FRONTEND_DAI_QCHAT,
  934. },
  935. {/* hw:x,15 */
  936. .name = "MSM8X10 Media9",
  937. .stream_name = "MultiMedia9",
  938. .cpu_dai_name = "MultiMedia9",
  939. .platform_name = "msm-pcm-dsp.0",
  940. .dynamic = 1,
  941. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  942. SND_SOC_DPCM_TRIGGER_POST},
  943. .codec_dai_name = "snd-soc-dummy-dai",
  944. .codec_name = "snd-soc-dummy",
  945. .ignore_suspend = 1,
  946. /* this dainlink has playback support */
  947. .ignore_pmdown_time = 1,
  948. .be_id = MSM_FRONTEND_DAI_MULTIMEDIA9
  949. },
  950. /* Backend I2S DAI Links */
  951. {
  952. .name = LPASS_BE_SEC_MI2S_RX,
  953. .stream_name = "Secondary MI2S Playback",
  954. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  955. .platform_name = "msm-pcm-routing",
  956. .codec_name = MSM8X10_CODEC_NAME,
  957. .codec_dai_name = "msm8x10_wcd_i2s_rx1",
  958. .no_pcm = 1,
  959. .be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  960. .init = &msm_audrx_init,
  961. .be_hw_params_fixup = msm_rx_be_hw_params_fixup,
  962. .ops = &msm8x10_mi2s_be_ops,
  963. .ignore_suspend = 1,
  964. },
  965. {
  966. .name = LPASS_BE_PRI_MI2S_TX,
  967. .stream_name = "Primary MI2S Capture",
  968. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  969. .platform_name = "msm-pcm-routing",
  970. .codec_name = MSM8X10_CODEC_NAME,
  971. .codec_dai_name = "msm8x10_wcd_i2s_tx1",
  972. .no_pcm = 1,
  973. .be_id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  974. .be_hw_params_fixup = msm_tx_be_hw_params_fixup,
  975. .ops = &msm8x10_mi2s_be_ops,
  976. .ignore_suspend = 1,
  977. },
  978. {
  979. .name = LPASS_BE_INT_BT_SCO_RX,
  980. .stream_name = "Internal BT-SCO Playback",
  981. .cpu_dai_name = "msm-dai-q6-dev.12288",
  982. .platform_name = "msm-pcm-routing",
  983. .codec_name = "msm-stub-codec.1",
  984. .codec_dai_name = "msm-stub-rx",
  985. .no_pcm = 1,
  986. .be_id = MSM_BACKEND_DAI_INT_BT_SCO_RX,
  987. .be_hw_params_fixup = msm_btsco_be_hw_params_fixup,
  988. /* this dainlink has playback support */
  989. .ignore_pmdown_time = 1,
  990. .ignore_suspend = 1,
  991. },
  992. {
  993. .name = LPASS_BE_INT_BT_SCO_TX,
  994. .stream_name = "Internal BT-SCO Capture",
  995. .cpu_dai_name = "msm-dai-q6-dev.12289",
  996. .platform_name = "msm-pcm-routing",
  997. .codec_name = "msm-stub-codec.1",
  998. .codec_dai_name = "msm-stub-tx",
  999. .no_pcm = 1,
  1000. .be_id = MSM_BACKEND_DAI_INT_BT_SCO_TX,
  1001. .be_hw_params_fixup = msm_btsco_be_hw_params_fixup,
  1002. .ignore_suspend = 1,
  1003. },
  1004. {
  1005. .name = LPASS_BE_INT_FM_RX,
  1006. .stream_name = "Internal FM Playback",
  1007. .cpu_dai_name = "msm-dai-q6-dev.12292",
  1008. .platform_name = "msm-pcm-routing",
  1009. .codec_name = "msm-stub-codec.1",
  1010. .codec_dai_name = "msm-stub-rx",
  1011. .no_pcm = 1,
  1012. .be_id = MSM_BACKEND_DAI_INT_FM_RX,
  1013. .be_hw_params_fixup = msm_be_fm_hw_params_fixup,
  1014. /* this dainlink has playback support */
  1015. .ignore_pmdown_time = 1,
  1016. .ignore_suspend = 1,
  1017. },
  1018. {
  1019. .name = LPASS_BE_INT_FM_TX,
  1020. .stream_name = "Internal FM Capture",
  1021. .cpu_dai_name = "msm-dai-q6-dev.12293",
  1022. .platform_name = "msm-pcm-routing",
  1023. .codec_name = "msm-stub-codec.1",
  1024. .codec_dai_name = "msm-stub-tx",
  1025. .no_pcm = 1,
  1026. .be_id = MSM_BACKEND_DAI_INT_FM_TX,
  1027. .be_hw_params_fixup = msm_be_hw_params_fixup,
  1028. .ignore_suspend = 1,
  1029. },
  1030. {
  1031. .name = LPASS_BE_AFE_PCM_RX,
  1032. .stream_name = "AFE Playback",
  1033. .cpu_dai_name = "msm-dai-q6-dev.224",
  1034. .platform_name = "msm-pcm-routing",
  1035. .codec_name = "msm-stub-codec.1",
  1036. .codec_dai_name = "msm-stub-rx",
  1037. .no_pcm = 1,
  1038. .be_id = MSM_BACKEND_DAI_AFE_PCM_RX,
  1039. .be_hw_params_fixup = msm_proxy_rx_be_hw_params_fixup,
  1040. /* this dainlink has playback support */
  1041. .ignore_pmdown_time = 1,
  1042. .ignore_suspend = 1,
  1043. },
  1044. {
  1045. .name = LPASS_BE_AFE_PCM_TX,
  1046. .stream_name = "AFE Capture",
  1047. .cpu_dai_name = "msm-dai-q6-dev.225",
  1048. .platform_name = "msm-pcm-routing",
  1049. .codec_name = "msm-stub-codec.1",
  1050. .codec_dai_name = "msm-stub-tx",
  1051. .no_pcm = 1,
  1052. .be_id = MSM_BACKEND_DAI_AFE_PCM_TX,
  1053. .be_hw_params_fixup = msm_proxy_tx_be_hw_params_fixup,
  1054. .ignore_suspend = 1,
  1055. },
  1056. /* Incall Record Uplink BACK END DAI Link */
  1057. {
  1058. .name = LPASS_BE_INCALL_RECORD_TX,
  1059. .stream_name = "Voice Uplink Capture",
  1060. .cpu_dai_name = "msm-dai-q6-dev.32772",
  1061. .platform_name = "msm-pcm-routing",
  1062. .codec_name = "msm-stub-codec.1",
  1063. .codec_dai_name = "msm-stub-tx",
  1064. .no_pcm = 1,
  1065. .be_id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  1066. .be_hw_params_fixup = msm_be_hw_params_fixup,
  1067. .ignore_suspend = 1,
  1068. },
  1069. /* Incall Record Downlink BACK END DAI Link */
  1070. {
  1071. .name = LPASS_BE_INCALL_RECORD_RX,
  1072. .stream_name = "Voice Downlink Capture",
  1073. .cpu_dai_name = "msm-dai-q6-dev.32771",
  1074. .platform_name = "msm-pcm-routing",
  1075. .codec_name = "msm-stub-codec.1",
  1076. .codec_dai_name = "msm-stub-tx",
  1077. .no_pcm = 1,
  1078. .be_id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  1079. .be_hw_params_fixup = msm_be_hw_params_fixup,
  1080. .ignore_suspend = 1,
  1081. },
  1082. /* Incall Music BACK END DAI Link */
  1083. {
  1084. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  1085. .stream_name = "Voice Farend Playback",
  1086. .cpu_dai_name = "msm-dai-q6-dev.32773",
  1087. .platform_name = "msm-pcm-routing",
  1088. .codec_name = "msm-stub-codec.1",
  1089. .codec_dai_name = "msm-stub-rx",
  1090. .no_pcm = 1,
  1091. .be_id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  1092. .be_hw_params_fixup = msm_be_hw_params_fixup,
  1093. .ignore_suspend = 1,
  1094. },
  1095. /* Incall Music 2 BACK END DAI Link */
  1096. {
  1097. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  1098. .stream_name = "Voice2 Farend Playback",
  1099. .cpu_dai_name = "msm-dai-q6-dev.32770",
  1100. .platform_name = "msm-pcm-routing",
  1101. .codec_name = "msm-stub-codec.1",
  1102. .codec_dai_name = "msm-stub-rx",
  1103. .no_pcm = 1,
  1104. .be_id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  1105. .be_hw_params_fixup = msm_be_hw_params_fixup,
  1106. .ignore_suspend = 1,
  1107. },
  1108. };
  1109. struct snd_soc_card snd_soc_card_msm8x10 = {
  1110. .name = "msm8x10-snd-card",
  1111. .dai_link = msm8x10_dai,
  1112. .num_links = ARRAY_SIZE(msm8x10_dai),
  1113. };
  1114. static __devinit int msm8x10_asoc_machine_probe(struct platform_device *pdev)
  1115. {
  1116. struct snd_soc_card *card = &snd_soc_card_msm8x10;
  1117. const char *mbhc_audio_jack_type = NULL;
  1118. size_t n = strlen("4-pole-jack");
  1119. int ret;
  1120. dev_dbg(&pdev->dev, "%s\n", __func__);
  1121. if (!pdev->dev.of_node) {
  1122. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  1123. return -EINVAL;
  1124. }
  1125. card->dev = &pdev->dev;
  1126. platform_set_drvdata(pdev, card);
  1127. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  1128. if (ret)
  1129. goto err;
  1130. ret = snd_soc_of_parse_audio_routing(card,
  1131. "qcom,audio-routing");
  1132. if (ret)
  1133. goto err;
  1134. mutex_init(&cdc_mclk_mutex);
  1135. pcbcr = ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CBCR, 4);
  1136. if (!pcbcr) {
  1137. ret = -ENOMEM;
  1138. goto err1;
  1139. }
  1140. prcgr = ioremap(MSM8X10_DINO_LPASS_DIGCODEC_CMD_RCGR, 4);
  1141. if (!prcgr) {
  1142. ret = -ENOMEM;
  1143. goto err1;
  1144. }
  1145. atomic_set(&mclk_rsc_ref, 0);
  1146. mbhc_cfg.gpio_level_insert = of_property_read_bool(pdev->dev.of_node,
  1147. "qcom,headset-jack-type-NC");
  1148. mbhc_cfg.use_int_rbias = of_property_read_bool(pdev->dev.of_node,
  1149. "qcom,mbhc-bias-internal");
  1150. ret = of_property_read_string(pdev->dev.of_node,
  1151. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  1152. if (ret) {
  1153. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed",
  1154. "qcom,mbhc-audio-jack-type",
  1155. pdev->dev.of_node->full_name);
  1156. mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
  1157. mbhc_cfg.enable_anc_mic_detect = false;
  1158. dev_dbg(&pdev->dev, "Jack type properties set to default");
  1159. } else {
  1160. if (!strncmp(mbhc_audio_jack_type, "4-pole-jack", n)) {
  1161. mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
  1162. mbhc_cfg.enable_anc_mic_detect = false;
  1163. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  1164. } else if (!strncmp(mbhc_audio_jack_type, "5-pole-jack", n)) {
  1165. mbhc_cfg.hw_jack_type = FIVE_POLE_JACK;
  1166. mbhc_cfg.enable_anc_mic_detect = true;
  1167. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  1168. } else if (!strncmp(mbhc_audio_jack_type, "6-pole-jack", n)) {
  1169. mbhc_cfg.hw_jack_type = SIX_POLE_JACK;
  1170. mbhc_cfg.enable_anc_mic_detect = true;
  1171. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  1172. } else {
  1173. mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
  1174. mbhc_cfg.enable_anc_mic_detect = false;
  1175. dev_dbg(&pdev->dev, "Unknown value, hence setting to default");
  1176. }
  1177. }
  1178. spdev = pdev;
  1179. ret = snd_soc_register_card(card);
  1180. if (ret == -EPROBE_DEFER)
  1181. goto err1;
  1182. else if (ret) {
  1183. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  1184. ret);
  1185. goto err1;
  1186. }
  1187. return 0;
  1188. err1:
  1189. mutex_destroy(&cdc_mclk_mutex);
  1190. if (pcbcr)
  1191. iounmap(pcbcr);
  1192. if (prcgr)
  1193. iounmap(prcgr);
  1194. err:
  1195. return ret;
  1196. }
  1197. static int __devexit msm8x10_asoc_machine_remove(struct platform_device *pdev)
  1198. {
  1199. struct snd_soc_card *card = platform_get_drvdata(pdev);
  1200. if (gpio_is_valid(ext_spk_amp_gpio))
  1201. gpio_free(ext_spk_amp_gpio);
  1202. snd_soc_unregister_card(card);
  1203. mutex_destroy(&cdc_mclk_mutex);
  1204. iounmap(pcbcr);
  1205. iounmap(prcgr);
  1206. return 0;
  1207. }
  1208. static const struct of_device_id msm8x10_asoc_machine_of_match[] = {
  1209. { .compatible = "qcom,msm8x10-audio-codec", },
  1210. {},
  1211. };
  1212. static struct platform_driver msm8x10_asoc_machine_driver = {
  1213. .driver = {
  1214. .name = DRV_NAME,
  1215. .owner = THIS_MODULE,
  1216. .pm = &snd_soc_pm_ops,
  1217. .of_match_table = msm8x10_asoc_machine_of_match,
  1218. },
  1219. .probe = msm8x10_asoc_machine_probe,
  1220. .remove = __devexit_p(msm8x10_asoc_machine_remove),
  1221. };
  1222. module_platform_driver(msm8x10_asoc_machine_driver);
  1223. MODULE_DESCRIPTION("ALSA SoC msm");
  1224. MODULE_LICENSE("GPL v2");
  1225. MODULE_ALIAS("platform:" DRV_NAME);
  1226. MODULE_DEVICE_TABLE(of, msm8x10_asoc_machine_of_match);