msm-dai-q6.c 54 KB

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  1. /* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/device.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/mfd/wcd9xxx/core.h>
  17. #include <linux/bitops.h>
  18. #include <linux/slab.h>
  19. #include <linux/clk.h>
  20. #include <sound/core.h>
  21. #include <sound/pcm.h>
  22. #include <sound/soc.h>
  23. #include <sound/apr_audio.h>
  24. #include <sound/q6afe.h>
  25. #include <sound/msm-dai-q6.h>
  26. #include <sound/pcm_params.h>
  27. #include <mach/clk.h>
  28. enum {
  29. STATUS_PORT_STARTED, /* track if AFE port has started */
  30. STATUS_MAX
  31. };
  32. struct msm_dai_q6_dai_data {
  33. DECLARE_BITMAP(status_mask, STATUS_MAX);
  34. u32 rate;
  35. u32 channels;
  36. u32 bitwidth;
  37. union afe_port_config port_config;
  38. };
  39. struct msm_dai_q6_mi2s_dai_config {
  40. u16 pdata_mi2s_lines;
  41. struct msm_dai_q6_dai_data mi2s_dai_data;
  42. };
  43. struct msm_dai_q6_mi2s_dai_data {
  44. struct msm_dai_q6_mi2s_dai_config tx_dai;
  45. struct msm_dai_q6_mi2s_dai_config rx_dai;
  46. struct snd_pcm_hw_constraint_list rate_constraint;
  47. struct snd_pcm_hw_constraint_list bitwidth_constraint;
  48. };
  49. static struct clk *pcm_clk;
  50. static struct clk *sec_pcm_clk;
  51. static DEFINE_MUTEX(aux_pcm_mutex);
  52. static int aux_pcm_count;
  53. static struct msm_dai_auxpcm_pdata *auxpcm_plat_data;
  54. static struct msm_dai_auxpcm_pdata *sec_auxpcm_plat_data;
  55. static int msm_dai_q6_mi2s_format_put(struct snd_kcontrol *kcontrol,
  56. struct snd_ctl_elem_value *ucontrol)
  57. {
  58. struct msm_dai_q6_dai_data *dai_data = kcontrol->private_data;
  59. int value = ucontrol->value.integer.value[0];
  60. dai_data->port_config.mi2s.format = value;
  61. pr_debug("%s: value = %d, channel = %d, line = %d\n",
  62. __func__, value, dai_data->port_config.mi2s.channel,
  63. dai_data->port_config.mi2s.line);
  64. return 0;
  65. }
  66. static int msm_dai_q6_mi2s_format_get(struct snd_kcontrol *kcontrol,
  67. struct snd_ctl_elem_value *ucontrol)
  68. {
  69. struct msm_dai_q6_dai_data *dai_data = kcontrol->private_data;
  70. ucontrol->value.integer.value[0] = dai_data->port_config.mi2s.format ;
  71. return 0;
  72. }
  73. /* MI2S format field for AFE_PORT_CMD_I2S_CONFIG command
  74. * 0: linear PCM
  75. * 1: non-linear PCM
  76. * 2: PCM data in IEC 60968 container
  77. * 3: compressed data in IEC 60958 container
  78. */
  79. static const char *mi2s_format[] = {
  80. "LPCM",
  81. "Compr",
  82. "LPCM-60958",
  83. "Compr-60958"};
  84. static const struct soc_enum mi2s_config_enum[] = {
  85. SOC_ENUM_SINGLE_EXT(4, mi2s_format),
  86. };
  87. static const struct snd_kcontrol_new mi2s_config_controls[] = {
  88. SOC_ENUM_EXT("MI2S RX Format", mi2s_config_enum[0],
  89. msm_dai_q6_mi2s_format_get,
  90. msm_dai_q6_mi2s_format_put),
  91. SOC_ENUM_EXT("SEC RX Format", mi2s_config_enum[0],
  92. msm_dai_q6_mi2s_format_get,
  93. msm_dai_q6_mi2s_format_put),
  94. SOC_ENUM_EXT("MI2S TX Format", mi2s_config_enum[0],
  95. msm_dai_q6_mi2s_format_get,
  96. msm_dai_q6_mi2s_format_put),
  97. };
  98. static u8 num_of_bits_set(u8 sd_line_mask)
  99. {
  100. u8 num_bits_set = 0;
  101. while (sd_line_mask) {
  102. num_bits_set++;
  103. sd_line_mask = sd_line_mask & (sd_line_mask - 1);
  104. }
  105. return num_bits_set;
  106. }
  107. static int msm_dai_q6_mi2s_startup(struct snd_pcm_substream *substream,
  108. struct snd_soc_dai *dai)
  109. {
  110. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  111. dev_get_drvdata(dai->dev);
  112. dev_dbg(dai->dev, "%s: cnst list %p\n", __func__,
  113. mi2s_dai_data->rate_constraint.list);
  114. if (mi2s_dai_data->rate_constraint.list) {
  115. snd_pcm_hw_constraint_list(substream->runtime, 0,
  116. SNDRV_PCM_HW_PARAM_RATE,
  117. &mi2s_dai_data->rate_constraint);
  118. snd_pcm_hw_constraint_list(substream->runtime, 0,
  119. SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
  120. &mi2s_dai_data->bitwidth_constraint);
  121. }
  122. return 0;
  123. }
  124. static int msm_dai_q6_mi2s_hw_params(struct snd_pcm_substream *substream,
  125. struct snd_pcm_hw_params *params,
  126. struct snd_soc_dai *dai)
  127. {
  128. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  129. dev_get_drvdata(dai->dev);
  130. struct msm_dai_q6_mi2s_dai_config *mi2s_dai_config =
  131. (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  132. &mi2s_dai_data->rx_dai : &mi2s_dai_data->tx_dai);
  133. struct msm_dai_q6_dai_data *dai_data = &mi2s_dai_config->mi2s_dai_data;
  134. dai_data->channels = params_channels(params);
  135. switch (dai_data->channels) {
  136. case 8:
  137. case 7:
  138. if (mi2s_dai_config->pdata_mi2s_lines < AFE_I2S_8CHS)
  139. goto error_invalid_data;
  140. dai_data->port_config.mi2s.line = AFE_I2S_8CHS;
  141. break;
  142. case 6:
  143. case 5:
  144. if (mi2s_dai_config->pdata_mi2s_lines < AFE_I2S_6CHS)
  145. goto error_invalid_data;
  146. dai_data->port_config.mi2s.line = AFE_I2S_6CHS;
  147. break;
  148. case 4:
  149. case 3:
  150. if (mi2s_dai_config->pdata_mi2s_lines < AFE_I2S_QUAD01)
  151. goto error_invalid_data;
  152. if (mi2s_dai_config->pdata_mi2s_lines == AFE_I2S_QUAD23)
  153. dai_data->port_config.mi2s.line =
  154. mi2s_dai_config->pdata_mi2s_lines;
  155. else
  156. dai_data->port_config.mi2s.line = AFE_I2S_QUAD01;
  157. break;
  158. case 2:
  159. case 1:
  160. if (mi2s_dai_config->pdata_mi2s_lines < AFE_I2S_SD0)
  161. goto error_invalid_data;
  162. switch (mi2s_dai_config->pdata_mi2s_lines) {
  163. case AFE_I2S_SD0:
  164. case AFE_I2S_SD1:
  165. case AFE_I2S_SD2:
  166. case AFE_I2S_SD3:
  167. dai_data->port_config.mi2s.line =
  168. mi2s_dai_config->pdata_mi2s_lines;
  169. break;
  170. case AFE_I2S_QUAD01:
  171. case AFE_I2S_6CHS:
  172. case AFE_I2S_8CHS:
  173. dai_data->port_config.mi2s.line = AFE_I2S_SD0;
  174. break;
  175. case AFE_I2S_QUAD23:
  176. dai_data->port_config.mi2s.line = AFE_I2S_SD2;
  177. break;
  178. }
  179. if (dai_data->channels == 2)
  180. dai_data->port_config.mi2s.channel = MSM_AFE_STEREO;
  181. else
  182. dai_data->port_config.mi2s.channel = MSM_AFE_MONO;
  183. break;
  184. default:
  185. goto error_invalid_data;
  186. }
  187. dai_data->rate = params_rate(params);
  188. dai_data->port_config.mi2s.bitwidth = 16;
  189. dai_data->bitwidth = 16;
  190. if (!mi2s_dai_data->rate_constraint.list) {
  191. mi2s_dai_data->rate_constraint.list = &dai_data->rate;
  192. mi2s_dai_data->bitwidth_constraint.list = &dai_data->bitwidth;
  193. }
  194. pr_debug("%s: dai_data->channels = %d, line = %d\n", __func__,
  195. dai_data->channels, dai_data->port_config.mi2s.line);
  196. return 0;
  197. error_invalid_data:
  198. pr_err("%s: dai_data->channels = %d, line = %d\n", __func__,
  199. dai_data->channels, dai_data->port_config.mi2s.line);
  200. return -EINVAL;
  201. }
  202. static int msm_dai_q6_mi2s_get_lineconfig(u16 sd_lines, u16 *config_ptr,
  203. unsigned int *ch_cnt)
  204. {
  205. u8 num_of_sd_lines;
  206. num_of_sd_lines = num_of_bits_set(sd_lines);
  207. switch (num_of_sd_lines) {
  208. case 0:
  209. pr_debug("%s: no line is assigned\n", __func__);
  210. break;
  211. case 1:
  212. switch (sd_lines) {
  213. case MSM_MI2S_SD0:
  214. *config_ptr = AFE_I2S_SD0;
  215. break;
  216. case MSM_MI2S_SD1:
  217. *config_ptr = AFE_I2S_SD1;
  218. break;
  219. case MSM_MI2S_SD2:
  220. *config_ptr = AFE_I2S_SD2;
  221. break;
  222. case MSM_MI2S_SD3:
  223. *config_ptr = AFE_I2S_SD3;
  224. break;
  225. default:
  226. pr_err("%s: invalid SD line\n",
  227. __func__);
  228. goto error_invalid_data;
  229. }
  230. break;
  231. case 2:
  232. switch (sd_lines) {
  233. case MSM_MI2S_SD0 | MSM_MI2S_SD1:
  234. *config_ptr = AFE_I2S_QUAD01;
  235. break;
  236. case MSM_MI2S_SD2 | MSM_MI2S_SD3:
  237. *config_ptr = AFE_I2S_QUAD23;
  238. break;
  239. default:
  240. pr_err("%s: invalid SD line\n",
  241. __func__);
  242. goto error_invalid_data;
  243. }
  244. break;
  245. case 3:
  246. switch (sd_lines) {
  247. case MSM_MI2S_SD0 | MSM_MI2S_SD1 | MSM_MI2S_SD2:
  248. *config_ptr = AFE_I2S_6CHS;
  249. break;
  250. default:
  251. pr_err("%s: invalid SD lines\n",
  252. __func__);
  253. goto error_invalid_data;
  254. }
  255. break;
  256. case 4:
  257. switch (sd_lines) {
  258. case MSM_MI2S_SD0 | MSM_MI2S_SD1 | MSM_MI2S_SD2 | MSM_MI2S_SD3:
  259. *config_ptr = AFE_I2S_8CHS;
  260. break;
  261. default:
  262. pr_err("%s: invalid SD lines\n",
  263. __func__);
  264. goto error_invalid_data;
  265. }
  266. break;
  267. default:
  268. pr_err("%s: invalid SD lines\n", __func__);
  269. goto error_invalid_data;
  270. }
  271. *ch_cnt = num_of_sd_lines;
  272. return 0;
  273. error_invalid_data:
  274. return -EINVAL;
  275. }
  276. static int msm_dai_q6_mi2s_platform_data_validation(
  277. struct platform_device *pdev, struct snd_soc_dai_driver *dai_driver)
  278. {
  279. struct msm_dai_q6_mi2s_dai_data *dai_data = dev_get_drvdata(&pdev->dev);
  280. struct msm_mi2s_pdata *mi2s_pdata =
  281. (struct msm_mi2s_pdata *) pdev->dev.platform_data;
  282. u16 sdline_config;
  283. unsigned int ch_cnt;
  284. int rc = 0;
  285. if ((mi2s_pdata->rx_sd_lines & mi2s_pdata->tx_sd_lines) ||
  286. (!mi2s_pdata->rx_sd_lines && !mi2s_pdata->tx_sd_lines)) {
  287. dev_err(&pdev->dev,
  288. "error sd line conflict or no line assigned\n");
  289. rc = -EINVAL;
  290. goto rtn;
  291. }
  292. rc = msm_dai_q6_mi2s_get_lineconfig(mi2s_pdata->rx_sd_lines,
  293. &sdline_config, &ch_cnt);
  294. if (IS_ERR_VALUE(rc)) {
  295. dev_err(&pdev->dev, "invalid MI2S RX sd line config\n");
  296. goto rtn;
  297. }
  298. if (ch_cnt) {
  299. dai_data->rx_dai.mi2s_dai_data.port_config.mi2s.line =
  300. sdline_config;
  301. dai_data->rx_dai.pdata_mi2s_lines = sdline_config;
  302. dai_driver->playback.channels_min = 1;
  303. dai_driver->playback.channels_max = ch_cnt << 1;
  304. } else {
  305. dai_driver->playback.channels_min = 0;
  306. dai_driver->playback.channels_max = 0;
  307. }
  308. rc = msm_dai_q6_mi2s_get_lineconfig(mi2s_pdata->tx_sd_lines,
  309. &sdline_config, &ch_cnt);
  310. if (IS_ERR_VALUE(rc)) {
  311. dev_err(&pdev->dev, "invalid MI2S TX sd line config\n");
  312. goto rtn;
  313. }
  314. if (ch_cnt) {
  315. dai_data->tx_dai.mi2s_dai_data.port_config.mi2s.line =
  316. sdline_config;
  317. dai_data->tx_dai.pdata_mi2s_lines = sdline_config;
  318. dai_driver->capture.channels_min = 1;
  319. dai_driver->capture.channels_max = ch_cnt << 1;
  320. } else {
  321. dai_driver->capture.channels_min = 0;
  322. dai_driver->capture.channels_max = 0;
  323. }
  324. dev_info(&pdev->dev, "%s: playback sdline %x capture sdline %x\n",
  325. __func__, dai_data->rx_dai.pdata_mi2s_lines,
  326. dai_data->tx_dai.pdata_mi2s_lines);
  327. dev_info(&pdev->dev, "%s: playback ch_max %d capture ch_mx %d\n",
  328. __func__, dai_driver->playback.channels_max,
  329. dai_driver->capture.channels_max);
  330. rtn:
  331. return rc;
  332. }
  333. static int msm_dai_q6_mi2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  334. {
  335. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  336. dev_get_drvdata(dai->dev);
  337. if (test_bit(STATUS_PORT_STARTED,
  338. mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask) ||
  339. test_bit(STATUS_PORT_STARTED,
  340. mi2s_dai_data->tx_dai.mi2s_dai_data.status_mask)) {
  341. dev_err(dai->dev, "%s: err chg i2s mode while dai running",
  342. __func__);
  343. return -EPERM;
  344. }
  345. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  346. case SND_SOC_DAIFMT_CBS_CFS:
  347. mi2s_dai_data->rx_dai.mi2s_dai_data.port_config.mi2s.ws = 1;
  348. mi2s_dai_data->tx_dai.mi2s_dai_data.port_config.mi2s.ws = 1;
  349. break;
  350. case SND_SOC_DAIFMT_CBM_CFM:
  351. mi2s_dai_data->rx_dai.mi2s_dai_data.port_config.mi2s.ws = 0;
  352. mi2s_dai_data->tx_dai.mi2s_dai_data.port_config.mi2s.ws = 0;
  353. break;
  354. default:
  355. return -EINVAL;
  356. }
  357. return 0;
  358. }
  359. static int msm_dai_q6_mi2s_prepare(struct snd_pcm_substream *substream,
  360. struct snd_soc_dai *dai)
  361. {
  362. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  363. dev_get_drvdata(dai->dev);
  364. struct msm_dai_q6_dai_data *dai_data =
  365. (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  366. &mi2s_dai_data->rx_dai.mi2s_dai_data :
  367. &mi2s_dai_data->tx_dai.mi2s_dai_data);
  368. u16 port_id = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  369. MI2S_RX : MI2S_TX);
  370. int rc = 0;
  371. if (!test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
  372. /* PORT START should be set if prepare called in active state */
  373. rc = afe_port_start(port_id, &dai_data->port_config,
  374. dai_data->rate);
  375. if (IS_ERR_VALUE(rc))
  376. dev_err(dai->dev, "fail to open AFE port %x\n",
  377. dai->id);
  378. else
  379. set_bit(STATUS_PORT_STARTED,
  380. dai_data->status_mask);
  381. }
  382. return rc;
  383. }
  384. static void msm_dai_q6_mi2s_shutdown(struct snd_pcm_substream *substream,
  385. struct snd_soc_dai *dai)
  386. {
  387. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  388. dev_get_drvdata(dai->dev);
  389. struct msm_dai_q6_dai_data *dai_data =
  390. (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  391. &mi2s_dai_data->rx_dai.mi2s_dai_data :
  392. &mi2s_dai_data->tx_dai.mi2s_dai_data);
  393. u16 port_id = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  394. MI2S_RX : MI2S_TX);
  395. int rc = 0;
  396. if (test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
  397. rc = afe_close(port_id);
  398. if (IS_ERR_VALUE(rc))
  399. dev_err(dai->dev, "fail to close AFE port\n");
  400. clear_bit(STATUS_PORT_STARTED, dai_data->status_mask);
  401. }
  402. if (!test_bit(STATUS_PORT_STARTED,
  403. mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask) &&
  404. !test_bit(STATUS_PORT_STARTED,
  405. mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask)) {
  406. mi2s_dai_data->rate_constraint.list = NULL;
  407. mi2s_dai_data->bitwidth_constraint.list = NULL;
  408. }
  409. }
  410. static int msm_dai_q6_cdc_hw_params(struct snd_pcm_hw_params *params,
  411. struct snd_soc_dai *dai, int stream)
  412. {
  413. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  414. dai_data->channels = params_channels(params);
  415. switch (dai_data->channels) {
  416. case 2:
  417. case 4:
  418. case 6:
  419. case 8:
  420. dai_data->port_config.mi2s.channel = MSM_AFE_STEREO;
  421. break;
  422. case 1:
  423. dai_data->port_config.mi2s.channel = MSM_AFE_MONO;
  424. break;
  425. default:
  426. return -EINVAL;
  427. break;
  428. }
  429. dai_data->rate = params_rate(params);
  430. dev_dbg(dai->dev, " channel %d sample rate %d entered\n",
  431. dai_data->channels, dai_data->rate);
  432. /* Q6 only supports 16 as now */
  433. dai_data->port_config.mi2s.bitwidth = 16;
  434. dai_data->port_config.mi2s.line = 1;
  435. return 0;
  436. }
  437. static int msm_dai_q6_cdc_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  438. {
  439. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  440. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  441. case SND_SOC_DAIFMT_CBS_CFS:
  442. dai_data->port_config.mi2s.ws = 1; /* CPU is master */
  443. break;
  444. case SND_SOC_DAIFMT_CBM_CFM:
  445. dai_data->port_config.mi2s.ws = 0; /* CPU is slave */
  446. break;
  447. default:
  448. return -EINVAL;
  449. }
  450. return 0;
  451. }
  452. static int msm_dai_q6_slim_bus_hw_params(struct snd_pcm_hw_params *params,
  453. struct snd_soc_dai *dai, int stream)
  454. {
  455. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  456. dai_data->channels = params_channels(params);
  457. dai_data->rate = params_rate(params);
  458. /* Q6 only supports 16 as now */
  459. dai_data->port_config.slim_sch.bit_width = 16;
  460. dai_data->port_config.slim_sch.data_format = 0;
  461. dai_data->port_config.slim_sch.num_channels = dai_data->channels;
  462. dai_data->port_config.slim_sch.reserved = 0;
  463. dev_dbg(dai->dev, "%s:slimbus_dev_id[%hu] bit_wd[%hu] format[%hu]\n"
  464. "num_channel %hu slave_ch_mapping[0] %hu\n"
  465. "slave_port_mapping[1] %hu slave_port_mapping[2] %hu\n"
  466. "slave_port_mapping[3] %hu\n sample_rate %d\n", __func__,
  467. dai_data->port_config.slim_sch.slimbus_dev_id,
  468. dai_data->port_config.slim_sch.bit_width,
  469. dai_data->port_config.slim_sch.data_format,
  470. dai_data->port_config.slim_sch.num_channels,
  471. dai_data->port_config.slim_sch.slave_ch_mapping[0],
  472. dai_data->port_config.slim_sch.slave_ch_mapping[1],
  473. dai_data->port_config.slim_sch.slave_ch_mapping[2],
  474. dai_data->port_config.slim_sch.slave_ch_mapping[3],
  475. dai_data->rate);
  476. return 0;
  477. }
  478. static int msm_dai_q6_bt_fm_hw_params(struct snd_pcm_hw_params *params,
  479. struct snd_soc_dai *dai, int stream)
  480. {
  481. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  482. dai_data->channels = params_channels(params);
  483. dai_data->rate = params_rate(params);
  484. dev_dbg(dai->dev, "channels %d sample rate %d entered\n",
  485. dai_data->channels, dai_data->rate);
  486. memset(&dai_data->port_config, 0, sizeof(dai_data->port_config));
  487. return 0;
  488. }
  489. static int msm_dai_q6_auxpcm_hw_params(
  490. struct snd_pcm_substream *substream,
  491. struct snd_pcm_hw_params *params,
  492. struct snd_soc_dai *dai)
  493. {
  494. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  495. struct msm_dai_auxpcm_pdata *auxpcm_pdata =
  496. (struct msm_dai_auxpcm_pdata *) dai->dev->platform_data;
  497. if (params_channels(params) != 1) {
  498. dev_err(dai->dev, "AUX PCM supports only mono stream\n");
  499. return -EINVAL;
  500. }
  501. dai_data->channels = params_channels(params);
  502. dai_data->rate = params_rate(params);
  503. switch (dai_data->rate) {
  504. case 8000:
  505. dai_data->port_config.pcm.mode = auxpcm_pdata->mode_8k.mode;
  506. dai_data->port_config.pcm.sync = auxpcm_pdata->mode_8k.sync;
  507. dai_data->port_config.pcm.frame = auxpcm_pdata->mode_8k.frame;
  508. dai_data->port_config.pcm.quant = auxpcm_pdata->mode_8k.quant;
  509. dai_data->port_config.pcm.slot = auxpcm_pdata->mode_8k.slot;
  510. dai_data->port_config.pcm.data = auxpcm_pdata->mode_8k.data;
  511. break;
  512. case 16000:
  513. dai_data->port_config.pcm.mode = auxpcm_pdata->mode_16k.mode;
  514. dai_data->port_config.pcm.sync = auxpcm_pdata->mode_16k.sync;
  515. dai_data->port_config.pcm.frame = auxpcm_pdata->mode_16k.frame;
  516. dai_data->port_config.pcm.quant = auxpcm_pdata->mode_16k.quant;
  517. dai_data->port_config.pcm.slot = auxpcm_pdata->mode_16k.slot;
  518. dai_data->port_config.pcm.data = auxpcm_pdata->mode_16k.data;
  519. break;
  520. default:
  521. dev_err(dai->dev, "AUX PCM supports only 8kHz and 16kHz sampling rate\n");
  522. return -EINVAL;
  523. }
  524. return 0;
  525. }
  526. static int msm_dai_q6_sec_auxpcm_hw_params(
  527. struct snd_pcm_substream *substream,
  528. struct snd_pcm_hw_params *params,
  529. struct snd_soc_dai *dai)
  530. {
  531. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  532. struct msm_dai_auxpcm_pdata *auxpcm_pdata =
  533. (struct msm_dai_auxpcm_pdata *) dai->dev->platform_data;
  534. pr_debug("%s\n", __func__);
  535. if (params_channels(params) != 1) {
  536. dev_err(dai->dev, "SEC AUX PCM supports only mono stream\n");
  537. return -EINVAL;
  538. }
  539. dai_data->channels = params_channels(params);
  540. dai_data->rate = params_rate(params);
  541. switch (dai_data->rate) {
  542. case 8000:
  543. dai_data->port_config.pcm.mode = auxpcm_pdata->mode_8k.mode;
  544. dai_data->port_config.pcm.sync = auxpcm_pdata->mode_8k.sync;
  545. dai_data->port_config.pcm.frame = auxpcm_pdata->mode_8k.frame;
  546. dai_data->port_config.pcm.quant = auxpcm_pdata->mode_8k.quant;
  547. dai_data->port_config.pcm.slot = auxpcm_pdata->mode_8k.slot;
  548. dai_data->port_config.pcm.data = auxpcm_pdata->mode_8k.data;
  549. break;
  550. case 16000:
  551. dai_data->port_config.pcm.mode = auxpcm_pdata->mode_16k.mode;
  552. dai_data->port_config.pcm.sync = auxpcm_pdata->mode_16k.sync;
  553. dai_data->port_config.pcm.frame = auxpcm_pdata->mode_16k.frame;
  554. dai_data->port_config.pcm.quant = auxpcm_pdata->mode_16k.quant;
  555. dai_data->port_config.pcm.slot = auxpcm_pdata->mode_16k.slot;
  556. dai_data->port_config.pcm.data = auxpcm_pdata->mode_16k.data;
  557. break;
  558. default:
  559. dev_err(dai->dev, "AUX PCM supports only 8kHz and 16kHz sampling rate\n");
  560. return -EINVAL;
  561. }
  562. return 0;
  563. }
  564. static int msm_dai_q6_afe_rtproxy_hw_params(struct snd_pcm_hw_params *params,
  565. struct snd_soc_dai *dai)
  566. {
  567. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  568. dai_data->rate = params_rate(params);
  569. dai_data->port_config.rtproxy.num_ch =
  570. params_channels(params);
  571. pr_debug("channel %d entered,dai_id: %d,rate: %d\n",
  572. dai_data->port_config.rtproxy.num_ch, dai->id, dai_data->rate);
  573. dai_data->port_config.rtproxy.bitwidth = 16; /* Q6 only supports 16 */
  574. dai_data->port_config.rtproxy.interleaved = 1;
  575. dai_data->port_config.rtproxy.frame_sz = params_period_bytes(params);
  576. dai_data->port_config.rtproxy.jitter =
  577. dai_data->port_config.rtproxy.frame_sz/2;
  578. dai_data->port_config.rtproxy.lw_mark = 0;
  579. dai_data->port_config.rtproxy.hw_mark = 0;
  580. dai_data->port_config.rtproxy.rsvd = 0;
  581. return 0;
  582. }
  583. static int msm_dai_q6_pseudo_hw_params(struct snd_pcm_hw_params *params,
  584. struct snd_soc_dai *dai)
  585. {
  586. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  587. dai_data->rate = params_rate(params);
  588. dai_data->channels = params_channels(params) > 6 ?
  589. params_channels(params) : 6;
  590. dai_data->port_config.pseudo.bit_width = 16;
  591. dai_data->port_config.pseudo.num_channels =
  592. dai_data->channels;
  593. dai_data->port_config.pseudo.data_format = 0;
  594. dai_data->port_config.pseudo.timing_mode = 1;
  595. dai_data->port_config.pseudo.reserved = 16;
  596. return 0;
  597. }
  598. /* Current implementation assumes hw_param is called once
  599. * This may not be the case but what to do when ADM and AFE
  600. * port are already opened and parameter changes
  601. */
  602. static int msm_dai_q6_hw_params(struct snd_pcm_substream *substream,
  603. struct snd_pcm_hw_params *params,
  604. struct snd_soc_dai *dai)
  605. {
  606. int rc = 0;
  607. switch (dai->id) {
  608. case PRIMARY_I2S_TX:
  609. case PRIMARY_I2S_RX:
  610. case SECONDARY_I2S_RX:
  611. case SECONDARY_I2S_TX:
  612. rc = msm_dai_q6_cdc_hw_params(params, dai, substream->stream);
  613. break;
  614. case SLIMBUS_0_RX:
  615. case SLIMBUS_1_RX:
  616. case SLIMBUS_3_RX:
  617. case SLIMBUS_0_TX:
  618. case SLIMBUS_1_TX:
  619. case SLIMBUS_2_RX:
  620. case SLIMBUS_2_TX:
  621. case SLIMBUS_3_TX:
  622. case SLIMBUS_4_RX:
  623. case SLIMBUS_4_TX:
  624. rc = msm_dai_q6_slim_bus_hw_params(params, dai,
  625. substream->stream);
  626. break;
  627. case INT_BT_SCO_RX:
  628. case INT_BT_SCO_TX:
  629. case INT_FM_RX:
  630. case INT_FM_TX:
  631. rc = msm_dai_q6_bt_fm_hw_params(params, dai, substream->stream);
  632. break;
  633. case RT_PROXY_DAI_001_TX:
  634. case RT_PROXY_DAI_001_RX:
  635. case RT_PROXY_DAI_002_TX:
  636. case RT_PROXY_DAI_002_RX:
  637. rc = msm_dai_q6_afe_rtproxy_hw_params(params, dai);
  638. break;
  639. case PSEUDOPORT_01:
  640. rc = msm_dai_q6_pseudo_hw_params(params, dai);
  641. break;
  642. case VOICE_PLAYBACK_TX:
  643. case VOICE_RECORD_RX:
  644. case VOICE_RECORD_TX:
  645. rc = 0;
  646. break;
  647. default:
  648. dev_err(dai->dev, "invalid AFE port ID\n");
  649. rc = -EINVAL;
  650. break;
  651. }
  652. return rc;
  653. }
  654. static void msm_dai_q6_auxpcm_shutdown(struct snd_pcm_substream *substream,
  655. struct snd_soc_dai *dai)
  656. {
  657. int rc = 0;
  658. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  659. mutex_lock(&aux_pcm_mutex);
  660. dev_dbg(dai->dev, "%s dai->id = %d", __func__, dai->id);
  661. if (!test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
  662. mutex_unlock(&aux_pcm_mutex);
  663. return;
  664. }
  665. clear_bit(STATUS_PORT_STARTED, dai_data->status_mask);
  666. aux_pcm_count--;
  667. if (aux_pcm_count > 0) {
  668. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count = %d\n",
  669. __func__, dai->id, aux_pcm_count);
  670. mutex_unlock(&aux_pcm_mutex);
  671. return;
  672. } else if (aux_pcm_count < 0) {
  673. dev_err(dai->dev, "%s(): ERROR: dai->id %d"
  674. " aux_pcm_count = %d < 0\n",
  675. __func__, dai->id, aux_pcm_count);
  676. aux_pcm_count = 0;
  677. mutex_unlock(&aux_pcm_mutex);
  678. return;
  679. }
  680. pr_debug("%s: dai->id = %d aux_pcm_count = %d\n", __func__,
  681. dai->id, aux_pcm_count);
  682. clk_disable_unprepare(pcm_clk);
  683. rc = afe_close(PCM_RX); /* can block */
  684. if (IS_ERR_VALUE(rc))
  685. dev_err(dai->dev, "fail to close PCM_RX AFE port\n");
  686. rc = afe_close(PCM_TX);
  687. if (IS_ERR_VALUE(rc))
  688. dev_err(dai->dev, "fail to close AUX PCM TX port\n");
  689. mutex_unlock(&aux_pcm_mutex);
  690. }
  691. static void msm_dai_q6_sec_auxpcm_shutdown(struct snd_pcm_substream *substream,
  692. struct snd_soc_dai *dai)
  693. {
  694. int rc = 0;
  695. pr_debug("%s\n", __func__);
  696. mutex_lock(&aux_pcm_mutex);
  697. if (aux_pcm_count == 0) {
  698. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count is 0. Just"
  699. " return\n", __func__, dai->id);
  700. mutex_unlock(&aux_pcm_mutex);
  701. return;
  702. }
  703. aux_pcm_count--;
  704. if (aux_pcm_count > 0) {
  705. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count = %d\n",
  706. __func__, dai->id, aux_pcm_count);
  707. mutex_unlock(&aux_pcm_mutex);
  708. return;
  709. } else if (aux_pcm_count < 0) {
  710. dev_err(dai->dev, "%s(): ERROR: dai->id %d"
  711. " aux_pcm_count = %d < 0\n",
  712. __func__, dai->id, aux_pcm_count);
  713. aux_pcm_count = 0;
  714. mutex_unlock(&aux_pcm_mutex);
  715. return;
  716. }
  717. pr_debug("%s: dai->id = %d aux_pcm_count = %d\n", __func__,
  718. dai->id, aux_pcm_count);
  719. clk_disable_unprepare(sec_pcm_clk);
  720. rc = afe_close(SECONDARY_PCM_RX); /* can block */
  721. if (IS_ERR_VALUE(rc))
  722. dev_err(dai->dev, "fail to close PCM_RX AFE port\n");
  723. rc = afe_close(SECONDARY_PCM_TX);
  724. if (IS_ERR_VALUE(rc))
  725. dev_err(dai->dev, "fail to close AUX PCM TX port\n");
  726. mutex_unlock(&aux_pcm_mutex);
  727. }
  728. static void msm_dai_q6_shutdown(struct snd_pcm_substream *substream,
  729. struct snd_soc_dai *dai)
  730. {
  731. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  732. int rc = 0;
  733. if (test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
  734. switch (dai->id) {
  735. case VOICE_PLAYBACK_TX:
  736. case VOICE_RECORD_TX:
  737. case VOICE_RECORD_RX:
  738. pr_debug("%s, stop pseudo port:%d\n",
  739. __func__, dai->id);
  740. rc = afe_stop_pseudo_port(dai->id);
  741. break;
  742. default:
  743. rc = afe_close(dai->id); /* can block */
  744. break;
  745. }
  746. if (IS_ERR_VALUE(rc))
  747. dev_err(dai->dev, "fail to close AFE port\n");
  748. pr_debug("%s: dai_data->status_mask = %ld\n", __func__,
  749. *dai_data->status_mask);
  750. clear_bit(STATUS_PORT_STARTED, dai_data->status_mask);
  751. }
  752. }
  753. static int msm_dai_q6_auxpcm_prepare(struct snd_pcm_substream *substream,
  754. struct snd_soc_dai *dai)
  755. {
  756. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  757. int rc = 0;
  758. struct msm_dai_auxpcm_pdata *auxpcm_pdata =
  759. (struct msm_dai_auxpcm_pdata *) dai->dev->platform_data;
  760. unsigned long pcm_clk_rate;
  761. mutex_lock(&aux_pcm_mutex);
  762. set_bit(STATUS_PORT_STARTED,
  763. dai_data->status_mask);
  764. dev_dbg(dai->dev, "%s dai->id = %d", __func__, dai->id);
  765. aux_pcm_count++;
  766. if (aux_pcm_count >= 2) {
  767. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count = %d >= 2\n",
  768. __func__, dai->id, aux_pcm_count);
  769. mutex_unlock(&aux_pcm_mutex);
  770. return 0;
  771. }
  772. pr_debug("%s:dai->id:%d aux_pcm_count = %d. opening afe\n",
  773. __func__, dai->id, aux_pcm_count);
  774. rc = afe_q6_interface_prepare();
  775. if (IS_ERR_VALUE(rc))
  776. dev_err(dai->dev, "fail to open AFE APR\n");
  777. /*
  778. * For AUX PCM Interface the below sequence of clk
  779. * settings and opening of afe port is a strict requirement.
  780. * afe_port_start is called to make sure to make sure the port
  781. * is open before deasserting the clock line. This is
  782. * required because pcm register is not written before
  783. * clock deassert. Hence the hw does not get updated with
  784. * new setting if the below clock assert/deasset and afe_port_start
  785. * sequence is not followed.
  786. */
  787. clk_reset(pcm_clk, CLK_RESET_ASSERT);
  788. afe_port_start(PCM_RX, &dai_data->port_config, dai_data->rate);
  789. afe_port_start(PCM_TX, &dai_data->port_config, dai_data->rate);
  790. if (dai_data->rate == 8000) {
  791. pcm_clk_rate = auxpcm_pdata->mode_8k.pcm_clk_rate;
  792. } else if (dai_data->rate == 16000) {
  793. pcm_clk_rate = auxpcm_pdata->mode_16k.pcm_clk_rate;
  794. } else {
  795. dev_err(dai->dev, "%s: Invalid AUX PCM rate %d\n", __func__,
  796. dai_data->rate);
  797. return -EINVAL;
  798. }
  799. rc = clk_set_rate(pcm_clk, pcm_clk_rate);
  800. if (rc < 0) {
  801. pr_err("%s: clk_set_rate failed\n", __func__);
  802. return rc;
  803. }
  804. clk_prepare_enable(pcm_clk);
  805. clk_reset(pcm_clk, CLK_RESET_DEASSERT);
  806. mutex_unlock(&aux_pcm_mutex);
  807. return rc;
  808. }
  809. static int msm_dai_q6_sec_auxpcm_prepare(struct snd_pcm_substream *substream,
  810. struct snd_soc_dai *dai)
  811. {
  812. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  813. int rc = 0;
  814. struct msm_dai_auxpcm_pdata *auxpcm_pdata =
  815. (struct msm_dai_auxpcm_pdata *) dai->dev->platform_data;
  816. unsigned long pcm_clk_rate;
  817. pr_info("%s\n", __func__);
  818. mutex_lock(&aux_pcm_mutex);
  819. if (aux_pcm_count == 2) {
  820. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count is 2. Just"
  821. " return.\n", __func__, dai->id);
  822. mutex_unlock(&aux_pcm_mutex);
  823. return 0;
  824. } else if (aux_pcm_count > 2) {
  825. dev_err(dai->dev, "%s(): ERROR: dai->id %d"
  826. " aux_pcm_count = %d > 2\n",
  827. __func__, dai->id, aux_pcm_count);
  828. mutex_unlock(&aux_pcm_mutex);
  829. return 0;
  830. }
  831. aux_pcm_count++;
  832. if (aux_pcm_count == 2) {
  833. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count = %d after "
  834. " increment\n", __func__, dai->id, aux_pcm_count);
  835. mutex_unlock(&aux_pcm_mutex);
  836. return 0;
  837. }
  838. pr_debug("%s:dai->id:%d aux_pcm_count = %d. opening afe\n",
  839. __func__, dai->id, aux_pcm_count);
  840. rc = afe_q6_interface_prepare();
  841. if (IS_ERR_VALUE(rc))
  842. dev_err(dai->dev, "fail to open AFE APR\n");
  843. /*
  844. * For AUX PCM Interface the below sequence of clk
  845. * settings and opening of afe port is a strict requirement.
  846. * afe_port_start is called to make sure to make sure the port
  847. * is open before deasserting the clock line. This is
  848. * required because pcm register is not written before
  849. * clock deassert. Hence the hw does not get updated with
  850. * new setting if the below clock assert/deasset and afe_port_start
  851. * sequence is not followed.
  852. */
  853. clk_reset(sec_pcm_clk, CLK_RESET_ASSERT);
  854. afe_port_start(SECONDARY_PCM_RX, &dai_data->port_config,
  855. dai_data->rate);
  856. afe_port_start(SECONDARY_PCM_TX, &dai_data->port_config,
  857. dai_data->rate);
  858. if (dai_data->rate == 8000) {
  859. pcm_clk_rate = auxpcm_pdata->mode_8k.pcm_clk_rate;
  860. } else if (dai_data->rate == 16000) {
  861. pcm_clk_rate = auxpcm_pdata->mode_16k.pcm_clk_rate;
  862. } else {
  863. dev_err(dai->dev, "%s: Invalid AUX PCM rate %d\n", __func__,
  864. dai_data->rate);
  865. return -EINVAL;
  866. }
  867. rc = clk_set_rate(sec_pcm_clk, pcm_clk_rate);
  868. if (rc < 0) {
  869. pr_err("%s: clk_set_rate failed\n", __func__);
  870. return rc;
  871. }
  872. clk_prepare_enable(sec_pcm_clk);
  873. clk_reset(sec_pcm_clk, CLK_RESET_DEASSERT);
  874. mutex_unlock(&aux_pcm_mutex);
  875. return rc;
  876. }
  877. static int msm_dai_q6_prepare(struct snd_pcm_substream *substream,
  878. struct snd_soc_dai *dai)
  879. {
  880. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  881. int rc = 0;
  882. if (!test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
  883. switch (dai->id) {
  884. case VOICE_PLAYBACK_TX:
  885. case VOICE_RECORD_TX:
  886. case VOICE_RECORD_RX:
  887. rc = afe_start_pseudo_port(dai->id);
  888. break;
  889. default:
  890. rc = afe_port_start(dai->id, &dai_data->port_config,
  891. dai_data->rate);
  892. }
  893. if (IS_ERR_VALUE(rc))
  894. dev_err(dai->dev, "fail to open AFE port %x\n",
  895. dai->id);
  896. else
  897. set_bit(STATUS_PORT_STARTED,
  898. dai_data->status_mask);
  899. }
  900. return rc;
  901. }
  902. static int msm_dai_q6_auxpcm_trigger(struct snd_pcm_substream *substream,
  903. int cmd, struct snd_soc_dai *dai)
  904. {
  905. int rc = 0;
  906. pr_debug("%s:port:%d cmd:%d aux_pcm_count= %d",
  907. __func__, dai->id, cmd, aux_pcm_count);
  908. switch (cmd) {
  909. case SNDRV_PCM_TRIGGER_START:
  910. case SNDRV_PCM_TRIGGER_RESUME:
  911. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  912. /* afe_open will be called from prepare */
  913. return 0;
  914. case SNDRV_PCM_TRIGGER_STOP:
  915. case SNDRV_PCM_TRIGGER_SUSPEND:
  916. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  917. return 0;
  918. default:
  919. rc = -EINVAL;
  920. }
  921. return rc;
  922. }
  923. static int msm_dai_q6_dai_auxpcm_probe(struct snd_soc_dai *dai)
  924. {
  925. struct msm_dai_q6_dai_data *dai_data;
  926. int rc = 0;
  927. struct msm_dai_auxpcm_pdata *auxpcm_pdata =
  928. (struct msm_dai_auxpcm_pdata *) dai->dev->platform_data;
  929. mutex_lock(&aux_pcm_mutex);
  930. if (!auxpcm_plat_data)
  931. auxpcm_plat_data = auxpcm_pdata;
  932. else if (auxpcm_plat_data != auxpcm_pdata) {
  933. dev_err(dai->dev, "AUX PCM RX and TX devices does not have"
  934. " same platform data\n");
  935. return -EINVAL;
  936. }
  937. /*
  938. * The clk name for AUX PCM operation is passed as platform
  939. * data to the cpu driver, since cpu drive is unaware of any
  940. * boarc specific configuration.
  941. */
  942. if (!pcm_clk) {
  943. pcm_clk = clk_get(dai->dev, auxpcm_pdata->clk);
  944. if (IS_ERR(pcm_clk)) {
  945. pr_err("%s: could not get pcm_clk\n", __func__);
  946. pcm_clk = NULL;
  947. return -ENODEV;
  948. }
  949. }
  950. mutex_unlock(&aux_pcm_mutex);
  951. dai_data = kzalloc(sizeof(struct msm_dai_q6_dai_data), GFP_KERNEL);
  952. if (!dai_data) {
  953. dev_err(dai->dev, "DAI-%d: fail to allocate dai data\n",
  954. dai->id);
  955. rc = -ENOMEM;
  956. } else
  957. dev_set_drvdata(dai->dev, dai_data);
  958. pr_debug("%s : probe done for dai->id %d\n", __func__, dai->id);
  959. return rc;
  960. }
  961. static int msm_dai_q6_dai_sec_auxpcm_probe(struct snd_soc_dai *dai)
  962. {
  963. struct msm_dai_q6_dai_data *dai_data;
  964. int rc = 0;
  965. struct msm_dai_auxpcm_pdata *auxpcm_pdata =
  966. (struct msm_dai_auxpcm_pdata *) dai->dev->platform_data;
  967. pr_info("%s\n", __func__);
  968. mutex_lock(&aux_pcm_mutex);
  969. if (!sec_auxpcm_plat_data)
  970. sec_auxpcm_plat_data = auxpcm_pdata;
  971. else if (sec_auxpcm_plat_data != auxpcm_pdata) {
  972. dev_err(dai->dev, "AUX PCM RX and TX devices does not have"
  973. " same platform data sec_auxpcm_plat_data\n");
  974. return -EINVAL;
  975. }
  976. /*
  977. * The clk name for AUX PCM operation is passed as platform
  978. * data to the cpu driver, since cpu drive is unaware of any
  979. * boarc specific configuration.
  980. */
  981. if (!sec_pcm_clk) {
  982. sec_pcm_clk = clk_get(dai->dev, auxpcm_pdata->clk);
  983. if (IS_ERR(sec_pcm_clk)) {
  984. pr_err("%s: could not get sec_pcm_clk\n", __func__);
  985. sec_pcm_clk = NULL;
  986. return -ENODEV;
  987. }
  988. }
  989. mutex_unlock(&aux_pcm_mutex);
  990. dai_data = kzalloc(sizeof(struct msm_dai_q6_dai_data), GFP_KERNEL);
  991. if (!dai_data) {
  992. dev_err(dai->dev, "DAI-%d: fail to allocate dai data\n",
  993. dai->id);
  994. rc = -ENOMEM;
  995. } else
  996. dev_set_drvdata(dai->dev, dai_data);
  997. pr_debug("%s : probe done for dai->id %d\n", __func__, dai->id);
  998. return rc;
  999. }
  1000. static int msm_dai_q6_dai_auxpcm_remove(struct snd_soc_dai *dai)
  1001. {
  1002. struct msm_dai_q6_dai_data *dai_data;
  1003. int rc;
  1004. dai_data = dev_get_drvdata(dai->dev);
  1005. mutex_lock(&aux_pcm_mutex);
  1006. if (aux_pcm_count == 0) {
  1007. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count is 0. clean"
  1008. " up and return\n", __func__, dai->id);
  1009. goto done;
  1010. }
  1011. aux_pcm_count--;
  1012. if (aux_pcm_count > 0) {
  1013. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count = %d\n",
  1014. __func__, dai->id, aux_pcm_count);
  1015. goto done;
  1016. } else if (aux_pcm_count < 0) {
  1017. dev_err(dai->dev, "%s(): ERROR: dai->id %d"
  1018. " aux_pcm_count = %d < 0\n",
  1019. __func__, dai->id, aux_pcm_count);
  1020. goto done;
  1021. }
  1022. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count = %d."
  1023. "closing afe\n",
  1024. __func__, dai->id, aux_pcm_count);
  1025. rc = afe_close(PCM_RX); /* can block */
  1026. if (IS_ERR_VALUE(rc))
  1027. dev_err(dai->dev, "fail to close AUX PCM RX AFE port\n");
  1028. rc = afe_close(PCM_TX);
  1029. if (IS_ERR_VALUE(rc))
  1030. dev_err(dai->dev, "fail to close AUX PCM TX AFE port\n");
  1031. done:
  1032. kfree(dai_data);
  1033. snd_soc_unregister_dai(dai->dev);
  1034. mutex_unlock(&aux_pcm_mutex);
  1035. return 0;
  1036. }
  1037. static int msm_dai_q6_dai_sec_auxpcm_remove(struct snd_soc_dai *dai)
  1038. {
  1039. struct msm_dai_q6_dai_data *dai_data;
  1040. int rc;
  1041. pr_debug("%s\n", __func__);
  1042. dai_data = dev_get_drvdata(dai->dev);
  1043. mutex_lock(&aux_pcm_mutex);
  1044. if (aux_pcm_count == 0) {
  1045. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count is 0. clean"
  1046. " up and return\n", __func__, dai->id);
  1047. goto done;
  1048. }
  1049. aux_pcm_count--;
  1050. if (aux_pcm_count > 0) {
  1051. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count = %d\n",
  1052. __func__, dai->id, aux_pcm_count);
  1053. goto done;
  1054. } else if (aux_pcm_count < 0) {
  1055. dev_err(dai->dev, "%s(): ERROR: dai->id %d"
  1056. " aux_pcm_count = %d < 0\n",
  1057. __func__, dai->id, aux_pcm_count);
  1058. goto done;
  1059. }
  1060. dev_dbg(dai->dev, "%s(): dai->id %d aux_pcm_count = %d."
  1061. "closing afe\n",
  1062. __func__, dai->id, aux_pcm_count);
  1063. rc = afe_close(SECONDARY_PCM_RX); /* can block */
  1064. if (IS_ERR_VALUE(rc))
  1065. dev_err(dai->dev, "fail to close AUX PCM RX AFE port\n");
  1066. rc = afe_close(SECONDARY_PCM_TX);
  1067. if (IS_ERR_VALUE(rc))
  1068. dev_err(dai->dev, "fail to close AUX PCM TX AFE port\n");
  1069. done:
  1070. kfree(dai_data);
  1071. snd_soc_unregister_dai(dai->dev);
  1072. mutex_unlock(&aux_pcm_mutex);
  1073. return 0;
  1074. }
  1075. static int msm_dai_q6_dai_mi2s_probe(struct snd_soc_dai *dai)
  1076. {
  1077. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  1078. dev_get_drvdata(dai->dev);
  1079. struct snd_kcontrol *kcontrol = NULL;
  1080. int rc = 0;
  1081. if (mi2s_dai_data->rx_dai.mi2s_dai_data.port_config.mi2s.line) {
  1082. kcontrol = snd_ctl_new1(&mi2s_config_controls[0],
  1083. &mi2s_dai_data->rx_dai.mi2s_dai_data);
  1084. rc = snd_ctl_add(dai->card->snd_card, kcontrol);
  1085. if (IS_ERR_VALUE(rc)) {
  1086. dev_err(dai->dev, "%s: err add RX fmt ctl\n", __func__);
  1087. goto rtn;
  1088. }
  1089. }
  1090. if (mi2s_dai_data->tx_dai.mi2s_dai_data.port_config.mi2s.line) {
  1091. rc = snd_ctl_add(dai->card->snd_card,
  1092. snd_ctl_new1(&mi2s_config_controls[2],
  1093. &mi2s_dai_data->tx_dai.mi2s_dai_data));
  1094. if (IS_ERR_VALUE(rc)) {
  1095. if (kcontrol)
  1096. snd_ctl_remove(dai->card->snd_card, kcontrol);
  1097. dev_err(dai->dev, "%s: err add TX fmt ctl\n", __func__);
  1098. }
  1099. }
  1100. rtn:
  1101. return rc;
  1102. }
  1103. static int msm_dai_q6_dai_mi2s_remove(struct snd_soc_dai *dai)
  1104. {
  1105. struct msm_dai_q6_mi2s_dai_data *mi2s_dai_data =
  1106. dev_get_drvdata(dai->dev);
  1107. int rc;
  1108. /* If AFE port is still up, close it */
  1109. if (test_bit(STATUS_PORT_STARTED,
  1110. mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask)) {
  1111. rc = afe_close(MI2S_RX); /* can block */
  1112. if (IS_ERR_VALUE(rc))
  1113. dev_err(dai->dev, "fail to close MI2S_RX port\n");
  1114. clear_bit(STATUS_PORT_STARTED,
  1115. mi2s_dai_data->rx_dai.mi2s_dai_data.status_mask);
  1116. }
  1117. if (test_bit(STATUS_PORT_STARTED,
  1118. mi2s_dai_data->tx_dai.mi2s_dai_data.status_mask)) {
  1119. rc = afe_close(MI2S_TX); /* can block */
  1120. if (IS_ERR_VALUE(rc))
  1121. dev_err(dai->dev, "fail to close MI2S_TX port\n");
  1122. clear_bit(STATUS_PORT_STARTED,
  1123. mi2s_dai_data->tx_dai.mi2s_dai_data.status_mask);
  1124. }
  1125. kfree(mi2s_dai_data);
  1126. snd_soc_unregister_dai(dai->dev);
  1127. return 0;
  1128. }
  1129. static int msm_dai_q6_dai_probe(struct snd_soc_dai *dai)
  1130. {
  1131. struct msm_dai_q6_dai_data *dai_data;
  1132. int rc = 0;
  1133. const struct snd_kcontrol_new *kcontrol;
  1134. dai_data = kzalloc(sizeof(struct msm_dai_q6_dai_data),
  1135. GFP_KERNEL);
  1136. if (!dai_data) {
  1137. dev_err(dai->dev, "DAI-%d: fail to allocate dai data\n",
  1138. dai->id);
  1139. rc = -ENOMEM;
  1140. } else
  1141. dev_set_drvdata(dai->dev, dai_data);
  1142. if (dai->id == SECONDARY_I2S_RX) {
  1143. kcontrol = &mi2s_config_controls[1];
  1144. rc = snd_ctl_add(dai->card->snd_card,
  1145. snd_ctl_new1(kcontrol, dai_data));
  1146. }
  1147. return rc;
  1148. }
  1149. static int msm_dai_q6_dai_remove(struct snd_soc_dai *dai)
  1150. {
  1151. struct msm_dai_q6_dai_data *dai_data;
  1152. int rc;
  1153. dai_data = dev_get_drvdata(dai->dev);
  1154. /* If AFE port is still up, close it */
  1155. if (test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
  1156. switch (dai->id) {
  1157. case VOICE_PLAYBACK_TX:
  1158. case VOICE_RECORD_TX:
  1159. case VOICE_RECORD_RX:
  1160. pr_debug("%s, stop pseudo port:%d\n",
  1161. __func__, dai->id);
  1162. rc = afe_stop_pseudo_port(dai->id);
  1163. break;
  1164. default:
  1165. rc = afe_close(dai->id); /* can block */
  1166. }
  1167. if (IS_ERR_VALUE(rc))
  1168. dev_err(dai->dev, "fail to close AFE port\n");
  1169. clear_bit(STATUS_PORT_STARTED, dai_data->status_mask);
  1170. }
  1171. kfree(dai_data);
  1172. snd_soc_unregister_dai(dai->dev);
  1173. return 0;
  1174. }
  1175. static int msm_dai_q6_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  1176. {
  1177. int rc = 0;
  1178. dev_dbg(dai->dev, "enter %s, id = %d fmt[%d]\n", __func__,
  1179. dai->id, fmt);
  1180. switch (dai->id) {
  1181. case PRIMARY_I2S_TX:
  1182. case PRIMARY_I2S_RX:
  1183. case SECONDARY_I2S_RX:
  1184. case SECONDARY_I2S_TX:
  1185. rc = msm_dai_q6_cdc_set_fmt(dai, fmt);
  1186. break;
  1187. default:
  1188. dev_err(dai->dev, "invalid cpu_dai set_fmt\n");
  1189. rc = -EINVAL;
  1190. break;
  1191. }
  1192. return rc;
  1193. }
  1194. static int msm_dai_q6_set_channel_map(struct snd_soc_dai *dai,
  1195. unsigned int tx_num, unsigned int *tx_slot,
  1196. unsigned int rx_num, unsigned int *rx_slot)
  1197. {
  1198. int rc = 0;
  1199. struct msm_dai_q6_dai_data *dai_data = dev_get_drvdata(dai->dev);
  1200. unsigned int i = 0;
  1201. dev_dbg(dai->dev, "%s: dai_id = %d\n", __func__, dai->id);
  1202. switch (dai->id) {
  1203. case SLIMBUS_0_RX:
  1204. case SLIMBUS_1_RX:
  1205. case SLIMBUS_2_RX:
  1206. case SLIMBUS_3_RX:
  1207. case SLIMBUS_4_RX:
  1208. /* channel number to be between 128 and 255. For RX port
  1209. * use channel numbers from 138 to 144, for TX port
  1210. * use channel numbers from 128 to 137
  1211. * For ports between MDM-APQ use channel numbers from 145
  1212. */
  1213. if (!rx_slot)
  1214. return -EINVAL;
  1215. if (rx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
  1216. pr_err("%s: invalid rx num %d\n", __func__, rx_num);
  1217. return -EINVAL;
  1218. }
  1219. for (i = 0; i < rx_num; i++) {
  1220. dai_data->port_config.slim_sch.slave_ch_mapping[i] =
  1221. rx_slot[i];
  1222. pr_debug("%s: find number of channels[%d] ch[%d]\n",
  1223. __func__, i,
  1224. rx_slot[i]);
  1225. }
  1226. dai_data->port_config.slim_sch.num_channels = rx_num;
  1227. pr_debug("%s:SLIMBUS_%d_RX cnt[%d] ch[%d %d]\n", __func__,
  1228. (dai->id - SLIMBUS_0_RX) / 2,
  1229. rx_num, dai_data->port_config.slim_sch.slave_ch_mapping[0],
  1230. dai_data->port_config.slim_sch.slave_ch_mapping[1]);
  1231. break;
  1232. case SLIMBUS_0_TX:
  1233. case SLIMBUS_1_TX:
  1234. case SLIMBUS_2_TX:
  1235. case SLIMBUS_3_TX:
  1236. case SLIMBUS_4_TX:
  1237. /* channel number to be between 128 and 255. For RX port
  1238. * use channel numbers from 138 to 144, for TX port
  1239. * use channel numbers from 128 to 137
  1240. * For ports between MDM-APQ use channel numbers from 145
  1241. */
  1242. if (!tx_slot)
  1243. return -EINVAL;
  1244. if (tx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
  1245. pr_err("%s: invalid tx num %d\n", __func__, tx_num);
  1246. return -EINVAL;
  1247. }
  1248. for (i = 0; i < tx_num; i++) {
  1249. dai_data->port_config.slim_sch.slave_ch_mapping[i] =
  1250. tx_slot[i];
  1251. pr_debug("%s: find number of channels[%d] ch[%d]\n",
  1252. __func__, i, tx_slot[i]);
  1253. }
  1254. dai_data->port_config.slim_sch.num_channels = tx_num;
  1255. pr_debug("%s:SLIMBUS_%d_TX cnt[%d] ch[%d %d]\n", __func__,
  1256. (dai->id - SLIMBUS_0_TX) / 2,
  1257. tx_num, dai_data->port_config.slim_sch.slave_ch_mapping[0],
  1258. dai_data->port_config.slim_sch.slave_ch_mapping[1]);
  1259. break;
  1260. default:
  1261. dev_err(dai->dev, "invalid cpu_dai set_fmt\n");
  1262. rc = -EINVAL;
  1263. break;
  1264. }
  1265. return rc;
  1266. }
  1267. static struct snd_soc_dai_ops msm_dai_q6_mi2s_ops = {
  1268. .startup = msm_dai_q6_mi2s_startup,
  1269. .prepare = msm_dai_q6_mi2s_prepare,
  1270. .hw_params = msm_dai_q6_mi2s_hw_params,
  1271. .shutdown = msm_dai_q6_mi2s_shutdown,
  1272. .set_fmt = msm_dai_q6_mi2s_set_fmt,
  1273. };
  1274. static struct snd_soc_dai_ops msm_dai_q6_ops = {
  1275. .prepare = msm_dai_q6_prepare,
  1276. .hw_params = msm_dai_q6_hw_params,
  1277. .shutdown = msm_dai_q6_shutdown,
  1278. .set_fmt = msm_dai_q6_set_fmt,
  1279. .set_channel_map = msm_dai_q6_set_channel_map,
  1280. };
  1281. static struct snd_soc_dai_ops msm_dai_q6_auxpcm_ops = {
  1282. .prepare = msm_dai_q6_auxpcm_prepare,
  1283. .trigger = msm_dai_q6_auxpcm_trigger,
  1284. .hw_params = msm_dai_q6_auxpcm_hw_params,
  1285. .shutdown = msm_dai_q6_auxpcm_shutdown,
  1286. };
  1287. static struct snd_soc_dai_ops msm_dai_q6_sec_auxpcm_ops = {
  1288. .prepare = msm_dai_q6_sec_auxpcm_prepare,
  1289. .trigger = msm_dai_q6_auxpcm_trigger,
  1290. .hw_params = msm_dai_q6_sec_auxpcm_hw_params,
  1291. .shutdown = msm_dai_q6_sec_auxpcm_shutdown,
  1292. };
  1293. static struct snd_soc_dai_driver msm_dai_q6_i2s_rx_dai = {
  1294. .playback = {
  1295. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1296. SNDRV_PCM_RATE_16000,
  1297. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1298. .channels_min = 1,
  1299. .channels_max = 4,
  1300. .rate_min = 8000,
  1301. .rate_max = 48000,
  1302. },
  1303. .ops = &msm_dai_q6_ops,
  1304. .probe = msm_dai_q6_dai_probe,
  1305. .remove = msm_dai_q6_dai_remove,
  1306. };
  1307. static struct snd_soc_dai_driver msm_dai_q6_i2s_tx_dai = {
  1308. .capture = {
  1309. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1310. SNDRV_PCM_RATE_16000,
  1311. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1312. .channels_min = 1,
  1313. .channels_max = 2,
  1314. .rate_min = 8000,
  1315. .rate_max = 48000,
  1316. },
  1317. .ops = &msm_dai_q6_ops,
  1318. .probe = msm_dai_q6_dai_probe,
  1319. .remove = msm_dai_q6_dai_remove,
  1320. };
  1321. static struct snd_soc_dai_driver msm_dai_q6_afe_rx_dai = {
  1322. .playback = {
  1323. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1324. SNDRV_PCM_RATE_16000,
  1325. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1326. .channels_min = 1,
  1327. .channels_max = 2,
  1328. .rate_min = 8000,
  1329. .rate_max = 48000,
  1330. },
  1331. .ops = &msm_dai_q6_ops,
  1332. .probe = msm_dai_q6_dai_probe,
  1333. .remove = msm_dai_q6_dai_remove,
  1334. };
  1335. static struct snd_soc_dai_driver msm_dai_q6_afe_tx_dai = {
  1336. .capture = {
  1337. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1338. SNDRV_PCM_RATE_16000,
  1339. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1340. .channels_min = 1,
  1341. .channels_max = 4,
  1342. .rate_min = 8000,
  1343. .rate_max = 48000,
  1344. },
  1345. .ops = &msm_dai_q6_ops,
  1346. .probe = msm_dai_q6_dai_probe,
  1347. .remove = msm_dai_q6_dai_remove,
  1348. };
  1349. static struct snd_soc_dai_driver msm_dai_q6_voice_playback_tx_dai = {
  1350. .playback = {
  1351. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1352. SNDRV_PCM_RATE_16000,
  1353. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1354. .channels_min = 1,
  1355. .channels_max = 2,
  1356. .rate_max = 48000,
  1357. .rate_min = 8000,
  1358. },
  1359. .ops = &msm_dai_q6_ops,
  1360. .probe = msm_dai_q6_dai_probe,
  1361. .remove = msm_dai_q6_dai_remove,
  1362. };
  1363. static struct snd_soc_dai_driver msm_dai_q6_slimbus_rx_dai = {
  1364. .playback = {
  1365. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1366. SNDRV_PCM_RATE_16000,
  1367. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1368. .channels_min = 1,
  1369. .channels_max = 2,
  1370. .rate_min = 8000,
  1371. .rate_max = 48000,
  1372. },
  1373. .ops = &msm_dai_q6_ops,
  1374. .probe = msm_dai_q6_dai_probe,
  1375. .remove = msm_dai_q6_dai_remove,
  1376. };
  1377. static struct snd_soc_dai_driver msm_dai_q6_slimbus_tx_dai = {
  1378. .capture = {
  1379. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1380. SNDRV_PCM_RATE_16000,
  1381. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1382. .channels_min = 1,
  1383. .channels_max = 2,
  1384. .rate_min = 8000,
  1385. .rate_max = 48000,
  1386. },
  1387. .ops = &msm_dai_q6_ops,
  1388. .probe = msm_dai_q6_dai_probe,
  1389. .remove = msm_dai_q6_dai_remove,
  1390. };
  1391. static struct snd_soc_dai_driver msm_dai_q6_incall_record_dai = {
  1392. .capture = {
  1393. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1394. SNDRV_PCM_RATE_16000,
  1395. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1396. .channels_min = 1,
  1397. .channels_max = 2,
  1398. .rate_min = 8000,
  1399. .rate_max = 48000,
  1400. },
  1401. .ops = &msm_dai_q6_ops,
  1402. .probe = msm_dai_q6_dai_probe,
  1403. .remove = msm_dai_q6_dai_remove,
  1404. };
  1405. static struct snd_soc_dai_driver msm_dai_q6_bt_sco_rx_dai = {
  1406. .playback = {
  1407. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1408. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1409. .channels_min = 1,
  1410. .channels_max = 1,
  1411. .rate_max = 16000,
  1412. .rate_min = 8000,
  1413. },
  1414. .ops = &msm_dai_q6_ops,
  1415. .probe = msm_dai_q6_dai_probe,
  1416. .remove = msm_dai_q6_dai_remove,
  1417. };
  1418. static struct snd_soc_dai_driver msm_dai_q6_bt_sco_tx_dai = {
  1419. .capture = {
  1420. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1421. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1422. .channels_min = 1,
  1423. .channels_max = 1,
  1424. .rate_max = 16000,
  1425. .rate_min = 8000,
  1426. },
  1427. .ops = &msm_dai_q6_ops,
  1428. .probe = msm_dai_q6_dai_probe,
  1429. .remove = msm_dai_q6_dai_remove,
  1430. };
  1431. static struct snd_soc_dai_driver msm_dai_q6_fm_rx_dai = {
  1432. .playback = {
  1433. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1434. SNDRV_PCM_RATE_16000,
  1435. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1436. .channels_min = 2,
  1437. .channels_max = 2,
  1438. .rate_max = 48000,
  1439. .rate_min = 8000,
  1440. },
  1441. .ops = &msm_dai_q6_ops,
  1442. .probe = msm_dai_q6_dai_probe,
  1443. .remove = msm_dai_q6_dai_remove,
  1444. };
  1445. static struct snd_soc_dai_driver msm_dai_q6_fm_tx_dai = {
  1446. .capture = {
  1447. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1448. SNDRV_PCM_RATE_16000,
  1449. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1450. .channels_min = 2,
  1451. .channels_max = 2,
  1452. .rate_max = 48000,
  1453. .rate_min = 8000,
  1454. },
  1455. .ops = &msm_dai_q6_ops,
  1456. .probe = msm_dai_q6_dai_probe,
  1457. .remove = msm_dai_q6_dai_remove,
  1458. };
  1459. static struct snd_soc_dai_driver msm_dai_q6_aux_pcm_rx_dai = {
  1460. .playback = {
  1461. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1462. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1463. .channels_min = 1,
  1464. .channels_max = 1,
  1465. .rate_max = 16000,
  1466. .rate_min = 8000,
  1467. },
  1468. .ops = &msm_dai_q6_auxpcm_ops,
  1469. .probe = msm_dai_q6_dai_auxpcm_probe,
  1470. .remove = msm_dai_q6_dai_auxpcm_remove,
  1471. };
  1472. static struct snd_soc_dai_driver msm_dai_q6_aux_pcm_tx_dai = {
  1473. .capture = {
  1474. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1475. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1476. .channels_min = 1,
  1477. .channels_max = 1,
  1478. .rate_max = 16000,
  1479. .rate_min = 8000,
  1480. },
  1481. .ops = &msm_dai_q6_auxpcm_ops,
  1482. .probe = msm_dai_q6_dai_auxpcm_probe,
  1483. .remove = msm_dai_q6_dai_auxpcm_remove,
  1484. };
  1485. static struct snd_soc_dai_driver msm_dai_q6_sec_aux_pcm_rx_dai = {
  1486. .playback = {
  1487. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1488. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1489. .channels_min = 1,
  1490. .channels_max = 1,
  1491. .rate_max = 16000,
  1492. .rate_min = 8000,
  1493. },
  1494. .ops = &msm_dai_q6_sec_auxpcm_ops,
  1495. .probe = msm_dai_q6_dai_sec_auxpcm_probe,
  1496. .remove = msm_dai_q6_dai_sec_auxpcm_remove,
  1497. };
  1498. static struct snd_soc_dai_driver msm_dai_q6_sec_aux_pcm_tx_dai = {
  1499. .capture = {
  1500. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1501. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1502. .channels_min = 1,
  1503. .channels_max = 1,
  1504. .rate_max = 16000,
  1505. .rate_min = 8000,
  1506. },
  1507. .ops = &msm_dai_q6_sec_auxpcm_ops,
  1508. .probe = msm_dai_q6_dai_sec_auxpcm_probe,
  1509. .remove = msm_dai_q6_dai_sec_auxpcm_remove,
  1510. };
  1511. /* Channel min and max are initialized base on platform data */
  1512. static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai = {
  1513. .playback = {
  1514. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1515. SNDRV_PCM_RATE_16000,
  1516. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1517. .rate_min = 8000,
  1518. .rate_max = 48000,
  1519. },
  1520. .capture = {
  1521. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1522. SNDRV_PCM_RATE_16000,
  1523. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1524. .rate_min = 8000,
  1525. .rate_max = 48000,
  1526. },
  1527. .ops = &msm_dai_q6_mi2s_ops,
  1528. .probe = msm_dai_q6_dai_mi2s_probe,
  1529. .remove = msm_dai_q6_dai_mi2s_remove,
  1530. };
  1531. static struct snd_soc_dai_driver msm_dai_q6_slimbus_1_rx_dai = {
  1532. .playback = {
  1533. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1534. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1535. .channels_min = 1,
  1536. .channels_max = 1,
  1537. .rate_min = 8000,
  1538. .rate_max = 16000,
  1539. },
  1540. .ops = &msm_dai_q6_ops,
  1541. .probe = msm_dai_q6_dai_probe,
  1542. .remove = msm_dai_q6_dai_remove,
  1543. };
  1544. static struct snd_soc_dai_driver msm_dai_q6_slimbus_1_tx_dai = {
  1545. .capture = {
  1546. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1547. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1548. .channels_min = 1,
  1549. .channels_max = 1,
  1550. .rate_min = 8000,
  1551. .rate_max = 16000,
  1552. },
  1553. .ops = &msm_dai_q6_ops,
  1554. .probe = msm_dai_q6_dai_probe,
  1555. .remove = msm_dai_q6_dai_remove,
  1556. };
  1557. static struct snd_soc_dai_driver msm_dai_q6_slimbus_2_rx_dai = {
  1558. .playback = {
  1559. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1560. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
  1561. SNDRV_PCM_RATE_192000,
  1562. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1563. .channels_min = 1,
  1564. .channels_max = 2,
  1565. .rate_min = 8000,
  1566. .rate_max = 192000,
  1567. },
  1568. .ops = &msm_dai_q6_ops,
  1569. .probe = msm_dai_q6_dai_probe,
  1570. .remove = msm_dai_q6_dai_remove,
  1571. };
  1572. static struct snd_soc_dai_driver msm_dai_q6_slimbus_2_tx_dai = {
  1573. .capture = {
  1574. .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
  1575. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
  1576. SNDRV_PCM_RATE_192000,
  1577. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1578. .channels_min = 1,
  1579. .channels_max = 8,
  1580. .rate_min = 8000,
  1581. .rate_max = 192000,
  1582. },
  1583. .ops = &msm_dai_q6_ops,
  1584. .probe = msm_dai_q6_dai_probe,
  1585. .remove = msm_dai_q6_dai_remove,
  1586. };
  1587. static struct snd_soc_dai_driver msm_dai_q6_slimbus_3_rx_dai = {
  1588. .playback = {
  1589. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
  1590. SNDRV_PCM_RATE_48000,
  1591. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1592. .channels_min = 1,
  1593. .channels_max = 2,
  1594. .rate_min = 8000,
  1595. .rate_max = 48000,
  1596. },
  1597. .ops = &msm_dai_q6_ops,
  1598. .probe = msm_dai_q6_dai_probe,
  1599. .remove = msm_dai_q6_dai_remove,
  1600. };
  1601. static struct snd_soc_dai_driver msm_dai_q6_pseudo_dai = {
  1602. .playback = {
  1603. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
  1604. SNDRV_PCM_RATE_48000,
  1605. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  1606. .channels_min = 1,
  1607. .channels_max = 6,
  1608. .rate_min = 8000,
  1609. .rate_max = 48000,
  1610. },
  1611. .ops = &msm_dai_q6_ops,
  1612. .probe = msm_dai_q6_dai_probe,
  1613. .remove = msm_dai_q6_dai_remove,
  1614. };
  1615. /* To do: change to register DAIs as batch */
  1616. static __devinit int msm_dai_q6_dev_probe(struct platform_device *pdev)
  1617. {
  1618. int rc = 0;
  1619. dev_dbg(&pdev->dev, "dev name %s\n", dev_name(&pdev->dev));
  1620. switch (pdev->id) {
  1621. case PRIMARY_I2S_RX:
  1622. case SECONDARY_I2S_RX:
  1623. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_i2s_rx_dai);
  1624. break;
  1625. case PRIMARY_I2S_TX:
  1626. case SECONDARY_I2S_TX:
  1627. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_i2s_tx_dai);
  1628. break;
  1629. case PCM_RX:
  1630. rc = snd_soc_register_dai(&pdev->dev,
  1631. &msm_dai_q6_aux_pcm_rx_dai);
  1632. break;
  1633. case PCM_TX:
  1634. rc = snd_soc_register_dai(&pdev->dev,
  1635. &msm_dai_q6_aux_pcm_tx_dai);
  1636. break;
  1637. case SECONDARY_PCM_RX:
  1638. rc = snd_soc_register_dai(&pdev->dev,
  1639. &msm_dai_q6_sec_aux_pcm_rx_dai);
  1640. break;
  1641. case SECONDARY_PCM_TX:
  1642. rc = snd_soc_register_dai(&pdev->dev,
  1643. &msm_dai_q6_sec_aux_pcm_tx_dai);
  1644. break;
  1645. case SLIMBUS_0_RX:
  1646. case SLIMBUS_4_RX:
  1647. rc = snd_soc_register_dai(&pdev->dev,
  1648. &msm_dai_q6_slimbus_rx_dai);
  1649. break;
  1650. case SLIMBUS_0_TX:
  1651. case SLIMBUS_4_TX:
  1652. case SLIMBUS_3_TX:
  1653. rc = snd_soc_register_dai(&pdev->dev,
  1654. &msm_dai_q6_slimbus_tx_dai);
  1655. break;
  1656. case SLIMBUS_1_RX:
  1657. rc = snd_soc_register_dai(&pdev->dev,
  1658. &msm_dai_q6_slimbus_1_rx_dai);
  1659. break;
  1660. case SLIMBUS_1_TX:
  1661. rc = snd_soc_register_dai(&pdev->dev,
  1662. &msm_dai_q6_slimbus_1_tx_dai);
  1663. break;
  1664. case SLIMBUS_2_RX:
  1665. rc = snd_soc_register_dai(&pdev->dev,
  1666. &msm_dai_q6_slimbus_2_rx_dai);
  1667. break;
  1668. case SLIMBUS_2_TX:
  1669. rc = snd_soc_register_dai(&pdev->dev,
  1670. &msm_dai_q6_slimbus_2_tx_dai);
  1671. break;
  1672. case SLIMBUS_3_RX:
  1673. rc = snd_soc_register_dai(&pdev->dev,
  1674. &msm_dai_q6_slimbus_3_rx_dai);
  1675. break;
  1676. case INT_BT_SCO_RX:
  1677. rc = snd_soc_register_dai(&pdev->dev,
  1678. &msm_dai_q6_bt_sco_rx_dai);
  1679. break;
  1680. case INT_BT_SCO_TX:
  1681. rc = snd_soc_register_dai(&pdev->dev,
  1682. &msm_dai_q6_bt_sco_tx_dai);
  1683. break;
  1684. case INT_FM_RX:
  1685. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_fm_rx_dai);
  1686. break;
  1687. case INT_FM_TX:
  1688. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_fm_tx_dai);
  1689. break;
  1690. case RT_PROXY_DAI_001_RX:
  1691. case RT_PROXY_DAI_002_RX:
  1692. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_afe_rx_dai);
  1693. break;
  1694. case RT_PROXY_DAI_001_TX:
  1695. case RT_PROXY_DAI_002_TX:
  1696. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_afe_tx_dai);
  1697. break;
  1698. case VOICE_PLAYBACK_TX:
  1699. rc = snd_soc_register_dai(&pdev->dev,
  1700. &msm_dai_q6_voice_playback_tx_dai);
  1701. break;
  1702. case VOICE_RECORD_RX:
  1703. case VOICE_RECORD_TX:
  1704. rc = snd_soc_register_dai(&pdev->dev,
  1705. &msm_dai_q6_incall_record_dai);
  1706. break;
  1707. case PSEUDOPORT_01:
  1708. rc = snd_soc_register_dai(&pdev->dev,
  1709. &msm_dai_q6_pseudo_dai);
  1710. break;
  1711. default:
  1712. rc = -ENODEV;
  1713. break;
  1714. }
  1715. return rc;
  1716. }
  1717. static __devexit int msm_dai_q6_dev_remove(struct platform_device *pdev)
  1718. {
  1719. snd_soc_unregister_dai(&pdev->dev);
  1720. return 0;
  1721. }
  1722. static __devinit int msm_dai_q6_mi2s_dev_probe(struct platform_device *pdev)
  1723. {
  1724. struct msm_dai_q6_mi2s_dai_data *dai_data;
  1725. int rc = 0;
  1726. dev_dbg(&pdev->dev, "%s: pdev %p dev %p\n", __func__, pdev, &pdev->dev);
  1727. dai_data = kzalloc(sizeof(struct msm_dai_q6_mi2s_dai_data),
  1728. GFP_KERNEL);
  1729. if (!dai_data) {
  1730. dev_err(&pdev->dev, "fail to allocate dai data\n");
  1731. rc = -ENOMEM;
  1732. goto rtn;
  1733. } else
  1734. dev_set_drvdata(&pdev->dev, dai_data);
  1735. rc = msm_dai_q6_mi2s_platform_data_validation(pdev,
  1736. &msm_dai_q6_mi2s_dai);
  1737. if (IS_ERR_VALUE(rc))
  1738. goto err_pdata;
  1739. dai_data->rate_constraint.count = 1;
  1740. dai_data->bitwidth_constraint.count = 1;
  1741. rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_mi2s_dai);
  1742. if (IS_ERR_VALUE(rc))
  1743. goto err_pdata;
  1744. return 0;
  1745. err_pdata:
  1746. dev_err(&pdev->dev, "fail to msm_dai_q6_mi2s_dev_probe\n");
  1747. kfree(dai_data);
  1748. rtn:
  1749. return rc;
  1750. }
  1751. static __devexit int msm_dai_q6_mi2s_dev_remove(struct platform_device *pdev)
  1752. {
  1753. snd_soc_unregister_dai(&pdev->dev);
  1754. return 0;
  1755. }
  1756. static struct platform_driver msm_dai_q6_driver = {
  1757. .probe = msm_dai_q6_dev_probe,
  1758. .remove = msm_dai_q6_dev_remove,
  1759. .driver = {
  1760. .name = "msm-dai-q6",
  1761. .owner = THIS_MODULE,
  1762. },
  1763. };
  1764. static struct platform_driver msm_dai_q6_mi2s_driver = {
  1765. .probe = msm_dai_q6_mi2s_dev_probe,
  1766. .remove = msm_dai_q6_mi2s_dev_remove,
  1767. .driver = {
  1768. .name = "msm-dai-q6-mi2s",
  1769. .owner = THIS_MODULE,
  1770. },
  1771. };
  1772. static int __init msm_dai_q6_init(void)
  1773. {
  1774. int rc1, rc2;
  1775. rc1 = platform_driver_register(&msm_dai_q6_mi2s_driver);
  1776. if (IS_ERR_VALUE(rc1))
  1777. pr_err("%s: fail to register mi2s dai driver\n", __func__);
  1778. rc2 = platform_driver_register(&msm_dai_q6_driver);
  1779. if (IS_ERR_VALUE(rc2))
  1780. pr_err("%s: fail to register mi2s dai driver\n", __func__);
  1781. return (IS_ERR_VALUE(rc1) && IS_ERR_VALUE(rc2)) ? -1 : 0;
  1782. }
  1783. module_init(msm_dai_q6_init);
  1784. static void __exit msm_dai_q6_exit(void)
  1785. {
  1786. platform_driver_unregister(&msm_dai_q6_driver);
  1787. }
  1788. module_exit(msm_dai_q6_exit);
  1789. /* Module information */
  1790. MODULE_DESCRIPTION("MSM DSP DAI driver");
  1791. MODULE_LICENSE("GPL v2");