wm_hubs.c 35 KB

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  1. /*
  2. * wm_hubs.c -- WM8993/4 common code
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/mfd/wm8994/registers.h>
  20. #include <sound/core.h>
  21. #include <sound/pcm.h>
  22. #include <sound/pcm_params.h>
  23. #include <sound/soc.h>
  24. #include <sound/initval.h>
  25. #include <sound/tlv.h>
  26. #include "wm8993.h"
  27. #include "wm_hubs.h"
  28. const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
  29. EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
  30. static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
  31. static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
  32. static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
  33. static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
  34. static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
  35. static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
  36. static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
  37. static const unsigned int spkboost_tlv[] = {
  38. TLV_DB_RANGE_HEAD(2),
  39. 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
  40. 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
  41. };
  42. static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
  43. static const char *speaker_ref_text[] = {
  44. "SPKVDD/2",
  45. "VMID",
  46. };
  47. static const struct soc_enum speaker_ref =
  48. SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
  49. static const char *speaker_mode_text[] = {
  50. "Class D",
  51. "Class AB",
  52. };
  53. static const struct soc_enum speaker_mode =
  54. SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
  55. static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
  56. {
  57. struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
  58. unsigned int reg;
  59. int count = 0;
  60. int timeout;
  61. unsigned int val;
  62. val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
  63. /* Trigger the command */
  64. snd_soc_write(codec, WM8993_DC_SERVO_0, val);
  65. dev_dbg(codec->dev, "Waiting for DC servo...\n");
  66. if (hubs->dcs_done_irq)
  67. timeout = 4;
  68. else
  69. timeout = 400;
  70. do {
  71. count++;
  72. if (hubs->dcs_done_irq)
  73. wait_for_completion_timeout(&hubs->dcs_done,
  74. msecs_to_jiffies(250));
  75. else
  76. msleep(1);
  77. reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
  78. dev_dbg(codec->dev, "DC servo: %x\n", reg);
  79. } while (reg & op && count < timeout);
  80. if (reg & op)
  81. dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
  82. op);
  83. }
  84. irqreturn_t wm_hubs_dcs_done(int irq, void *data)
  85. {
  86. struct wm_hubs_data *hubs = data;
  87. complete(&hubs->dcs_done);
  88. return IRQ_HANDLED;
  89. }
  90. EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
  91. /*
  92. * Startup calibration of the DC servo
  93. */
  94. static void calibrate_dc_servo(struct snd_soc_codec *codec)
  95. {
  96. struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
  97. s8 offset;
  98. u16 reg, reg_l, reg_r, dcs_cfg, dcs_reg;
  99. switch (hubs->dcs_readback_mode) {
  100. case 2:
  101. dcs_reg = WM8994_DC_SERVO_4E;
  102. break;
  103. default:
  104. dcs_reg = WM8993_DC_SERVO_3;
  105. break;
  106. }
  107. /* If we're using a digital only path and have a previously
  108. * callibrated DC servo offset stored then use that. */
  109. if (hubs->class_w && hubs->class_w_dcs) {
  110. dev_dbg(codec->dev, "Using cached DC servo offset %x\n",
  111. hubs->class_w_dcs);
  112. snd_soc_write(codec, dcs_reg, hubs->class_w_dcs);
  113. wait_for_dc_servo(codec,
  114. WM8993_DCS_TRIG_DAC_WR_0 |
  115. WM8993_DCS_TRIG_DAC_WR_1);
  116. return;
  117. }
  118. if (hubs->series_startup) {
  119. /* Set for 32 series updates */
  120. snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
  121. WM8993_DCS_SERIES_NO_01_MASK,
  122. 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
  123. wait_for_dc_servo(codec,
  124. WM8993_DCS_TRIG_SERIES_0 |
  125. WM8993_DCS_TRIG_SERIES_1);
  126. } else {
  127. wait_for_dc_servo(codec,
  128. WM8993_DCS_TRIG_STARTUP_0 |
  129. WM8993_DCS_TRIG_STARTUP_1);
  130. }
  131. /* Different chips in the family support different readback
  132. * methods.
  133. */
  134. switch (hubs->dcs_readback_mode) {
  135. case 0:
  136. reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
  137. & WM8993_DCS_INTEG_CHAN_0_MASK;
  138. reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
  139. & WM8993_DCS_INTEG_CHAN_1_MASK;
  140. break;
  141. case 2:
  142. case 1:
  143. reg = snd_soc_read(codec, dcs_reg);
  144. reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
  145. >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
  146. reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
  147. break;
  148. default:
  149. WARN(1, "Unknown DCS readback method\n");
  150. return;
  151. }
  152. dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
  153. /* Apply correction to DC servo result */
  154. if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
  155. dev_dbg(codec->dev,
  156. "Applying %d/%d code DC servo correction\n",
  157. hubs->dcs_codes_l, hubs->dcs_codes_r);
  158. /* HPOUT1R */
  159. offset = reg_r;
  160. offset += hubs->dcs_codes_r;
  161. dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
  162. /* HPOUT1L */
  163. offset = reg_l;
  164. offset += hubs->dcs_codes_l;
  165. dcs_cfg |= (u8)offset;
  166. dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
  167. /* Do it */
  168. snd_soc_write(codec, dcs_reg, dcs_cfg);
  169. wait_for_dc_servo(codec,
  170. WM8993_DCS_TRIG_DAC_WR_0 |
  171. WM8993_DCS_TRIG_DAC_WR_1);
  172. } else {
  173. dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
  174. dcs_cfg |= reg_l;
  175. }
  176. /* Save the callibrated offset if we're in class W mode and
  177. * therefore don't have any analogue signal mixed in. */
  178. if (hubs->class_w && !hubs->no_cache_class_w)
  179. hubs->class_w_dcs = dcs_cfg;
  180. }
  181. /*
  182. * Update the DC servo calibration on gain changes
  183. */
  184. static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
  185. struct snd_ctl_elem_value *ucontrol)
  186. {
  187. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  188. struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
  189. int ret;
  190. ret = snd_soc_put_volsw(kcontrol, ucontrol);
  191. /* Updating the analogue gains invalidates the DC servo cache */
  192. hubs->class_w_dcs = 0;
  193. /* If we're applying an offset correction then updating the
  194. * callibration would be likely to introduce further offsets. */
  195. if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
  196. return ret;
  197. /* Only need to do this if the outputs are active */
  198. if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
  199. & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
  200. snd_soc_update_bits(codec,
  201. WM8993_DC_SERVO_0,
  202. WM8993_DCS_TRIG_SINGLE_0 |
  203. WM8993_DCS_TRIG_SINGLE_1,
  204. WM8993_DCS_TRIG_SINGLE_0 |
  205. WM8993_DCS_TRIG_SINGLE_1);
  206. return ret;
  207. }
  208. static const struct snd_kcontrol_new analogue_snd_controls[] = {
  209. SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
  210. inpga_tlv),
  211. SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
  212. SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
  213. SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
  214. inpga_tlv),
  215. SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
  216. SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
  217. SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
  218. inpga_tlv),
  219. SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
  220. SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
  221. SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
  222. inpga_tlv),
  223. SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
  224. SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
  225. SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
  226. inmix_sw_tlv),
  227. SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
  228. inmix_sw_tlv),
  229. SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
  230. inmix_tlv),
  231. SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
  232. SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
  233. inmix_tlv),
  234. SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
  235. inmix_sw_tlv),
  236. SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
  237. inmix_sw_tlv),
  238. SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
  239. inmix_tlv),
  240. SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
  241. SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
  242. inmix_tlv),
  243. SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
  244. outmix_tlv),
  245. SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
  246. outmix_tlv),
  247. SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
  248. outmix_tlv),
  249. SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
  250. outmix_tlv),
  251. SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
  252. outmix_tlv),
  253. SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
  254. WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
  255. SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
  256. WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
  257. SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
  258. outmix_tlv),
  259. SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
  260. WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
  261. SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
  262. WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
  263. SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
  264. WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
  265. SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
  266. WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
  267. SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
  268. WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
  269. SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
  270. WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
  271. SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
  272. WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
  273. SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
  274. WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
  275. SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
  276. WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
  277. SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
  278. WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
  279. SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
  280. WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
  281. SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
  282. SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
  283. SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
  284. 5, 1, 1, wm_hubs_spkmix_tlv),
  285. SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
  286. 4, 1, 1, wm_hubs_spkmix_tlv),
  287. SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
  288. 3, 1, 1, wm_hubs_spkmix_tlv),
  289. SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
  290. 5, 1, 1, wm_hubs_spkmix_tlv),
  291. SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
  292. 4, 1, 1, wm_hubs_spkmix_tlv),
  293. SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
  294. 3, 1, 1, wm_hubs_spkmix_tlv),
  295. SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
  296. WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
  297. 0, 3, 1, spkmixout_tlv),
  298. SOC_DOUBLE_R_TLV("Speaker Volume",
  299. WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
  300. 0, 63, 0, outpga_tlv),
  301. SOC_DOUBLE_R("Speaker Switch",
  302. WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
  303. 6, 1, 0),
  304. SOC_DOUBLE_R("Speaker ZC Switch",
  305. WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
  306. 7, 1, 0),
  307. SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
  308. spkboost_tlv),
  309. SOC_ENUM("Speaker Reference", speaker_ref),
  310. SOC_ENUM("Speaker Mode", speaker_mode),
  311. SOC_DOUBLE_R_EXT_TLV("Headphone Volume",
  312. WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME,
  313. 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo,
  314. outpga_tlv),
  315. SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
  316. WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
  317. SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
  318. WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
  319. SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
  320. SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
  321. SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
  322. line_tlv),
  323. SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
  324. SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
  325. SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
  326. line_tlv),
  327. };
  328. static int hp_supply_event(struct snd_soc_dapm_widget *w,
  329. struct snd_kcontrol *kcontrol, int event)
  330. {
  331. struct snd_soc_codec *codec = w->codec;
  332. struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
  333. switch (event) {
  334. case SND_SOC_DAPM_PRE_PMU:
  335. switch (hubs->hp_startup_mode) {
  336. case 0:
  337. break;
  338. case 1:
  339. /* Enable the headphone amp */
  340. snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
  341. WM8993_HPOUT1L_ENA |
  342. WM8993_HPOUT1R_ENA,
  343. WM8993_HPOUT1L_ENA |
  344. WM8993_HPOUT1R_ENA);
  345. /* Enable the second stage */
  346. snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
  347. WM8993_HPOUT1L_DLY |
  348. WM8993_HPOUT1R_DLY,
  349. WM8993_HPOUT1L_DLY |
  350. WM8993_HPOUT1R_DLY);
  351. break;
  352. default:
  353. dev_err(codec->dev, "Unknown HP startup mode %d\n",
  354. hubs->hp_startup_mode);
  355. break;
  356. }
  357. break;
  358. case SND_SOC_DAPM_PRE_PMD:
  359. snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
  360. WM8993_CP_ENA, 0);
  361. break;
  362. }
  363. return 0;
  364. }
  365. static int hp_event(struct snd_soc_dapm_widget *w,
  366. struct snd_kcontrol *kcontrol, int event)
  367. {
  368. struct snd_soc_codec *codec = w->codec;
  369. unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
  370. switch (event) {
  371. case SND_SOC_DAPM_POST_PMU:
  372. snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
  373. WM8993_CP_ENA, WM8993_CP_ENA);
  374. msleep(5);
  375. snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
  376. WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
  377. WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
  378. reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
  379. snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
  380. snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
  381. WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
  382. calibrate_dc_servo(codec);
  383. reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
  384. WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
  385. snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
  386. break;
  387. case SND_SOC_DAPM_PRE_PMD:
  388. snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
  389. WM8993_HPOUT1L_OUTP |
  390. WM8993_HPOUT1R_OUTP |
  391. WM8993_HPOUT1L_RMV_SHORT |
  392. WM8993_HPOUT1R_RMV_SHORT, 0);
  393. snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
  394. WM8993_HPOUT1L_DLY |
  395. WM8993_HPOUT1R_DLY, 0);
  396. snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
  397. snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
  398. WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
  399. 0);
  400. break;
  401. }
  402. return 0;
  403. }
  404. static int earpiece_event(struct snd_soc_dapm_widget *w,
  405. struct snd_kcontrol *control, int event)
  406. {
  407. struct snd_soc_codec *codec = w->codec;
  408. u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
  409. switch (event) {
  410. case SND_SOC_DAPM_PRE_PMU:
  411. reg |= WM8993_HPOUT2_IN_ENA;
  412. snd_soc_write(codec, WM8993_ANTIPOP1, reg);
  413. udelay(50);
  414. break;
  415. case SND_SOC_DAPM_POST_PMD:
  416. snd_soc_write(codec, WM8993_ANTIPOP1, reg);
  417. break;
  418. default:
  419. BUG();
  420. break;
  421. }
  422. return 0;
  423. }
  424. static int lineout_event(struct snd_soc_dapm_widget *w,
  425. struct snd_kcontrol *control, int event)
  426. {
  427. struct snd_soc_codec *codec = w->codec;
  428. struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
  429. bool *flag;
  430. switch (w->shift) {
  431. case WM8993_LINEOUT1N_ENA_SHIFT:
  432. flag = &hubs->lineout1n_ena;
  433. break;
  434. case WM8993_LINEOUT1P_ENA_SHIFT:
  435. flag = &hubs->lineout1p_ena;
  436. break;
  437. case WM8993_LINEOUT2N_ENA_SHIFT:
  438. flag = &hubs->lineout2n_ena;
  439. break;
  440. case WM8993_LINEOUT2P_ENA_SHIFT:
  441. flag = &hubs->lineout2p_ena;
  442. break;
  443. default:
  444. WARN(1, "Unknown line output");
  445. return -EINVAL;
  446. }
  447. *flag = SND_SOC_DAPM_EVENT_ON(event);
  448. return 0;
  449. }
  450. static const struct snd_kcontrol_new in1l_pga[] = {
  451. SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
  452. SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
  453. };
  454. static const struct snd_kcontrol_new in1r_pga[] = {
  455. SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
  456. SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
  457. };
  458. static const struct snd_kcontrol_new in2l_pga[] = {
  459. SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
  460. SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
  461. };
  462. static const struct snd_kcontrol_new in2r_pga[] = {
  463. SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
  464. SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
  465. };
  466. static const struct snd_kcontrol_new mixinl[] = {
  467. SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
  468. SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
  469. };
  470. static const struct snd_kcontrol_new mixinr[] = {
  471. SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
  472. SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
  473. };
  474. static const struct snd_kcontrol_new left_output_mixer[] = {
  475. SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
  476. SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
  477. SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
  478. SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
  479. SOC_DAPM_SINGLE("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
  480. SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
  481. SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
  482. SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
  483. };
  484. static const struct snd_kcontrol_new right_output_mixer[] = {
  485. SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
  486. SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
  487. SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
  488. SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
  489. SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
  490. SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
  491. SOC_DAPM_SINGLE("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
  492. SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
  493. };
  494. static const struct snd_kcontrol_new earpiece_mixer[] = {
  495. SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
  496. SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
  497. SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
  498. };
  499. static const struct snd_kcontrol_new left_speaker_boost[] = {
  500. SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
  501. SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
  502. SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
  503. };
  504. static const struct snd_kcontrol_new right_speaker_boost[] = {
  505. SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
  506. SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
  507. SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
  508. };
  509. static const struct snd_kcontrol_new line1_mix[] = {
  510. SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
  511. SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
  512. SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
  513. };
  514. static const struct snd_kcontrol_new line1n_mix[] = {
  515. SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
  516. SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
  517. };
  518. static const struct snd_kcontrol_new line1p_mix[] = {
  519. SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
  520. };
  521. static const struct snd_kcontrol_new line2_mix[] = {
  522. SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0),
  523. SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0),
  524. SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
  525. };
  526. static const struct snd_kcontrol_new line2n_mix[] = {
  527. SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
  528. SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
  529. };
  530. static const struct snd_kcontrol_new line2p_mix[] = {
  531. SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
  532. };
  533. static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
  534. SND_SOC_DAPM_INPUT("IN1LN"),
  535. SND_SOC_DAPM_INPUT("IN1LP"),
  536. SND_SOC_DAPM_INPUT("IN2LN"),
  537. SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
  538. SND_SOC_DAPM_INPUT("IN1RN"),
  539. SND_SOC_DAPM_INPUT("IN1RP"),
  540. SND_SOC_DAPM_INPUT("IN2RN"),
  541. SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
  542. SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, NULL, 0),
  543. SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, NULL, 0),
  544. SND_SOC_DAPM_SUPPLY("LINEOUT_VMID_BUF", WM8993_ANTIPOP1, 7, 0, NULL, 0),
  545. SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
  546. in1l_pga, ARRAY_SIZE(in1l_pga)),
  547. SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
  548. in1r_pga, ARRAY_SIZE(in1r_pga)),
  549. SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
  550. in2l_pga, ARRAY_SIZE(in2l_pga)),
  551. SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
  552. in2r_pga, ARRAY_SIZE(in2r_pga)),
  553. SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
  554. mixinl, ARRAY_SIZE(mixinl)),
  555. SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
  556. mixinr, ARRAY_SIZE(mixinr)),
  557. SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
  558. left_output_mixer, ARRAY_SIZE(left_output_mixer)),
  559. SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
  560. right_output_mixer, ARRAY_SIZE(right_output_mixer)),
  561. SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
  562. SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
  563. SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
  564. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
  565. SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
  566. hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  567. SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
  568. earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
  569. SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
  570. NULL, 0, earpiece_event,
  571. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  572. SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
  573. left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
  574. SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
  575. right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
  576. SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0),
  577. SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
  578. NULL, 0),
  579. SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
  580. NULL, 0),
  581. SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
  582. line1_mix, ARRAY_SIZE(line1_mix)),
  583. SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
  584. line2_mix, ARRAY_SIZE(line2_mix)),
  585. SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
  586. line1n_mix, ARRAY_SIZE(line1n_mix)),
  587. SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
  588. line1p_mix, ARRAY_SIZE(line1p_mix)),
  589. SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
  590. line2n_mix, ARRAY_SIZE(line2n_mix)),
  591. SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
  592. line2p_mix, ARRAY_SIZE(line2p_mix)),
  593. SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
  594. NULL, 0, lineout_event,
  595. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  596. SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
  597. NULL, 0, lineout_event,
  598. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  599. SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
  600. NULL, 0, lineout_event,
  601. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  602. SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
  603. NULL, 0, lineout_event,
  604. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  605. SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
  606. SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
  607. SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
  608. SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
  609. SND_SOC_DAPM_OUTPUT("HPOUT1L"),
  610. SND_SOC_DAPM_OUTPUT("HPOUT1R"),
  611. SND_SOC_DAPM_OUTPUT("HPOUT2P"),
  612. SND_SOC_DAPM_OUTPUT("HPOUT2N"),
  613. SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
  614. SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
  615. SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
  616. SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
  617. };
  618. static const struct snd_soc_dapm_route analogue_routes[] = {
  619. { "MICBIAS1", NULL, "CLK_SYS" },
  620. { "MICBIAS2", NULL, "CLK_SYS" },
  621. { "IN1L PGA", "IN1LP Switch", "IN1LP" },
  622. { "IN1L PGA", "IN1LN Switch", "IN1LN" },
  623. { "IN1L PGA", NULL, "VMID" },
  624. { "IN1R PGA", NULL, "VMID" },
  625. { "IN2L PGA", NULL, "VMID" },
  626. { "IN2R PGA", NULL, "VMID" },
  627. { "IN1R PGA", "IN1RP Switch", "IN1RP" },
  628. { "IN1R PGA", "IN1RN Switch", "IN1RN" },
  629. { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
  630. { "IN2L PGA", "IN2LN Switch", "IN2LN" },
  631. { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
  632. { "IN2R PGA", "IN2RN Switch", "IN2RN" },
  633. { "Direct Voice", NULL, "IN2LP:VXRN" },
  634. { "Direct Voice", NULL, "IN2RP:VXRP" },
  635. { "MIXINL", "IN1L Switch", "IN1L PGA" },
  636. { "MIXINL", "IN2L Switch", "IN2L PGA" },
  637. { "MIXINL", NULL, "Direct Voice" },
  638. { "MIXINL", NULL, "IN1LP" },
  639. { "MIXINL", NULL, "Left Output Mixer" },
  640. { "MIXINL", NULL, "VMID" },
  641. { "MIXINR", "IN1R Switch", "IN1R PGA" },
  642. { "MIXINR", "IN2R Switch", "IN2R PGA" },
  643. { "MIXINR", NULL, "Direct Voice" },
  644. { "MIXINR", NULL, "IN1RP" },
  645. { "MIXINR", NULL, "Right Output Mixer" },
  646. { "MIXINR", NULL, "VMID" },
  647. { "ADCL", NULL, "MIXINL" },
  648. { "ADCR", NULL, "MIXINR" },
  649. { "Left Output Mixer", "Left Input Switch", "MIXINL" },
  650. { "Left Output Mixer", "Right Input Switch", "MIXINR" },
  651. { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
  652. { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
  653. { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
  654. { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
  655. { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
  656. { "Right Output Mixer", "Left Input Switch", "MIXINL" },
  657. { "Right Output Mixer", "Right Input Switch", "MIXINR" },
  658. { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
  659. { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
  660. { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
  661. { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
  662. { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
  663. { "Left Output PGA", NULL, "Left Output Mixer" },
  664. { "Left Output PGA", NULL, "TOCLK" },
  665. { "Right Output PGA", NULL, "Right Output Mixer" },
  666. { "Right Output PGA", NULL, "TOCLK" },
  667. { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
  668. { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
  669. { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
  670. { "Earpiece Driver", NULL, "VMID" },
  671. { "Earpiece Driver", NULL, "Earpiece Mixer" },
  672. { "HPOUT2N", NULL, "Earpiece Driver" },
  673. { "HPOUT2P", NULL, "Earpiece Driver" },
  674. { "SPKL", "Input Switch", "MIXINL" },
  675. { "SPKL", "IN1LP Switch", "IN1LP" },
  676. { "SPKL", "Output Switch", "Left Output PGA" },
  677. { "SPKL", NULL, "TOCLK" },
  678. { "SPKR", "Input Switch", "MIXINR" },
  679. { "SPKR", "IN1RP Switch", "IN1RP" },
  680. { "SPKR", "Output Switch", "Right Output PGA" },
  681. { "SPKR", NULL, "TOCLK" },
  682. { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
  683. { "SPKL Boost", "SPKL Switch", "SPKL" },
  684. { "SPKL Boost", "SPKR Switch", "SPKR" },
  685. { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
  686. { "SPKR Boost", "SPKR Switch", "SPKR" },
  687. { "SPKR Boost", "SPKL Switch", "SPKL" },
  688. { "SPKL Driver", NULL, "VMID" },
  689. { "SPKL Driver", NULL, "SPKL Boost" },
  690. { "SPKL Driver", NULL, "CLK_SYS" },
  691. { "SPKL Driver", NULL, "TSHUT" },
  692. { "SPKR Driver", NULL, "VMID" },
  693. { "SPKR Driver", NULL, "SPKR Boost" },
  694. { "SPKR Driver", NULL, "CLK_SYS" },
  695. { "SPKR Driver", NULL, "TSHUT" },
  696. { "SPKOUTLP", NULL, "SPKL Driver" },
  697. { "SPKOUTLN", NULL, "SPKL Driver" },
  698. { "SPKOUTRP", NULL, "SPKR Driver" },
  699. { "SPKOUTRN", NULL, "SPKR Driver" },
  700. { "Left Headphone Mux", "Mixer", "Left Output PGA" },
  701. { "Right Headphone Mux", "Mixer", "Right Output PGA" },
  702. { "Headphone PGA", NULL, "Left Headphone Mux" },
  703. { "Headphone PGA", NULL, "Right Headphone Mux" },
  704. { "Headphone PGA", NULL, "VMID" },
  705. { "Headphone PGA", NULL, "CLK_SYS" },
  706. { "Headphone PGA", NULL, "Headphone Supply" },
  707. { "HPOUT1L", NULL, "Headphone PGA" },
  708. { "HPOUT1R", NULL, "Headphone PGA" },
  709. { "LINEOUT1N Driver", NULL, "VMID" },
  710. { "LINEOUT1P Driver", NULL, "VMID" },
  711. { "LINEOUT2N Driver", NULL, "VMID" },
  712. { "LINEOUT2P Driver", NULL, "VMID" },
  713. { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
  714. { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
  715. { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
  716. { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
  717. };
  718. static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
  719. { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
  720. { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
  721. { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
  722. { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
  723. { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
  724. };
  725. static const struct snd_soc_dapm_route lineout1_se_routes[] = {
  726. { "LINEOUT1N Mixer", NULL, "LINEOUT_VMID_BUF" },
  727. { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
  728. { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
  729. { "LINEOUT1P Mixer", NULL, "LINEOUT_VMID_BUF" },
  730. { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
  731. { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
  732. { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
  733. };
  734. static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
  735. { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" },
  736. { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" },
  737. { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
  738. { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
  739. { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
  740. };
  741. static const struct snd_soc_dapm_route lineout2_se_routes[] = {
  742. { "LINEOUT2N Mixer", NULL, "LINEOUT_VMID_BUF" },
  743. { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
  744. { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
  745. { "LINEOUT2P Mixer", NULL, "LINEOUT_VMID_BUF" },
  746. { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
  747. { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
  748. { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
  749. };
  750. int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
  751. {
  752. struct snd_soc_dapm_context *dapm = &codec->dapm;
  753. /* Latch volume update bits & default ZC on */
  754. snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
  755. WM8993_IN1_VU, WM8993_IN1_VU);
  756. snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
  757. WM8993_IN1_VU, WM8993_IN1_VU);
  758. snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
  759. WM8993_IN2_VU, WM8993_IN2_VU);
  760. snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
  761. WM8993_IN2_VU, WM8993_IN2_VU);
  762. snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
  763. WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
  764. snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
  765. WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
  766. snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
  767. WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
  768. WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
  769. snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
  770. WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
  771. WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
  772. snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
  773. WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
  774. WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
  775. snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
  776. WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
  777. WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
  778. snd_soc_add_codec_controls(codec, analogue_snd_controls,
  779. ARRAY_SIZE(analogue_snd_controls));
  780. snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
  781. ARRAY_SIZE(analogue_dapm_widgets));
  782. return 0;
  783. }
  784. EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
  785. int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
  786. int lineout1_diff, int lineout2_diff)
  787. {
  788. struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
  789. struct snd_soc_dapm_context *dapm = &codec->dapm;
  790. init_completion(&hubs->dcs_done);
  791. snd_soc_dapm_add_routes(dapm, analogue_routes,
  792. ARRAY_SIZE(analogue_routes));
  793. if (lineout1_diff)
  794. snd_soc_dapm_add_routes(dapm,
  795. lineout1_diff_routes,
  796. ARRAY_SIZE(lineout1_diff_routes));
  797. else
  798. snd_soc_dapm_add_routes(dapm,
  799. lineout1_se_routes,
  800. ARRAY_SIZE(lineout1_se_routes));
  801. if (lineout2_diff)
  802. snd_soc_dapm_add_routes(dapm,
  803. lineout2_diff_routes,
  804. ARRAY_SIZE(lineout2_diff_routes));
  805. else
  806. snd_soc_dapm_add_routes(dapm,
  807. lineout2_se_routes,
  808. ARRAY_SIZE(lineout2_se_routes));
  809. return 0;
  810. }
  811. EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
  812. int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
  813. int lineout1_diff, int lineout2_diff,
  814. int lineout1fb, int lineout2fb,
  815. int jd_scthr, int jd_thr, int micbias1_lvl,
  816. int micbias2_lvl)
  817. {
  818. struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
  819. hubs->lineout1_se = !lineout1_diff;
  820. hubs->lineout2_se = !lineout2_diff;
  821. if (!lineout1_diff)
  822. snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
  823. WM8993_LINEOUT1_MODE,
  824. WM8993_LINEOUT1_MODE);
  825. if (!lineout2_diff)
  826. snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
  827. WM8993_LINEOUT2_MODE,
  828. WM8993_LINEOUT2_MODE);
  829. if (!lineout1_diff && !lineout2_diff)
  830. snd_soc_update_bits(codec, WM8993_ANTIPOP1,
  831. WM8993_LINEOUT_VMID_BUF_ENA,
  832. WM8993_LINEOUT_VMID_BUF_ENA);
  833. if (lineout1fb)
  834. snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
  835. WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
  836. if (lineout2fb)
  837. snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
  838. WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
  839. snd_soc_update_bits(codec, WM8993_MICBIAS,
  840. WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
  841. WM8993_MICB1_LVL | WM8993_MICB2_LVL,
  842. jd_scthr << WM8993_JD_SCTHR_SHIFT |
  843. jd_thr << WM8993_JD_THR_SHIFT |
  844. micbias1_lvl |
  845. micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
  846. return 0;
  847. }
  848. EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
  849. void wm_hubs_vmid_ena(struct snd_soc_codec *codec)
  850. {
  851. struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
  852. int val = 0;
  853. if (hubs->lineout1_se)
  854. val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
  855. if (hubs->lineout2_se)
  856. val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
  857. /* Enable the line outputs while we power up */
  858. snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val);
  859. }
  860. EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena);
  861. void wm_hubs_set_bias_level(struct snd_soc_codec *codec,
  862. enum snd_soc_bias_level level)
  863. {
  864. struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
  865. int mask, val;
  866. switch (level) {
  867. case SND_SOC_BIAS_STANDBY:
  868. /* Clamp the inputs to VMID while we ramp to charge caps */
  869. snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
  870. WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP);
  871. break;
  872. case SND_SOC_BIAS_ON:
  873. /* Turn off any unneded single ended outputs */
  874. val = 0;
  875. mask = 0;
  876. if (hubs->lineout1_se)
  877. mask |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
  878. if (hubs->lineout2_se)
  879. mask |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
  880. if (hubs->lineout1_se && hubs->lineout1n_ena)
  881. val |= WM8993_LINEOUT1N_ENA;
  882. if (hubs->lineout1_se && hubs->lineout1p_ena)
  883. val |= WM8993_LINEOUT1P_ENA;
  884. if (hubs->lineout2_se && hubs->lineout2n_ena)
  885. val |= WM8993_LINEOUT2N_ENA;
  886. if (hubs->lineout2_se && hubs->lineout2p_ena)
  887. val |= WM8993_LINEOUT2P_ENA;
  888. snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3,
  889. mask, val);
  890. /* Remove the input clamps */
  891. snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
  892. WM8993_INPUTS_CLAMP, 0);
  893. break;
  894. default:
  895. break;
  896. }
  897. }
  898. EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level);
  899. MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
  900. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  901. MODULE_LICENSE("GPL");