wm8988.c 27 KB

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  1. /*
  2. * wm8988.c -- WM8988 ALSA SoC audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. * Copyright 2005 Openedhand Ltd.
  6. *
  7. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/spi/spi.h>
  20. #include <linux/slab.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/tlv.h>
  25. #include <sound/soc.h>
  26. #include <sound/initval.h>
  27. #include "wm8988.h"
  28. /*
  29. * wm8988 register cache
  30. * We can't read the WM8988 register space when we
  31. * are using 2 wire for device control, so we cache them instead.
  32. */
  33. static const struct reg_default wm8988_reg_defaults[] = {
  34. { 0, 0x0097 },
  35. { 1, 0x0097 },
  36. { 2, 0x0079 },
  37. { 3, 0x0079 },
  38. { 5, 0x0008 },
  39. { 7, 0x000a },
  40. { 8, 0x0000 },
  41. { 10, 0x00ff },
  42. { 11, 0x00ff },
  43. { 12, 0x000f },
  44. { 13, 0x000f },
  45. { 16, 0x0000 },
  46. { 17, 0x007b },
  47. { 18, 0x0000 },
  48. { 19, 0x0032 },
  49. { 20, 0x0000 },
  50. { 21, 0x00c3 },
  51. { 22, 0x00c3 },
  52. { 23, 0x00c0 },
  53. { 24, 0x0000 },
  54. { 25, 0x0000 },
  55. { 26, 0x0000 },
  56. { 27, 0x0000 },
  57. { 31, 0x0000 },
  58. { 32, 0x0000 },
  59. { 33, 0x0000 },
  60. { 34, 0x0050 },
  61. { 35, 0x0050 },
  62. { 36, 0x0050 },
  63. { 37, 0x0050 },
  64. { 40, 0x0079 },
  65. { 41, 0x0079 },
  66. { 42, 0x0079 },
  67. };
  68. static bool wm8988_writeable(struct device *dev, unsigned int reg)
  69. {
  70. switch (reg) {
  71. case WM8988_LINVOL:
  72. case WM8988_RINVOL:
  73. case WM8988_LOUT1V:
  74. case WM8988_ROUT1V:
  75. case WM8988_ADCDAC:
  76. case WM8988_IFACE:
  77. case WM8988_SRATE:
  78. case WM8988_LDAC:
  79. case WM8988_RDAC:
  80. case WM8988_BASS:
  81. case WM8988_TREBLE:
  82. case WM8988_RESET:
  83. case WM8988_3D:
  84. case WM8988_ALC1:
  85. case WM8988_ALC2:
  86. case WM8988_ALC3:
  87. case WM8988_NGATE:
  88. case WM8988_LADC:
  89. case WM8988_RADC:
  90. case WM8988_ADCTL1:
  91. case WM8988_ADCTL2:
  92. case WM8988_PWR1:
  93. case WM8988_PWR2:
  94. case WM8988_ADCTL3:
  95. case WM8988_ADCIN:
  96. case WM8988_LADCIN:
  97. case WM8988_RADCIN:
  98. case WM8988_LOUTM1:
  99. case WM8988_LOUTM2:
  100. case WM8988_ROUTM1:
  101. case WM8988_ROUTM2:
  102. case WM8988_LOUT2V:
  103. case WM8988_ROUT2V:
  104. case WM8988_LPPB:
  105. return true;
  106. default:
  107. return false;
  108. }
  109. }
  110. /* codec private data */
  111. struct wm8988_priv {
  112. struct regmap *regmap;
  113. unsigned int sysclk;
  114. struct snd_pcm_hw_constraint_list *sysclk_constraints;
  115. };
  116. #define wm8988_reset(c) snd_soc_write(c, WM8988_RESET, 0)
  117. /*
  118. * WM8988 Controls
  119. */
  120. static const char *bass_boost_txt[] = {"Linear Control", "Adaptive Boost"};
  121. static const struct soc_enum bass_boost =
  122. SOC_ENUM_SINGLE(WM8988_BASS, 7, 2, bass_boost_txt);
  123. static const char *bass_filter_txt[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  124. static const struct soc_enum bass_filter =
  125. SOC_ENUM_SINGLE(WM8988_BASS, 6, 2, bass_filter_txt);
  126. static const char *treble_txt[] = {"8kHz", "4kHz"};
  127. static const struct soc_enum treble =
  128. SOC_ENUM_SINGLE(WM8988_TREBLE, 6, 2, treble_txt);
  129. static const char *stereo_3d_lc_txt[] = {"200Hz", "500Hz"};
  130. static const struct soc_enum stereo_3d_lc =
  131. SOC_ENUM_SINGLE(WM8988_3D, 5, 2, stereo_3d_lc_txt);
  132. static const char *stereo_3d_uc_txt[] = {"2.2kHz", "1.5kHz"};
  133. static const struct soc_enum stereo_3d_uc =
  134. SOC_ENUM_SINGLE(WM8988_3D, 6, 2, stereo_3d_uc_txt);
  135. static const char *stereo_3d_func_txt[] = {"Capture", "Playback"};
  136. static const struct soc_enum stereo_3d_func =
  137. SOC_ENUM_SINGLE(WM8988_3D, 7, 2, stereo_3d_func_txt);
  138. static const char *alc_func_txt[] = {"Off", "Right", "Left", "Stereo"};
  139. static const struct soc_enum alc_func =
  140. SOC_ENUM_SINGLE(WM8988_ALC1, 7, 4, alc_func_txt);
  141. static const char *ng_type_txt[] = {"Constant PGA Gain",
  142. "Mute ADC Output"};
  143. static const struct soc_enum ng_type =
  144. SOC_ENUM_SINGLE(WM8988_NGATE, 1, 2, ng_type_txt);
  145. static const char *deemph_txt[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  146. static const struct soc_enum deemph =
  147. SOC_ENUM_SINGLE(WM8988_ADCDAC, 1, 4, deemph_txt);
  148. static const char *adcpol_txt[] = {"Normal", "L Invert", "R Invert",
  149. "L + R Invert"};
  150. static const struct soc_enum adcpol =
  151. SOC_ENUM_SINGLE(WM8988_ADCDAC, 5, 4, adcpol_txt);
  152. static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
  153. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
  154. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
  155. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  156. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
  157. static const struct snd_kcontrol_new wm8988_snd_controls[] = {
  158. SOC_ENUM("Bass Boost", bass_boost),
  159. SOC_ENUM("Bass Filter", bass_filter),
  160. SOC_SINGLE("Bass Volume", WM8988_BASS, 0, 15, 1),
  161. SOC_SINGLE("Treble Volume", WM8988_TREBLE, 0, 15, 0),
  162. SOC_ENUM("Treble Cut-off", treble),
  163. SOC_SINGLE("3D Switch", WM8988_3D, 0, 1, 0),
  164. SOC_SINGLE("3D Volume", WM8988_3D, 1, 15, 0),
  165. SOC_ENUM("3D Lower Cut-off", stereo_3d_lc),
  166. SOC_ENUM("3D Upper Cut-off", stereo_3d_uc),
  167. SOC_ENUM("3D Mode", stereo_3d_func),
  168. SOC_SINGLE("ALC Capture Target Volume", WM8988_ALC1, 0, 7, 0),
  169. SOC_SINGLE("ALC Capture Max Volume", WM8988_ALC1, 4, 7, 0),
  170. SOC_ENUM("ALC Capture Function", alc_func),
  171. SOC_SINGLE("ALC Capture ZC Switch", WM8988_ALC2, 7, 1, 0),
  172. SOC_SINGLE("ALC Capture Hold Time", WM8988_ALC2, 0, 15, 0),
  173. SOC_SINGLE("ALC Capture Decay Time", WM8988_ALC3, 4, 15, 0),
  174. SOC_SINGLE("ALC Capture Attack Time", WM8988_ALC3, 0, 15, 0),
  175. SOC_SINGLE("ALC Capture NG Threshold", WM8988_NGATE, 3, 31, 0),
  176. SOC_ENUM("ALC Capture NG Type", ng_type),
  177. SOC_SINGLE("ALC Capture NG Switch", WM8988_NGATE, 0, 1, 0),
  178. SOC_SINGLE("ZC Timeout Switch", WM8988_ADCTL1, 0, 1, 0),
  179. SOC_DOUBLE_R_TLV("Capture Digital Volume", WM8988_LADC, WM8988_RADC,
  180. 0, 255, 0, adc_tlv),
  181. SOC_DOUBLE_R_TLV("Capture Volume", WM8988_LINVOL, WM8988_RINVOL,
  182. 0, 63, 0, pga_tlv),
  183. SOC_DOUBLE_R("Capture ZC Switch", WM8988_LINVOL, WM8988_RINVOL, 6, 1, 0),
  184. SOC_DOUBLE_R("Capture Switch", WM8988_LINVOL, WM8988_RINVOL, 7, 1, 1),
  185. SOC_ENUM("Playback De-emphasis", deemph),
  186. SOC_ENUM("Capture Polarity", adcpol),
  187. SOC_SINGLE("Playback 6dB Attenuate", WM8988_ADCDAC, 7, 1, 0),
  188. SOC_SINGLE("Capture 6dB Attenuate", WM8988_ADCDAC, 8, 1, 0),
  189. SOC_DOUBLE_R_TLV("PCM Volume", WM8988_LDAC, WM8988_RDAC, 0, 255, 0, dac_tlv),
  190. SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", WM8988_LOUTM1, 4, 7, 1,
  191. bypass_tlv),
  192. SOC_SINGLE_TLV("Left Mixer Right Bypass Volume", WM8988_LOUTM2, 4, 7, 1,
  193. bypass_tlv),
  194. SOC_SINGLE_TLV("Right Mixer Left Bypass Volume", WM8988_ROUTM1, 4, 7, 1,
  195. bypass_tlv),
  196. SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", WM8988_ROUTM2, 4, 7, 1,
  197. bypass_tlv),
  198. SOC_DOUBLE_R("Output 1 Playback ZC Switch", WM8988_LOUT1V,
  199. WM8988_ROUT1V, 7, 1, 0),
  200. SOC_DOUBLE_R_TLV("Output 1 Playback Volume", WM8988_LOUT1V, WM8988_ROUT1V,
  201. 0, 127, 0, out_tlv),
  202. SOC_DOUBLE_R("Output 2 Playback ZC Switch", WM8988_LOUT2V,
  203. WM8988_ROUT2V, 7, 1, 0),
  204. SOC_DOUBLE_R_TLV("Output 2 Playback Volume", WM8988_LOUT2V, WM8988_ROUT2V,
  205. 0, 127, 0, out_tlv),
  206. };
  207. /*
  208. * DAPM Controls
  209. */
  210. static int wm8988_lrc_control(struct snd_soc_dapm_widget *w,
  211. struct snd_kcontrol *kcontrol, int event)
  212. {
  213. struct snd_soc_codec *codec = w->codec;
  214. u16 adctl2 = snd_soc_read(codec, WM8988_ADCTL2);
  215. /* Use the DAC to gate LRC if active, otherwise use ADC */
  216. if (snd_soc_read(codec, WM8988_PWR2) & 0x180)
  217. adctl2 &= ~0x4;
  218. else
  219. adctl2 |= 0x4;
  220. return snd_soc_write(codec, WM8988_ADCTL2, adctl2);
  221. }
  222. static const char *wm8988_line_texts[] = {
  223. "Line 1", "Line 2", "PGA", "Differential"};
  224. static const unsigned int wm8988_line_values[] = {
  225. 0, 1, 3, 4};
  226. static const struct soc_enum wm8988_lline_enum =
  227. SOC_VALUE_ENUM_SINGLE(WM8988_LOUTM1, 0, 7,
  228. ARRAY_SIZE(wm8988_line_texts),
  229. wm8988_line_texts,
  230. wm8988_line_values);
  231. static const struct snd_kcontrol_new wm8988_left_line_controls =
  232. SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
  233. static const struct soc_enum wm8988_rline_enum =
  234. SOC_VALUE_ENUM_SINGLE(WM8988_ROUTM1, 0, 7,
  235. ARRAY_SIZE(wm8988_line_texts),
  236. wm8988_line_texts,
  237. wm8988_line_values);
  238. static const struct snd_kcontrol_new wm8988_right_line_controls =
  239. SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
  240. /* Left Mixer */
  241. static const struct snd_kcontrol_new wm8988_left_mixer_controls[] = {
  242. SOC_DAPM_SINGLE("Playback Switch", WM8988_LOUTM1, 8, 1, 0),
  243. SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_LOUTM1, 7, 1, 0),
  244. SOC_DAPM_SINGLE("Right Playback Switch", WM8988_LOUTM2, 8, 1, 0),
  245. SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_LOUTM2, 7, 1, 0),
  246. };
  247. /* Right Mixer */
  248. static const struct snd_kcontrol_new wm8988_right_mixer_controls[] = {
  249. SOC_DAPM_SINGLE("Left Playback Switch", WM8988_ROUTM1, 8, 1, 0),
  250. SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_ROUTM1, 7, 1, 0),
  251. SOC_DAPM_SINGLE("Playback Switch", WM8988_ROUTM2, 8, 1, 0),
  252. SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_ROUTM2, 7, 1, 0),
  253. };
  254. static const char *wm8988_pga_sel[] = {"Line 1", "Line 2", "Differential"};
  255. static const unsigned int wm8988_pga_val[] = { 0, 1, 3 };
  256. /* Left PGA Mux */
  257. static const struct soc_enum wm8988_lpga_enum =
  258. SOC_VALUE_ENUM_SINGLE(WM8988_LADCIN, 6, 3,
  259. ARRAY_SIZE(wm8988_pga_sel),
  260. wm8988_pga_sel,
  261. wm8988_pga_val);
  262. static const struct snd_kcontrol_new wm8988_left_pga_controls =
  263. SOC_DAPM_VALUE_ENUM("Route", wm8988_lpga_enum);
  264. /* Right PGA Mux */
  265. static const struct soc_enum wm8988_rpga_enum =
  266. SOC_VALUE_ENUM_SINGLE(WM8988_RADCIN, 6, 3,
  267. ARRAY_SIZE(wm8988_pga_sel),
  268. wm8988_pga_sel,
  269. wm8988_pga_val);
  270. static const struct snd_kcontrol_new wm8988_right_pga_controls =
  271. SOC_DAPM_VALUE_ENUM("Route", wm8988_rpga_enum);
  272. /* Differential Mux */
  273. static const char *wm8988_diff_sel[] = {"Line 1", "Line 2"};
  274. static const struct soc_enum diffmux =
  275. SOC_ENUM_SINGLE(WM8988_ADCIN, 8, 2, wm8988_diff_sel);
  276. static const struct snd_kcontrol_new wm8988_diffmux_controls =
  277. SOC_DAPM_ENUM("Route", diffmux);
  278. /* Mono ADC Mux */
  279. static const char *wm8988_mono_mux[] = {"Stereo", "Mono (Left)",
  280. "Mono (Right)", "Digital Mono"};
  281. static const struct soc_enum monomux =
  282. SOC_ENUM_SINGLE(WM8988_ADCIN, 6, 4, wm8988_mono_mux);
  283. static const struct snd_kcontrol_new wm8988_monomux_controls =
  284. SOC_DAPM_ENUM("Route", monomux);
  285. static const struct snd_soc_dapm_widget wm8988_dapm_widgets[] = {
  286. SND_SOC_DAPM_SUPPLY("Mic Bias", WM8988_PWR1, 1, 0, NULL, 0),
  287. SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
  288. &wm8988_diffmux_controls),
  289. SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
  290. &wm8988_monomux_controls),
  291. SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
  292. &wm8988_monomux_controls),
  293. SND_SOC_DAPM_MUX("Left PGA Mux", WM8988_PWR1, 5, 0,
  294. &wm8988_left_pga_controls),
  295. SND_SOC_DAPM_MUX("Right PGA Mux", WM8988_PWR1, 4, 0,
  296. &wm8988_right_pga_controls),
  297. SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
  298. &wm8988_left_line_controls),
  299. SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
  300. &wm8988_right_line_controls),
  301. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8988_PWR1, 2, 0),
  302. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8988_PWR1, 3, 0),
  303. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8988_PWR2, 7, 0),
  304. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8988_PWR2, 8, 0),
  305. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  306. &wm8988_left_mixer_controls[0],
  307. ARRAY_SIZE(wm8988_left_mixer_controls)),
  308. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  309. &wm8988_right_mixer_controls[0],
  310. ARRAY_SIZE(wm8988_right_mixer_controls)),
  311. SND_SOC_DAPM_PGA("Right Out 2", WM8988_PWR2, 3, 0, NULL, 0),
  312. SND_SOC_DAPM_PGA("Left Out 2", WM8988_PWR2, 4, 0, NULL, 0),
  313. SND_SOC_DAPM_PGA("Right Out 1", WM8988_PWR2, 5, 0, NULL, 0),
  314. SND_SOC_DAPM_PGA("Left Out 1", WM8988_PWR2, 6, 0, NULL, 0),
  315. SND_SOC_DAPM_POST("LRC control", wm8988_lrc_control),
  316. SND_SOC_DAPM_OUTPUT("LOUT1"),
  317. SND_SOC_DAPM_OUTPUT("ROUT1"),
  318. SND_SOC_DAPM_OUTPUT("LOUT2"),
  319. SND_SOC_DAPM_OUTPUT("ROUT2"),
  320. SND_SOC_DAPM_OUTPUT("VREF"),
  321. SND_SOC_DAPM_INPUT("LINPUT1"),
  322. SND_SOC_DAPM_INPUT("LINPUT2"),
  323. SND_SOC_DAPM_INPUT("RINPUT1"),
  324. SND_SOC_DAPM_INPUT("RINPUT2"),
  325. };
  326. static const struct snd_soc_dapm_route wm8988_dapm_routes[] = {
  327. { "Left Line Mux", "Line 1", "LINPUT1" },
  328. { "Left Line Mux", "Line 2", "LINPUT2" },
  329. { "Left Line Mux", "PGA", "Left PGA Mux" },
  330. { "Left Line Mux", "Differential", "Differential Mux" },
  331. { "Right Line Mux", "Line 1", "RINPUT1" },
  332. { "Right Line Mux", "Line 2", "RINPUT2" },
  333. { "Right Line Mux", "PGA", "Right PGA Mux" },
  334. { "Right Line Mux", "Differential", "Differential Mux" },
  335. { "Left PGA Mux", "Line 1", "LINPUT1" },
  336. { "Left PGA Mux", "Line 2", "LINPUT2" },
  337. { "Left PGA Mux", "Differential", "Differential Mux" },
  338. { "Right PGA Mux", "Line 1", "RINPUT1" },
  339. { "Right PGA Mux", "Line 2", "RINPUT2" },
  340. { "Right PGA Mux", "Differential", "Differential Mux" },
  341. { "Differential Mux", "Line 1", "LINPUT1" },
  342. { "Differential Mux", "Line 1", "RINPUT1" },
  343. { "Differential Mux", "Line 2", "LINPUT2" },
  344. { "Differential Mux", "Line 2", "RINPUT2" },
  345. { "Left ADC Mux", "Stereo", "Left PGA Mux" },
  346. { "Left ADC Mux", "Mono (Left)", "Left PGA Mux" },
  347. { "Left ADC Mux", "Digital Mono", "Left PGA Mux" },
  348. { "Right ADC Mux", "Stereo", "Right PGA Mux" },
  349. { "Right ADC Mux", "Mono (Right)", "Right PGA Mux" },
  350. { "Right ADC Mux", "Digital Mono", "Right PGA Mux" },
  351. { "Left ADC", NULL, "Left ADC Mux" },
  352. { "Right ADC", NULL, "Right ADC Mux" },
  353. { "Left Line Mux", "Line 1", "LINPUT1" },
  354. { "Left Line Mux", "Line 2", "LINPUT2" },
  355. { "Left Line Mux", "PGA", "Left PGA Mux" },
  356. { "Left Line Mux", "Differential", "Differential Mux" },
  357. { "Right Line Mux", "Line 1", "RINPUT1" },
  358. { "Right Line Mux", "Line 2", "RINPUT2" },
  359. { "Right Line Mux", "PGA", "Right PGA Mux" },
  360. { "Right Line Mux", "Differential", "Differential Mux" },
  361. { "Left Mixer", "Playback Switch", "Left DAC" },
  362. { "Left Mixer", "Left Bypass Switch", "Left Line Mux" },
  363. { "Left Mixer", "Right Playback Switch", "Right DAC" },
  364. { "Left Mixer", "Right Bypass Switch", "Right Line Mux" },
  365. { "Right Mixer", "Left Playback Switch", "Left DAC" },
  366. { "Right Mixer", "Left Bypass Switch", "Left Line Mux" },
  367. { "Right Mixer", "Playback Switch", "Right DAC" },
  368. { "Right Mixer", "Right Bypass Switch", "Right Line Mux" },
  369. { "Left Out 1", NULL, "Left Mixer" },
  370. { "LOUT1", NULL, "Left Out 1" },
  371. { "Right Out 1", NULL, "Right Mixer" },
  372. { "ROUT1", NULL, "Right Out 1" },
  373. { "Left Out 2", NULL, "Left Mixer" },
  374. { "LOUT2", NULL, "Left Out 2" },
  375. { "Right Out 2", NULL, "Right Mixer" },
  376. { "ROUT2", NULL, "Right Out 2" },
  377. };
  378. struct _coeff_div {
  379. u32 mclk;
  380. u32 rate;
  381. u16 fs;
  382. u8 sr:5;
  383. u8 usb:1;
  384. };
  385. /* codec hifi mclk clock divider coefficients */
  386. static const struct _coeff_div coeff_div[] = {
  387. /* 8k */
  388. {12288000, 8000, 1536, 0x6, 0x0},
  389. {11289600, 8000, 1408, 0x16, 0x0},
  390. {18432000, 8000, 2304, 0x7, 0x0},
  391. {16934400, 8000, 2112, 0x17, 0x0},
  392. {12000000, 8000, 1500, 0x6, 0x1},
  393. /* 11.025k */
  394. {11289600, 11025, 1024, 0x18, 0x0},
  395. {16934400, 11025, 1536, 0x19, 0x0},
  396. {12000000, 11025, 1088, 0x19, 0x1},
  397. /* 16k */
  398. {12288000, 16000, 768, 0xa, 0x0},
  399. {18432000, 16000, 1152, 0xb, 0x0},
  400. {12000000, 16000, 750, 0xa, 0x1},
  401. /* 22.05k */
  402. {11289600, 22050, 512, 0x1a, 0x0},
  403. {16934400, 22050, 768, 0x1b, 0x0},
  404. {12000000, 22050, 544, 0x1b, 0x1},
  405. /* 32k */
  406. {12288000, 32000, 384, 0xc, 0x0},
  407. {18432000, 32000, 576, 0xd, 0x0},
  408. {12000000, 32000, 375, 0xa, 0x1},
  409. /* 44.1k */
  410. {11289600, 44100, 256, 0x10, 0x0},
  411. {16934400, 44100, 384, 0x11, 0x0},
  412. {12000000, 44100, 272, 0x11, 0x1},
  413. /* 48k */
  414. {12288000, 48000, 256, 0x0, 0x0},
  415. {18432000, 48000, 384, 0x1, 0x0},
  416. {12000000, 48000, 250, 0x0, 0x1},
  417. /* 88.2k */
  418. {11289600, 88200, 128, 0x1e, 0x0},
  419. {16934400, 88200, 192, 0x1f, 0x0},
  420. {12000000, 88200, 136, 0x1f, 0x1},
  421. /* 96k */
  422. {12288000, 96000, 128, 0xe, 0x0},
  423. {18432000, 96000, 192, 0xf, 0x0},
  424. {12000000, 96000, 125, 0xe, 0x1},
  425. };
  426. static inline int get_coeff(int mclk, int rate)
  427. {
  428. int i;
  429. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  430. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  431. return i;
  432. }
  433. return -EINVAL;
  434. }
  435. /* The set of rates we can generate from the above for each SYSCLK */
  436. static unsigned int rates_12288[] = {
  437. 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
  438. };
  439. static struct snd_pcm_hw_constraint_list constraints_12288 = {
  440. .count = ARRAY_SIZE(rates_12288),
  441. .list = rates_12288,
  442. };
  443. static unsigned int rates_112896[] = {
  444. 8000, 11025, 22050, 44100,
  445. };
  446. static struct snd_pcm_hw_constraint_list constraints_112896 = {
  447. .count = ARRAY_SIZE(rates_112896),
  448. .list = rates_112896,
  449. };
  450. static unsigned int rates_12[] = {
  451. 8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000,
  452. 48000, 88235, 96000,
  453. };
  454. static struct snd_pcm_hw_constraint_list constraints_12 = {
  455. .count = ARRAY_SIZE(rates_12),
  456. .list = rates_12,
  457. };
  458. /*
  459. * Note that this should be called from init rather than from hw_params.
  460. */
  461. static int wm8988_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  462. int clk_id, unsigned int freq, int dir)
  463. {
  464. struct snd_soc_codec *codec = codec_dai->codec;
  465. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  466. switch (freq) {
  467. case 11289600:
  468. case 18432000:
  469. case 22579200:
  470. case 36864000:
  471. wm8988->sysclk_constraints = &constraints_112896;
  472. wm8988->sysclk = freq;
  473. return 0;
  474. case 12288000:
  475. case 16934400:
  476. case 24576000:
  477. case 33868800:
  478. wm8988->sysclk_constraints = &constraints_12288;
  479. wm8988->sysclk = freq;
  480. return 0;
  481. case 12000000:
  482. case 24000000:
  483. wm8988->sysclk_constraints = &constraints_12;
  484. wm8988->sysclk = freq;
  485. return 0;
  486. }
  487. return -EINVAL;
  488. }
  489. static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai,
  490. unsigned int fmt)
  491. {
  492. struct snd_soc_codec *codec = codec_dai->codec;
  493. u16 iface = 0;
  494. /* set master/slave audio interface */
  495. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  496. case SND_SOC_DAIFMT_CBM_CFM:
  497. iface = 0x0040;
  498. break;
  499. case SND_SOC_DAIFMT_CBS_CFS:
  500. break;
  501. default:
  502. return -EINVAL;
  503. }
  504. /* interface format */
  505. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  506. case SND_SOC_DAIFMT_I2S:
  507. iface |= 0x0002;
  508. break;
  509. case SND_SOC_DAIFMT_RIGHT_J:
  510. break;
  511. case SND_SOC_DAIFMT_LEFT_J:
  512. iface |= 0x0001;
  513. break;
  514. case SND_SOC_DAIFMT_DSP_A:
  515. iface |= 0x0003;
  516. break;
  517. case SND_SOC_DAIFMT_DSP_B:
  518. iface |= 0x0013;
  519. break;
  520. default:
  521. return -EINVAL;
  522. }
  523. /* clock inversion */
  524. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  525. case SND_SOC_DAIFMT_NB_NF:
  526. break;
  527. case SND_SOC_DAIFMT_IB_IF:
  528. iface |= 0x0090;
  529. break;
  530. case SND_SOC_DAIFMT_IB_NF:
  531. iface |= 0x0080;
  532. break;
  533. case SND_SOC_DAIFMT_NB_IF:
  534. iface |= 0x0010;
  535. break;
  536. default:
  537. return -EINVAL;
  538. }
  539. snd_soc_write(codec, WM8988_IFACE, iface);
  540. return 0;
  541. }
  542. static int wm8988_pcm_startup(struct snd_pcm_substream *substream,
  543. struct snd_soc_dai *dai)
  544. {
  545. struct snd_soc_codec *codec = dai->codec;
  546. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  547. /* The set of sample rates that can be supported depends on the
  548. * MCLK supplied to the CODEC - enforce this.
  549. */
  550. if (!wm8988->sysclk) {
  551. dev_err(codec->dev,
  552. "No MCLK configured, call set_sysclk() on init\n");
  553. return -EINVAL;
  554. }
  555. snd_pcm_hw_constraint_list(substream->runtime, 0,
  556. SNDRV_PCM_HW_PARAM_RATE,
  557. wm8988->sysclk_constraints);
  558. return 0;
  559. }
  560. static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream,
  561. struct snd_pcm_hw_params *params,
  562. struct snd_soc_dai *dai)
  563. {
  564. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  565. struct snd_soc_codec *codec = rtd->codec;
  566. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  567. u16 iface = snd_soc_read(codec, WM8988_IFACE) & 0x1f3;
  568. u16 srate = snd_soc_read(codec, WM8988_SRATE) & 0x180;
  569. int coeff;
  570. coeff = get_coeff(wm8988->sysclk, params_rate(params));
  571. if (coeff < 0) {
  572. coeff = get_coeff(wm8988->sysclk / 2, params_rate(params));
  573. srate |= 0x40;
  574. }
  575. if (coeff < 0) {
  576. dev_err(codec->dev,
  577. "Unable to configure sample rate %dHz with %dHz MCLK\n",
  578. params_rate(params), wm8988->sysclk);
  579. return coeff;
  580. }
  581. /* bit size */
  582. switch (params_format(params)) {
  583. case SNDRV_PCM_FORMAT_S16_LE:
  584. break;
  585. case SNDRV_PCM_FORMAT_S20_3LE:
  586. iface |= 0x0004;
  587. break;
  588. case SNDRV_PCM_FORMAT_S24_LE:
  589. iface |= 0x0008;
  590. break;
  591. case SNDRV_PCM_FORMAT_S32_LE:
  592. iface |= 0x000c;
  593. break;
  594. }
  595. /* set iface & srate */
  596. snd_soc_write(codec, WM8988_IFACE, iface);
  597. if (coeff >= 0)
  598. snd_soc_write(codec, WM8988_SRATE, srate |
  599. (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
  600. return 0;
  601. }
  602. static int wm8988_mute(struct snd_soc_dai *dai, int mute)
  603. {
  604. struct snd_soc_codec *codec = dai->codec;
  605. u16 mute_reg = snd_soc_read(codec, WM8988_ADCDAC) & 0xfff7;
  606. if (mute)
  607. snd_soc_write(codec, WM8988_ADCDAC, mute_reg | 0x8);
  608. else
  609. snd_soc_write(codec, WM8988_ADCDAC, mute_reg);
  610. return 0;
  611. }
  612. static int wm8988_set_bias_level(struct snd_soc_codec *codec,
  613. enum snd_soc_bias_level level)
  614. {
  615. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  616. u16 pwr_reg = snd_soc_read(codec, WM8988_PWR1) & ~0x1c1;
  617. switch (level) {
  618. case SND_SOC_BIAS_ON:
  619. break;
  620. case SND_SOC_BIAS_PREPARE:
  621. /* VREF, VMID=2x50k, digital enabled */
  622. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x00c0);
  623. break;
  624. case SND_SOC_BIAS_STANDBY:
  625. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  626. regcache_sync(wm8988->regmap);
  627. /* VREF, VMID=2x5k */
  628. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x1c1);
  629. /* Charge caps */
  630. msleep(100);
  631. }
  632. /* VREF, VMID=2*500k, digital stopped */
  633. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x0141);
  634. break;
  635. case SND_SOC_BIAS_OFF:
  636. snd_soc_write(codec, WM8988_PWR1, 0x0000);
  637. break;
  638. }
  639. codec->dapm.bias_level = level;
  640. return 0;
  641. }
  642. #define WM8988_RATES SNDRV_PCM_RATE_8000_96000
  643. #define WM8988_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  644. SNDRV_PCM_FMTBIT_S24_LE)
  645. static const struct snd_soc_dai_ops wm8988_ops = {
  646. .startup = wm8988_pcm_startup,
  647. .hw_params = wm8988_pcm_hw_params,
  648. .set_fmt = wm8988_set_dai_fmt,
  649. .set_sysclk = wm8988_set_dai_sysclk,
  650. .digital_mute = wm8988_mute,
  651. };
  652. static struct snd_soc_dai_driver wm8988_dai = {
  653. .name = "wm8988-hifi",
  654. .playback = {
  655. .stream_name = "Playback",
  656. .channels_min = 1,
  657. .channels_max = 2,
  658. .rates = WM8988_RATES,
  659. .formats = WM8988_FORMATS,
  660. },
  661. .capture = {
  662. .stream_name = "Capture",
  663. .channels_min = 1,
  664. .channels_max = 2,
  665. .rates = WM8988_RATES,
  666. .formats = WM8988_FORMATS,
  667. },
  668. .ops = &wm8988_ops,
  669. .symmetric_rates = 1,
  670. };
  671. static int wm8988_suspend(struct snd_soc_codec *codec)
  672. {
  673. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  674. wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF);
  675. regcache_mark_dirty(wm8988->regmap);
  676. return 0;
  677. }
  678. static int wm8988_resume(struct snd_soc_codec *codec)
  679. {
  680. wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  681. return 0;
  682. }
  683. static int wm8988_probe(struct snd_soc_codec *codec)
  684. {
  685. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  686. int ret = 0;
  687. codec->control_data = wm8988->regmap;
  688. ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
  689. if (ret < 0) {
  690. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  691. return ret;
  692. }
  693. ret = wm8988_reset(codec);
  694. if (ret < 0) {
  695. dev_err(codec->dev, "Failed to issue reset\n");
  696. return ret;
  697. }
  698. /* set the update bits (we always update left then right) */
  699. snd_soc_update_bits(codec, WM8988_RADC, 0x0100, 0x0100);
  700. snd_soc_update_bits(codec, WM8988_RDAC, 0x0100, 0x0100);
  701. snd_soc_update_bits(codec, WM8988_ROUT1V, 0x0100, 0x0100);
  702. snd_soc_update_bits(codec, WM8988_ROUT2V, 0x0100, 0x0100);
  703. snd_soc_update_bits(codec, WM8988_RINVOL, 0x0100, 0x0100);
  704. wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  705. return 0;
  706. }
  707. static int wm8988_remove(struct snd_soc_codec *codec)
  708. {
  709. wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF);
  710. return 0;
  711. }
  712. static struct snd_soc_codec_driver soc_codec_dev_wm8988 = {
  713. .probe = wm8988_probe,
  714. .remove = wm8988_remove,
  715. .suspend = wm8988_suspend,
  716. .resume = wm8988_resume,
  717. .set_bias_level = wm8988_set_bias_level,
  718. .controls = wm8988_snd_controls,
  719. .num_controls = ARRAY_SIZE(wm8988_snd_controls),
  720. .dapm_widgets = wm8988_dapm_widgets,
  721. .num_dapm_widgets = ARRAY_SIZE(wm8988_dapm_widgets),
  722. .dapm_routes = wm8988_dapm_routes,
  723. .num_dapm_routes = ARRAY_SIZE(wm8988_dapm_routes),
  724. };
  725. static struct regmap_config wm8988_regmap = {
  726. .reg_bits = 7,
  727. .val_bits = 9,
  728. .max_register = WM8988_LPPB,
  729. .writeable_reg = wm8988_writeable,
  730. .cache_type = REGCACHE_RBTREE,
  731. .reg_defaults = wm8988_reg_defaults,
  732. .num_reg_defaults = ARRAY_SIZE(wm8988_reg_defaults),
  733. };
  734. #if defined(CONFIG_SPI_MASTER)
  735. static int __devinit wm8988_spi_probe(struct spi_device *spi)
  736. {
  737. struct wm8988_priv *wm8988;
  738. int ret;
  739. wm8988 = devm_kzalloc(&spi->dev, sizeof(struct wm8988_priv),
  740. GFP_KERNEL);
  741. if (wm8988 == NULL)
  742. return -ENOMEM;
  743. wm8988->regmap = regmap_init_spi(spi, &wm8988_regmap);
  744. if (IS_ERR(wm8988->regmap)) {
  745. ret = PTR_ERR(wm8988->regmap);
  746. dev_err(&spi->dev, "Failed to init regmap: %d\n", ret);
  747. return ret;
  748. }
  749. spi_set_drvdata(spi, wm8988);
  750. ret = snd_soc_register_codec(&spi->dev,
  751. &soc_codec_dev_wm8988, &wm8988_dai, 1);
  752. if (ret != 0)
  753. regmap_exit(wm8988->regmap);
  754. return ret;
  755. }
  756. static int __devexit wm8988_spi_remove(struct spi_device *spi)
  757. {
  758. struct wm8988_priv *wm8988 = spi_get_drvdata(spi);
  759. snd_soc_unregister_codec(&spi->dev);
  760. regmap_exit(wm8988->regmap);
  761. return 0;
  762. }
  763. static struct spi_driver wm8988_spi_driver = {
  764. .driver = {
  765. .name = "wm8988",
  766. .owner = THIS_MODULE,
  767. },
  768. .probe = wm8988_spi_probe,
  769. .remove = __devexit_p(wm8988_spi_remove),
  770. };
  771. #endif /* CONFIG_SPI_MASTER */
  772. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  773. static __devinit int wm8988_i2c_probe(struct i2c_client *i2c,
  774. const struct i2c_device_id *id)
  775. {
  776. struct wm8988_priv *wm8988;
  777. int ret;
  778. wm8988 = devm_kzalloc(&i2c->dev, sizeof(struct wm8988_priv),
  779. GFP_KERNEL);
  780. if (wm8988 == NULL)
  781. return -ENOMEM;
  782. i2c_set_clientdata(i2c, wm8988);
  783. wm8988->regmap = regmap_init_i2c(i2c, &wm8988_regmap);
  784. if (IS_ERR(wm8988->regmap)) {
  785. ret = PTR_ERR(wm8988->regmap);
  786. dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret);
  787. return ret;
  788. }
  789. ret = snd_soc_register_codec(&i2c->dev,
  790. &soc_codec_dev_wm8988, &wm8988_dai, 1);
  791. if (ret != 0)
  792. regmap_exit(wm8988->regmap);
  793. return ret;
  794. }
  795. static __devexit int wm8988_i2c_remove(struct i2c_client *client)
  796. {
  797. struct wm8988_priv *wm8988 = i2c_get_clientdata(client);
  798. snd_soc_unregister_codec(&client->dev);
  799. regmap_exit(wm8988->regmap);
  800. return 0;
  801. }
  802. static const struct i2c_device_id wm8988_i2c_id[] = {
  803. { "wm8988", 0 },
  804. { }
  805. };
  806. MODULE_DEVICE_TABLE(i2c, wm8988_i2c_id);
  807. static struct i2c_driver wm8988_i2c_driver = {
  808. .driver = {
  809. .name = "wm8988",
  810. .owner = THIS_MODULE,
  811. },
  812. .probe = wm8988_i2c_probe,
  813. .remove = __devexit_p(wm8988_i2c_remove),
  814. .id_table = wm8988_i2c_id,
  815. };
  816. #endif
  817. static int __init wm8988_modinit(void)
  818. {
  819. int ret = 0;
  820. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  821. ret = i2c_add_driver(&wm8988_i2c_driver);
  822. if (ret != 0) {
  823. printk(KERN_ERR "Failed to register WM8988 I2C driver: %d\n",
  824. ret);
  825. }
  826. #endif
  827. #if defined(CONFIG_SPI_MASTER)
  828. ret = spi_register_driver(&wm8988_spi_driver);
  829. if (ret != 0) {
  830. printk(KERN_ERR "Failed to register WM8988 SPI driver: %d\n",
  831. ret);
  832. }
  833. #endif
  834. return ret;
  835. }
  836. module_init(wm8988_modinit);
  837. static void __exit wm8988_exit(void)
  838. {
  839. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  840. i2c_del_driver(&wm8988_i2c_driver);
  841. #endif
  842. #if defined(CONFIG_SPI_MASTER)
  843. spi_unregister_driver(&wm8988_spi_driver);
  844. #endif
  845. }
  846. module_exit(wm8988_exit);
  847. MODULE_DESCRIPTION("ASoC WM8988 driver");
  848. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  849. MODULE_LICENSE("GPL");