wm8960.c 28 KB

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  1. /*
  2. * wm8960.c -- WM8960 ALSA SoC Audio driver
  3. *
  4. * Author: Liam Girdwood
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/init.h>
  13. #include <linux/delay.h>
  14. #include <linux/pm.h>
  15. #include <linux/i2c.h>
  16. #include <linux/slab.h>
  17. #include <sound/core.h>
  18. #include <sound/pcm.h>
  19. #include <sound/pcm_params.h>
  20. #include <sound/soc.h>
  21. #include <sound/initval.h>
  22. #include <sound/tlv.h>
  23. #include <sound/wm8960.h>
  24. #include "wm8960.h"
  25. /* R25 - Power 1 */
  26. #define WM8960_VMID_MASK 0x180
  27. #define WM8960_VREF 0x40
  28. /* R26 - Power 2 */
  29. #define WM8960_PWR2_LOUT1 0x40
  30. #define WM8960_PWR2_ROUT1 0x20
  31. #define WM8960_PWR2_OUT3 0x02
  32. /* R28 - Anti-pop 1 */
  33. #define WM8960_POBCTRL 0x80
  34. #define WM8960_BUFDCOPEN 0x10
  35. #define WM8960_BUFIOEN 0x08
  36. #define WM8960_SOFT_ST 0x04
  37. #define WM8960_HPSTBY 0x01
  38. /* R29 - Anti-pop 2 */
  39. #define WM8960_DISOP 0x40
  40. #define WM8960_DRES_MASK 0x30
  41. /*
  42. * wm8960 register cache
  43. * We can't read the WM8960 register space when we are
  44. * using 2 wire for device control, so we cache them instead.
  45. */
  46. static const u16 wm8960_reg[WM8960_CACHEREGNUM] = {
  47. 0x0097, 0x0097, 0x0000, 0x0000,
  48. 0x0000, 0x0008, 0x0000, 0x000a,
  49. 0x01c0, 0x0000, 0x00ff, 0x00ff,
  50. 0x0000, 0x0000, 0x0000, 0x0000,
  51. 0x0000, 0x007b, 0x0100, 0x0032,
  52. 0x0000, 0x00c3, 0x00c3, 0x01c0,
  53. 0x0000, 0x0000, 0x0000, 0x0000,
  54. 0x0000, 0x0000, 0x0000, 0x0000,
  55. 0x0100, 0x0100, 0x0050, 0x0050,
  56. 0x0050, 0x0050, 0x0000, 0x0000,
  57. 0x0000, 0x0000, 0x0040, 0x0000,
  58. 0x0000, 0x0050, 0x0050, 0x0000,
  59. 0x0002, 0x0037, 0x004d, 0x0080,
  60. 0x0008, 0x0031, 0x0026, 0x00e9,
  61. };
  62. struct wm8960_priv {
  63. enum snd_soc_control_type control_type;
  64. int (*set_bias_level)(struct snd_soc_codec *,
  65. enum snd_soc_bias_level level);
  66. struct snd_soc_dapm_widget *lout1;
  67. struct snd_soc_dapm_widget *rout1;
  68. struct snd_soc_dapm_widget *out3;
  69. bool deemph;
  70. int playback_fs;
  71. };
  72. #define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
  73. /* enumerated controls */
  74. static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
  75. "Right Inverted", "Stereo Inversion"};
  76. static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
  77. static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
  78. static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
  79. static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
  80. static const struct soc_enum wm8960_enum[] = {
  81. SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
  82. SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
  83. SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
  84. SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
  85. SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
  86. SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
  87. };
  88. static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
  89. static int wm8960_set_deemph(struct snd_soc_codec *codec)
  90. {
  91. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  92. int val, i, best;
  93. /* If we're using deemphasis select the nearest available sample
  94. * rate.
  95. */
  96. if (wm8960->deemph) {
  97. best = 1;
  98. for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
  99. if (abs(deemph_settings[i] - wm8960->playback_fs) <
  100. abs(deemph_settings[best] - wm8960->playback_fs))
  101. best = i;
  102. }
  103. val = best << 1;
  104. } else {
  105. val = 0;
  106. }
  107. dev_dbg(codec->dev, "Set deemphasis %d\n", val);
  108. return snd_soc_update_bits(codec, WM8960_DACCTL1,
  109. 0x6, val);
  110. }
  111. static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
  112. struct snd_ctl_elem_value *ucontrol)
  113. {
  114. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  115. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  116. ucontrol->value.integer.value[0] = wm8960->deemph;
  117. return 0;
  118. }
  119. static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
  120. struct snd_ctl_elem_value *ucontrol)
  121. {
  122. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  123. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  124. int deemph = ucontrol->value.integer.value[0];
  125. if (deemph > 1)
  126. return -EINVAL;
  127. wm8960->deemph = deemph;
  128. return wm8960_set_deemph(codec);
  129. }
  130. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
  131. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
  132. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
  133. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  134. static const struct snd_kcontrol_new wm8960_snd_controls[] = {
  135. SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
  136. 0, 63, 0, adc_tlv),
  137. SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
  138. 6, 1, 0),
  139. SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
  140. 7, 1, 0),
  141. SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
  142. 0, 255, 0, dac_tlv),
  143. SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
  144. 0, 127, 0, out_tlv),
  145. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
  146. 7, 1, 0),
  147. SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
  148. 0, 127, 0, out_tlv),
  149. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
  150. 7, 1, 0),
  151. SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
  152. SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
  153. SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
  154. SOC_ENUM("ADC Polarity", wm8960_enum[0]),
  155. SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
  156. SOC_ENUM("DAC Polarity", wm8960_enum[1]),
  157. SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
  158. wm8960_get_deemph, wm8960_put_deemph),
  159. SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
  160. SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
  161. SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
  162. SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
  163. SOC_ENUM("ALC Function", wm8960_enum[4]),
  164. SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
  165. SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
  166. SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
  167. SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
  168. SOC_ENUM("ALC Mode", wm8960_enum[5]),
  169. SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
  170. SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
  171. SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
  172. SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
  173. SOC_DOUBLE_R("ADC PCM Capture Volume", WM8960_LINPATH, WM8960_RINPATH,
  174. 0, 127, 0),
  175. SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
  176. WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
  177. SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
  178. WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
  179. SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
  180. WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
  181. SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
  182. WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
  183. };
  184. static const struct snd_kcontrol_new wm8960_lin_boost[] = {
  185. SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
  186. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
  187. SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
  188. };
  189. static const struct snd_kcontrol_new wm8960_lin[] = {
  190. SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
  191. };
  192. static const struct snd_kcontrol_new wm8960_rin_boost[] = {
  193. SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
  194. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
  195. SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
  196. };
  197. static const struct snd_kcontrol_new wm8960_rin[] = {
  198. SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
  199. };
  200. static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
  201. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
  202. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
  203. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
  204. };
  205. static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
  206. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
  207. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
  208. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
  209. };
  210. static const struct snd_kcontrol_new wm8960_mono_out[] = {
  211. SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
  212. SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
  213. };
  214. static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
  215. SND_SOC_DAPM_INPUT("LINPUT1"),
  216. SND_SOC_DAPM_INPUT("RINPUT1"),
  217. SND_SOC_DAPM_INPUT("LINPUT2"),
  218. SND_SOC_DAPM_INPUT("RINPUT2"),
  219. SND_SOC_DAPM_INPUT("LINPUT3"),
  220. SND_SOC_DAPM_INPUT("RINPUT3"),
  221. SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
  222. SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
  223. wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
  224. SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
  225. wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
  226. SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
  227. wm8960_lin, ARRAY_SIZE(wm8960_lin)),
  228. SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
  229. wm8960_rin, ARRAY_SIZE(wm8960_rin)),
  230. SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER2, 3, 0),
  231. SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER2, 2, 0),
  232. SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
  233. SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
  234. SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
  235. &wm8960_loutput_mixer[0],
  236. ARRAY_SIZE(wm8960_loutput_mixer)),
  237. SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
  238. &wm8960_routput_mixer[0],
  239. ARRAY_SIZE(wm8960_routput_mixer)),
  240. SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
  241. SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
  242. SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
  243. SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
  244. SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
  245. SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
  246. SND_SOC_DAPM_OUTPUT("SPK_LP"),
  247. SND_SOC_DAPM_OUTPUT("SPK_LN"),
  248. SND_SOC_DAPM_OUTPUT("HP_L"),
  249. SND_SOC_DAPM_OUTPUT("HP_R"),
  250. SND_SOC_DAPM_OUTPUT("SPK_RP"),
  251. SND_SOC_DAPM_OUTPUT("SPK_RN"),
  252. SND_SOC_DAPM_OUTPUT("OUT3"),
  253. };
  254. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
  255. SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
  256. &wm8960_mono_out[0],
  257. ARRAY_SIZE(wm8960_mono_out)),
  258. };
  259. /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
  260. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
  261. SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
  262. };
  263. static const struct snd_soc_dapm_route audio_paths[] = {
  264. { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
  265. { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
  266. { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
  267. { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
  268. { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
  269. { "Left Input Mixer", NULL, "LINPUT2" },
  270. { "Left Input Mixer", NULL, "LINPUT3" },
  271. { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
  272. { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
  273. { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
  274. { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
  275. { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
  276. { "Right Input Mixer", NULL, "RINPUT2" },
  277. { "Right Input Mixer", NULL, "RINPUT3" },
  278. { "Left ADC", NULL, "Left Input Mixer" },
  279. { "Right ADC", NULL, "Right Input Mixer" },
  280. { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
  281. { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
  282. { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
  283. { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
  284. { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
  285. { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
  286. { "LOUT1 PGA", NULL, "Left Output Mixer" },
  287. { "ROUT1 PGA", NULL, "Right Output Mixer" },
  288. { "HP_L", NULL, "LOUT1 PGA" },
  289. { "HP_R", NULL, "ROUT1 PGA" },
  290. { "Left Speaker PGA", NULL, "Left Output Mixer" },
  291. { "Right Speaker PGA", NULL, "Right Output Mixer" },
  292. { "Left Speaker Output", NULL, "Left Speaker PGA" },
  293. { "Right Speaker Output", NULL, "Right Speaker PGA" },
  294. { "SPK_LN", NULL, "Left Speaker Output" },
  295. { "SPK_LP", NULL, "Left Speaker Output" },
  296. { "SPK_RN", NULL, "Right Speaker Output" },
  297. { "SPK_RP", NULL, "Right Speaker Output" },
  298. };
  299. static const struct snd_soc_dapm_route audio_paths_out3[] = {
  300. { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
  301. { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
  302. { "OUT3", NULL, "Mono Output Mixer", }
  303. };
  304. static const struct snd_soc_dapm_route audio_paths_capless[] = {
  305. { "HP_L", NULL, "OUT3 VMID" },
  306. { "HP_R", NULL, "OUT3 VMID" },
  307. { "OUT3 VMID", NULL, "Left Output Mixer" },
  308. { "OUT3 VMID", NULL, "Right Output Mixer" },
  309. };
  310. static int wm8960_add_widgets(struct snd_soc_codec *codec)
  311. {
  312. struct wm8960_data *pdata = codec->dev->platform_data;
  313. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  314. struct snd_soc_dapm_context *dapm = &codec->dapm;
  315. struct snd_soc_dapm_widget *w;
  316. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
  317. ARRAY_SIZE(wm8960_dapm_widgets));
  318. snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
  319. /* In capless mode OUT3 is used to provide VMID for the
  320. * headphone outputs, otherwise it is used as a mono mixer.
  321. */
  322. if (pdata && pdata->capless) {
  323. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
  324. ARRAY_SIZE(wm8960_dapm_widgets_capless));
  325. snd_soc_dapm_add_routes(dapm, audio_paths_capless,
  326. ARRAY_SIZE(audio_paths_capless));
  327. } else {
  328. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
  329. ARRAY_SIZE(wm8960_dapm_widgets_out3));
  330. snd_soc_dapm_add_routes(dapm, audio_paths_out3,
  331. ARRAY_SIZE(audio_paths_out3));
  332. }
  333. /* We need to power up the headphone output stage out of
  334. * sequence for capless mode. To save scanning the widget
  335. * list each time to find the desired power state do so now
  336. * and save the result.
  337. */
  338. list_for_each_entry(w, &codec->card->widgets, list) {
  339. if (w->dapm != &codec->dapm)
  340. continue;
  341. if (strcmp(w->name, "LOUT1 PGA") == 0)
  342. wm8960->lout1 = w;
  343. if (strcmp(w->name, "ROUT1 PGA") == 0)
  344. wm8960->rout1 = w;
  345. if (strcmp(w->name, "OUT3 VMID") == 0)
  346. wm8960->out3 = w;
  347. }
  348. return 0;
  349. }
  350. static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
  351. unsigned int fmt)
  352. {
  353. struct snd_soc_codec *codec = codec_dai->codec;
  354. u16 iface = 0;
  355. /* set master/slave audio interface */
  356. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  357. case SND_SOC_DAIFMT_CBM_CFM:
  358. iface |= 0x0040;
  359. break;
  360. case SND_SOC_DAIFMT_CBS_CFS:
  361. break;
  362. default:
  363. return -EINVAL;
  364. }
  365. /* interface format */
  366. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  367. case SND_SOC_DAIFMT_I2S:
  368. iface |= 0x0002;
  369. break;
  370. case SND_SOC_DAIFMT_RIGHT_J:
  371. break;
  372. case SND_SOC_DAIFMT_LEFT_J:
  373. iface |= 0x0001;
  374. break;
  375. case SND_SOC_DAIFMT_DSP_A:
  376. iface |= 0x0003;
  377. break;
  378. case SND_SOC_DAIFMT_DSP_B:
  379. iface |= 0x0013;
  380. break;
  381. default:
  382. return -EINVAL;
  383. }
  384. /* clock inversion */
  385. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  386. case SND_SOC_DAIFMT_NB_NF:
  387. break;
  388. case SND_SOC_DAIFMT_IB_IF:
  389. iface |= 0x0090;
  390. break;
  391. case SND_SOC_DAIFMT_IB_NF:
  392. iface |= 0x0080;
  393. break;
  394. case SND_SOC_DAIFMT_NB_IF:
  395. iface |= 0x0010;
  396. break;
  397. default:
  398. return -EINVAL;
  399. }
  400. /* set iface */
  401. snd_soc_write(codec, WM8960_IFACE1, iface);
  402. return 0;
  403. }
  404. static struct {
  405. int rate;
  406. unsigned int val;
  407. } alc_rates[] = {
  408. { 48000, 0 },
  409. { 44100, 0 },
  410. { 32000, 1 },
  411. { 22050, 2 },
  412. { 24000, 2 },
  413. { 16000, 3 },
  414. { 11025, 4 },
  415. { 12000, 4 },
  416. { 8000, 5 },
  417. };
  418. static int wm8960_hw_params(struct snd_pcm_substream *substream,
  419. struct snd_pcm_hw_params *params,
  420. struct snd_soc_dai *dai)
  421. {
  422. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  423. struct snd_soc_codec *codec = rtd->codec;
  424. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  425. u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
  426. int i;
  427. /* bit size */
  428. switch (params_format(params)) {
  429. case SNDRV_PCM_FORMAT_S16_LE:
  430. break;
  431. case SNDRV_PCM_FORMAT_S20_3LE:
  432. iface |= 0x0004;
  433. break;
  434. case SNDRV_PCM_FORMAT_S24_LE:
  435. iface |= 0x0008;
  436. break;
  437. }
  438. /* Update filters for the new rate */
  439. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  440. wm8960->playback_fs = params_rate(params);
  441. wm8960_set_deemph(codec);
  442. } else {
  443. for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
  444. if (alc_rates[i].rate == params_rate(params))
  445. snd_soc_update_bits(codec,
  446. WM8960_ADDCTL3, 0x7,
  447. alc_rates[i].val);
  448. }
  449. /* set iface */
  450. snd_soc_write(codec, WM8960_IFACE1, iface);
  451. return 0;
  452. }
  453. static int wm8960_mute(struct snd_soc_dai *dai, int mute)
  454. {
  455. struct snd_soc_codec *codec = dai->codec;
  456. if (mute)
  457. snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
  458. else
  459. snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
  460. return 0;
  461. }
  462. static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
  463. enum snd_soc_bias_level level)
  464. {
  465. switch (level) {
  466. case SND_SOC_BIAS_ON:
  467. break;
  468. case SND_SOC_BIAS_PREPARE:
  469. /* Set VMID to 2x50k */
  470. snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
  471. break;
  472. case SND_SOC_BIAS_STANDBY:
  473. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  474. snd_soc_cache_sync(codec);
  475. /* Enable anti-pop features */
  476. snd_soc_write(codec, WM8960_APOP1,
  477. WM8960_POBCTRL | WM8960_SOFT_ST |
  478. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  479. /* Enable & ramp VMID at 2x50k */
  480. snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
  481. msleep(100);
  482. /* Enable VREF */
  483. snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
  484. WM8960_VREF);
  485. /* Disable anti-pop features */
  486. snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
  487. }
  488. /* Set VMID to 2x250k */
  489. snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
  490. break;
  491. case SND_SOC_BIAS_OFF:
  492. /* Enable anti-pop features */
  493. snd_soc_write(codec, WM8960_APOP1,
  494. WM8960_POBCTRL | WM8960_SOFT_ST |
  495. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  496. /* Disable VMID and VREF, let them discharge */
  497. snd_soc_write(codec, WM8960_POWER1, 0);
  498. msleep(600);
  499. break;
  500. }
  501. codec->dapm.bias_level = level;
  502. return 0;
  503. }
  504. static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
  505. enum snd_soc_bias_level level)
  506. {
  507. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  508. int reg;
  509. switch (level) {
  510. case SND_SOC_BIAS_ON:
  511. break;
  512. case SND_SOC_BIAS_PREPARE:
  513. switch (codec->dapm.bias_level) {
  514. case SND_SOC_BIAS_STANDBY:
  515. /* Enable anti pop mode */
  516. snd_soc_update_bits(codec, WM8960_APOP1,
  517. WM8960_POBCTRL | WM8960_SOFT_ST |
  518. WM8960_BUFDCOPEN,
  519. WM8960_POBCTRL | WM8960_SOFT_ST |
  520. WM8960_BUFDCOPEN);
  521. /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
  522. reg = 0;
  523. if (wm8960->lout1 && wm8960->lout1->power)
  524. reg |= WM8960_PWR2_LOUT1;
  525. if (wm8960->rout1 && wm8960->rout1->power)
  526. reg |= WM8960_PWR2_ROUT1;
  527. if (wm8960->out3 && wm8960->out3->power)
  528. reg |= WM8960_PWR2_OUT3;
  529. snd_soc_update_bits(codec, WM8960_POWER2,
  530. WM8960_PWR2_LOUT1 |
  531. WM8960_PWR2_ROUT1 |
  532. WM8960_PWR2_OUT3, reg);
  533. /* Enable VMID at 2*50k */
  534. snd_soc_update_bits(codec, WM8960_POWER1,
  535. WM8960_VMID_MASK, 0x80);
  536. /* Ramp */
  537. msleep(100);
  538. /* Enable VREF */
  539. snd_soc_update_bits(codec, WM8960_POWER1,
  540. WM8960_VREF, WM8960_VREF);
  541. msleep(100);
  542. break;
  543. case SND_SOC_BIAS_ON:
  544. /* Enable anti-pop mode */
  545. snd_soc_update_bits(codec, WM8960_APOP1,
  546. WM8960_POBCTRL | WM8960_SOFT_ST |
  547. WM8960_BUFDCOPEN,
  548. WM8960_POBCTRL | WM8960_SOFT_ST |
  549. WM8960_BUFDCOPEN);
  550. /* Disable VMID and VREF */
  551. snd_soc_update_bits(codec, WM8960_POWER1,
  552. WM8960_VREF | WM8960_VMID_MASK, 0);
  553. break;
  554. case SND_SOC_BIAS_OFF:
  555. snd_soc_cache_sync(codec);
  556. break;
  557. default:
  558. break;
  559. }
  560. break;
  561. case SND_SOC_BIAS_STANDBY:
  562. switch (codec->dapm.bias_level) {
  563. case SND_SOC_BIAS_PREPARE:
  564. /* Disable HP discharge */
  565. snd_soc_update_bits(codec, WM8960_APOP2,
  566. WM8960_DISOP | WM8960_DRES_MASK,
  567. 0);
  568. /* Disable anti-pop features */
  569. snd_soc_update_bits(codec, WM8960_APOP1,
  570. WM8960_POBCTRL | WM8960_SOFT_ST |
  571. WM8960_BUFDCOPEN,
  572. WM8960_POBCTRL | WM8960_SOFT_ST |
  573. WM8960_BUFDCOPEN);
  574. break;
  575. default:
  576. break;
  577. }
  578. break;
  579. case SND_SOC_BIAS_OFF:
  580. break;
  581. }
  582. codec->dapm.bias_level = level;
  583. return 0;
  584. }
  585. /* PLL divisors */
  586. struct _pll_div {
  587. u32 pre_div:1;
  588. u32 n:4;
  589. u32 k:24;
  590. };
  591. /* The size in bits of the pll divide multiplied by 10
  592. * to allow rounding later */
  593. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  594. static int pll_factors(unsigned int source, unsigned int target,
  595. struct _pll_div *pll_div)
  596. {
  597. unsigned long long Kpart;
  598. unsigned int K, Ndiv, Nmod;
  599. pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
  600. /* Scale up target to PLL operating frequency */
  601. target *= 4;
  602. Ndiv = target / source;
  603. if (Ndiv < 6) {
  604. source >>= 1;
  605. pll_div->pre_div = 1;
  606. Ndiv = target / source;
  607. } else
  608. pll_div->pre_div = 0;
  609. if ((Ndiv < 6) || (Ndiv > 12)) {
  610. pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
  611. return -EINVAL;
  612. }
  613. pll_div->n = Ndiv;
  614. Nmod = target % source;
  615. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  616. do_div(Kpart, source);
  617. K = Kpart & 0xFFFFFFFF;
  618. /* Check if we need to round */
  619. if ((K % 10) >= 5)
  620. K += 5;
  621. /* Move down to proper range now rounding is done */
  622. K /= 10;
  623. pll_div->k = K;
  624. pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
  625. pll_div->n, pll_div->k, pll_div->pre_div);
  626. return 0;
  627. }
  628. static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  629. int source, unsigned int freq_in, unsigned int freq_out)
  630. {
  631. struct snd_soc_codec *codec = codec_dai->codec;
  632. u16 reg;
  633. static struct _pll_div pll_div;
  634. int ret;
  635. if (freq_in && freq_out) {
  636. ret = pll_factors(freq_in, freq_out, &pll_div);
  637. if (ret != 0)
  638. return ret;
  639. }
  640. /* Disable the PLL: even if we are changing the frequency the
  641. * PLL needs to be disabled while we do so. */
  642. snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
  643. snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
  644. if (!freq_in || !freq_out)
  645. return 0;
  646. reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
  647. reg |= pll_div.pre_div << 4;
  648. reg |= pll_div.n;
  649. if (pll_div.k) {
  650. reg |= 0x20;
  651. snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
  652. snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
  653. snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff);
  654. }
  655. snd_soc_write(codec, WM8960_PLL1, reg);
  656. /* Turn it on */
  657. snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
  658. msleep(250);
  659. snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
  660. return 0;
  661. }
  662. static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  663. int div_id, int div)
  664. {
  665. struct snd_soc_codec *codec = codec_dai->codec;
  666. u16 reg;
  667. switch (div_id) {
  668. case WM8960_SYSCLKDIV:
  669. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
  670. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  671. break;
  672. case WM8960_DACDIV:
  673. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
  674. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  675. break;
  676. case WM8960_OPCLKDIV:
  677. reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
  678. snd_soc_write(codec, WM8960_PLL1, reg | div);
  679. break;
  680. case WM8960_DCLKDIV:
  681. reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
  682. snd_soc_write(codec, WM8960_CLOCK2, reg | div);
  683. break;
  684. case WM8960_TOCLKSEL:
  685. reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
  686. snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
  687. break;
  688. default:
  689. return -EINVAL;
  690. }
  691. return 0;
  692. }
  693. static int wm8960_set_bias_level(struct snd_soc_codec *codec,
  694. enum snd_soc_bias_level level)
  695. {
  696. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  697. return wm8960->set_bias_level(codec, level);
  698. }
  699. #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
  700. #define WM8960_FORMATS \
  701. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  702. SNDRV_PCM_FMTBIT_S24_LE)
  703. static const struct snd_soc_dai_ops wm8960_dai_ops = {
  704. .hw_params = wm8960_hw_params,
  705. .digital_mute = wm8960_mute,
  706. .set_fmt = wm8960_set_dai_fmt,
  707. .set_clkdiv = wm8960_set_dai_clkdiv,
  708. .set_pll = wm8960_set_dai_pll,
  709. };
  710. static struct snd_soc_dai_driver wm8960_dai = {
  711. .name = "wm8960-hifi",
  712. .playback = {
  713. .stream_name = "Playback",
  714. .channels_min = 1,
  715. .channels_max = 2,
  716. .rates = WM8960_RATES,
  717. .formats = WM8960_FORMATS,},
  718. .capture = {
  719. .stream_name = "Capture",
  720. .channels_min = 1,
  721. .channels_max = 2,
  722. .rates = WM8960_RATES,
  723. .formats = WM8960_FORMATS,},
  724. .ops = &wm8960_dai_ops,
  725. .symmetric_rates = 1,
  726. };
  727. static int wm8960_suspend(struct snd_soc_codec *codec)
  728. {
  729. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  730. wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
  731. return 0;
  732. }
  733. static int wm8960_resume(struct snd_soc_codec *codec)
  734. {
  735. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  736. wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  737. return 0;
  738. }
  739. static int wm8960_probe(struct snd_soc_codec *codec)
  740. {
  741. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  742. struct wm8960_data *pdata = dev_get_platdata(codec->dev);
  743. int ret;
  744. wm8960->set_bias_level = wm8960_set_bias_level_out3;
  745. if (!pdata) {
  746. dev_warn(codec->dev, "No platform data supplied\n");
  747. } else {
  748. if (pdata->dres > WM8960_DRES_MAX) {
  749. dev_err(codec->dev, "Invalid DRES: %d\n", pdata->dres);
  750. pdata->dres = 0;
  751. }
  752. if (pdata->capless)
  753. wm8960->set_bias_level = wm8960_set_bias_level_capless;
  754. }
  755. ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8960->control_type);
  756. if (ret < 0) {
  757. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  758. return ret;
  759. }
  760. ret = wm8960_reset(codec);
  761. if (ret < 0) {
  762. dev_err(codec->dev, "Failed to issue reset\n");
  763. return ret;
  764. }
  765. wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  766. /* Latch the update bits */
  767. snd_soc_update_bits(codec, WM8960_LINVOL, 0x100, 0x100);
  768. snd_soc_update_bits(codec, WM8960_RINVOL, 0x100, 0x100);
  769. snd_soc_update_bits(codec, WM8960_LADC, 0x100, 0x100);
  770. snd_soc_update_bits(codec, WM8960_RADC, 0x100, 0x100);
  771. snd_soc_update_bits(codec, WM8960_LDAC, 0x100, 0x100);
  772. snd_soc_update_bits(codec, WM8960_RDAC, 0x100, 0x100);
  773. snd_soc_update_bits(codec, WM8960_LOUT1, 0x100, 0x100);
  774. snd_soc_update_bits(codec, WM8960_ROUT1, 0x100, 0x100);
  775. snd_soc_update_bits(codec, WM8960_LOUT2, 0x100, 0x100);
  776. snd_soc_update_bits(codec, WM8960_ROUT2, 0x100, 0x100);
  777. snd_soc_add_codec_controls(codec, wm8960_snd_controls,
  778. ARRAY_SIZE(wm8960_snd_controls));
  779. wm8960_add_widgets(codec);
  780. return 0;
  781. }
  782. /* power down chip */
  783. static int wm8960_remove(struct snd_soc_codec *codec)
  784. {
  785. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  786. wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
  787. return 0;
  788. }
  789. static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
  790. .probe = wm8960_probe,
  791. .remove = wm8960_remove,
  792. .suspend = wm8960_suspend,
  793. .resume = wm8960_resume,
  794. .set_bias_level = wm8960_set_bias_level,
  795. .reg_cache_size = ARRAY_SIZE(wm8960_reg),
  796. .reg_word_size = sizeof(u16),
  797. .reg_cache_default = wm8960_reg,
  798. };
  799. static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
  800. const struct i2c_device_id *id)
  801. {
  802. struct wm8960_priv *wm8960;
  803. int ret;
  804. wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
  805. GFP_KERNEL);
  806. if (wm8960 == NULL)
  807. return -ENOMEM;
  808. i2c_set_clientdata(i2c, wm8960);
  809. wm8960->control_type = SND_SOC_I2C;
  810. ret = snd_soc_register_codec(&i2c->dev,
  811. &soc_codec_dev_wm8960, &wm8960_dai, 1);
  812. return ret;
  813. }
  814. static __devexit int wm8960_i2c_remove(struct i2c_client *client)
  815. {
  816. snd_soc_unregister_codec(&client->dev);
  817. return 0;
  818. }
  819. static const struct i2c_device_id wm8960_i2c_id[] = {
  820. { "wm8960", 0 },
  821. { }
  822. };
  823. MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
  824. static struct i2c_driver wm8960_i2c_driver = {
  825. .driver = {
  826. .name = "wm8960",
  827. .owner = THIS_MODULE,
  828. },
  829. .probe = wm8960_i2c_probe,
  830. .remove = __devexit_p(wm8960_i2c_remove),
  831. .id_table = wm8960_i2c_id,
  832. };
  833. static int __init wm8960_modinit(void)
  834. {
  835. int ret = 0;
  836. ret = i2c_add_driver(&wm8960_i2c_driver);
  837. if (ret != 0) {
  838. printk(KERN_ERR "Failed to register WM8960 I2C driver: %d\n",
  839. ret);
  840. }
  841. return ret;
  842. }
  843. module_init(wm8960_modinit);
  844. static void __exit wm8960_exit(void)
  845. {
  846. i2c_del_driver(&wm8960_i2c_driver);
  847. }
  848. module_exit(wm8960_exit);
  849. MODULE_DESCRIPTION("ASoC WM8960 driver");
  850. MODULE_AUTHOR("Liam Girdwood");
  851. MODULE_LICENSE("GPL");