wm8750.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858
  1. /*
  2. * wm8750.c -- WM8750 ALSA SoC audio driver
  3. *
  4. * Copyright 2005 Openedhand Ltd.
  5. *
  6. * Author: Richard Purdie <richard@openedhand.com>
  7. *
  8. * Based on WM8753.c
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/pm.h>
  19. #include <linux/i2c.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/slab.h>
  22. #include <linux/of_device.h>
  23. #include <sound/core.h>
  24. #include <sound/pcm.h>
  25. #include <sound/pcm_params.h>
  26. #include <sound/soc.h>
  27. #include <sound/initval.h>
  28. #include "wm8750.h"
  29. /*
  30. * wm8750 register cache
  31. * We can't read the WM8750 register space when we
  32. * are using 2 wire for device control, so we cache them instead.
  33. */
  34. static const u16 wm8750_reg[] = {
  35. 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
  36. 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
  37. 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
  38. 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
  39. 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
  40. 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
  41. 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
  42. 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
  43. 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
  44. 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
  45. 0x0079, 0x0079, 0x0079, /* 40 */
  46. };
  47. /* codec private data */
  48. struct wm8750_priv {
  49. unsigned int sysclk;
  50. enum snd_soc_control_type control_type;
  51. };
  52. #define wm8750_reset(c) snd_soc_write(c, WM8750_RESET, 0)
  53. /*
  54. * WM8750 Controls
  55. */
  56. static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
  57. static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  58. static const char *wm8750_treble[] = {"8kHz", "4kHz"};
  59. static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
  60. static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
  61. static const char *wm8750_3d_func[] = {"Capture", "Playback"};
  62. static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
  63. static const char *wm8750_ng_type[] = {"Constant PGA Gain",
  64. "Mute ADC Output"};
  65. static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
  66. "Differential"};
  67. static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
  68. "Differential"};
  69. static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
  70. "ROUT1"};
  71. static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
  72. static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
  73. "L + R Invert"};
  74. static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  75. static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
  76. "Mono (Right)", "Digital Mono"};
  77. static const struct soc_enum wm8750_enum[] = {
  78. SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
  79. SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
  80. SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
  81. SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
  82. SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
  83. SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
  84. SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
  85. SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
  86. SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
  87. SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
  88. SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
  89. SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
  90. SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
  91. SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
  92. SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
  93. SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
  94. SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
  95. };
  96. static const struct snd_kcontrol_new wm8750_snd_controls[] = {
  97. SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
  98. SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
  99. SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
  100. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
  101. WM8750_ROUT1V, 7, 1, 0),
  102. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
  103. WM8750_ROUT2V, 7, 1, 0),
  104. SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
  105. SOC_ENUM("Capture Polarity", wm8750_enum[14]),
  106. SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
  107. SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
  108. SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
  109. SOC_ENUM("Bass Boost", wm8750_enum[0]),
  110. SOC_ENUM("Bass Filter", wm8750_enum[1]),
  111. SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
  112. SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
  113. SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
  114. SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
  115. SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
  116. SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
  117. SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
  118. SOC_ENUM("3D Mode", wm8750_enum[5]),
  119. SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
  120. SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
  121. SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
  122. SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
  123. SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
  124. SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
  125. SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
  126. SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
  127. SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
  128. SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
  129. SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
  130. SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
  131. SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
  132. SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
  133. SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
  134. /* Unimplemented */
  135. /* ADCDAC Bit 0 - ADCHPD */
  136. /* ADCDAC Bit 4 - HPOR */
  137. /* ADCTL1 Bit 2,3 - DATSEL */
  138. /* ADCTL1 Bit 4,5 - DMONOMIX */
  139. /* ADCTL1 Bit 6,7 - VSEL */
  140. /* ADCTL2 Bit 2 - LRCM */
  141. /* ADCTL2 Bit 3 - TRI */
  142. /* ADCTL3 Bit 5 - HPFLREN */
  143. /* ADCTL3 Bit 6 - VROI */
  144. /* ADCTL3 Bit 7,8 - ADCLRM */
  145. /* ADCIN Bit 4 - LDCM */
  146. /* ADCIN Bit 5 - RDCM */
  147. SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
  148. SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
  149. WM8750_LOUTM2, 4, 7, 1),
  150. SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
  151. WM8750_ROUTM2, 4, 7, 1),
  152. SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
  153. WM8750_MOUTM2, 4, 7, 1),
  154. SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
  155. SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
  156. 0, 127, 0),
  157. SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
  158. 0, 127, 0),
  159. SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
  160. };
  161. /*
  162. * DAPM Controls
  163. */
  164. /* Left Mixer */
  165. static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
  166. SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
  167. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
  168. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
  169. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
  170. };
  171. /* Right Mixer */
  172. static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
  173. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
  174. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
  175. SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
  176. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
  177. };
  178. /* Mono Mixer */
  179. static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
  180. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
  181. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
  182. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
  183. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
  184. };
  185. /* Left Line Mux */
  186. static const struct snd_kcontrol_new wm8750_left_line_controls =
  187. SOC_DAPM_ENUM("Route", wm8750_enum[8]);
  188. /* Right Line Mux */
  189. static const struct snd_kcontrol_new wm8750_right_line_controls =
  190. SOC_DAPM_ENUM("Route", wm8750_enum[9]);
  191. /* Left PGA Mux */
  192. static const struct snd_kcontrol_new wm8750_left_pga_controls =
  193. SOC_DAPM_ENUM("Route", wm8750_enum[10]);
  194. /* Right PGA Mux */
  195. static const struct snd_kcontrol_new wm8750_right_pga_controls =
  196. SOC_DAPM_ENUM("Route", wm8750_enum[11]);
  197. /* Out 3 Mux */
  198. static const struct snd_kcontrol_new wm8750_out3_controls =
  199. SOC_DAPM_ENUM("Route", wm8750_enum[12]);
  200. /* Differential Mux */
  201. static const struct snd_kcontrol_new wm8750_diffmux_controls =
  202. SOC_DAPM_ENUM("Route", wm8750_enum[13]);
  203. /* Mono ADC Mux */
  204. static const struct snd_kcontrol_new wm8750_monomux_controls =
  205. SOC_DAPM_ENUM("Route", wm8750_enum[16]);
  206. static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
  207. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  208. &wm8750_left_mixer_controls[0],
  209. ARRAY_SIZE(wm8750_left_mixer_controls)),
  210. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  211. &wm8750_right_mixer_controls[0],
  212. ARRAY_SIZE(wm8750_right_mixer_controls)),
  213. SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
  214. &wm8750_mono_mixer_controls[0],
  215. ARRAY_SIZE(wm8750_mono_mixer_controls)),
  216. SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
  217. SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
  218. SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
  219. SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
  220. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
  221. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
  222. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
  223. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
  224. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
  225. SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
  226. &wm8750_left_pga_controls),
  227. SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
  228. &wm8750_right_pga_controls),
  229. SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
  230. &wm8750_left_line_controls),
  231. SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
  232. &wm8750_right_line_controls),
  233. SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
  234. SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
  235. SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
  236. SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
  237. &wm8750_diffmux_controls),
  238. SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
  239. &wm8750_monomux_controls),
  240. SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
  241. &wm8750_monomux_controls),
  242. SND_SOC_DAPM_OUTPUT("LOUT1"),
  243. SND_SOC_DAPM_OUTPUT("ROUT1"),
  244. SND_SOC_DAPM_OUTPUT("LOUT2"),
  245. SND_SOC_DAPM_OUTPUT("ROUT2"),
  246. SND_SOC_DAPM_OUTPUT("MONO1"),
  247. SND_SOC_DAPM_OUTPUT("OUT3"),
  248. SND_SOC_DAPM_OUTPUT("VREF"),
  249. SND_SOC_DAPM_INPUT("LINPUT1"),
  250. SND_SOC_DAPM_INPUT("LINPUT2"),
  251. SND_SOC_DAPM_INPUT("LINPUT3"),
  252. SND_SOC_DAPM_INPUT("RINPUT1"),
  253. SND_SOC_DAPM_INPUT("RINPUT2"),
  254. SND_SOC_DAPM_INPUT("RINPUT3"),
  255. };
  256. static const struct snd_soc_dapm_route wm8750_dapm_routes[] = {
  257. /* left mixer */
  258. {"Left Mixer", "Playback Switch", "Left DAC"},
  259. {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
  260. {"Left Mixer", "Right Playback Switch", "Right DAC"},
  261. {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
  262. /* right mixer */
  263. {"Right Mixer", "Left Playback Switch", "Left DAC"},
  264. {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
  265. {"Right Mixer", "Playback Switch", "Right DAC"},
  266. {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
  267. /* left out 1 */
  268. {"Left Out 1", NULL, "Left Mixer"},
  269. {"LOUT1", NULL, "Left Out 1"},
  270. /* left out 2 */
  271. {"Left Out 2", NULL, "Left Mixer"},
  272. {"LOUT2", NULL, "Left Out 2"},
  273. /* right out 1 */
  274. {"Right Out 1", NULL, "Right Mixer"},
  275. {"ROUT1", NULL, "Right Out 1"},
  276. /* right out 2 */
  277. {"Right Out 2", NULL, "Right Mixer"},
  278. {"ROUT2", NULL, "Right Out 2"},
  279. /* mono mixer */
  280. {"Mono Mixer", "Left Playback Switch", "Left DAC"},
  281. {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
  282. {"Mono Mixer", "Right Playback Switch", "Right DAC"},
  283. {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
  284. /* mono out */
  285. {"Mono Out 1", NULL, "Mono Mixer"},
  286. {"MONO1", NULL, "Mono Out 1"},
  287. /* out 3 */
  288. {"Out3 Mux", "VREF", "VREF"},
  289. {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
  290. {"Out3 Mux", "ROUT1", "Right Mixer"},
  291. {"Out3 Mux", "MonoOut", "MONO1"},
  292. {"Out 3", NULL, "Out3 Mux"},
  293. {"OUT3", NULL, "Out 3"},
  294. /* Left Line Mux */
  295. {"Left Line Mux", "Line 1", "LINPUT1"},
  296. {"Left Line Mux", "Line 2", "LINPUT2"},
  297. {"Left Line Mux", "Line 3", "LINPUT3"},
  298. {"Left Line Mux", "PGA", "Left PGA Mux"},
  299. {"Left Line Mux", "Differential", "Differential Mux"},
  300. /* Right Line Mux */
  301. {"Right Line Mux", "Line 1", "RINPUT1"},
  302. {"Right Line Mux", "Line 2", "RINPUT2"},
  303. {"Right Line Mux", "Line 3", "RINPUT3"},
  304. {"Right Line Mux", "PGA", "Right PGA Mux"},
  305. {"Right Line Mux", "Differential", "Differential Mux"},
  306. /* Left PGA Mux */
  307. {"Left PGA Mux", "Line 1", "LINPUT1"},
  308. {"Left PGA Mux", "Line 2", "LINPUT2"},
  309. {"Left PGA Mux", "Line 3", "LINPUT3"},
  310. {"Left PGA Mux", "Differential", "Differential Mux"},
  311. /* Right PGA Mux */
  312. {"Right PGA Mux", "Line 1", "RINPUT1"},
  313. {"Right PGA Mux", "Line 2", "RINPUT2"},
  314. {"Right PGA Mux", "Line 3", "RINPUT3"},
  315. {"Right PGA Mux", "Differential", "Differential Mux"},
  316. /* Differential Mux */
  317. {"Differential Mux", "Line 1", "LINPUT1"},
  318. {"Differential Mux", "Line 1", "RINPUT1"},
  319. {"Differential Mux", "Line 2", "LINPUT2"},
  320. {"Differential Mux", "Line 2", "RINPUT2"},
  321. /* Left ADC Mux */
  322. {"Left ADC Mux", "Stereo", "Left PGA Mux"},
  323. {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
  324. {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
  325. /* Right ADC Mux */
  326. {"Right ADC Mux", "Stereo", "Right PGA Mux"},
  327. {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
  328. {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
  329. /* ADC */
  330. {"Left ADC", NULL, "Left ADC Mux"},
  331. {"Right ADC", NULL, "Right ADC Mux"},
  332. };
  333. struct _coeff_div {
  334. u32 mclk;
  335. u32 rate;
  336. u16 fs;
  337. u8 sr:5;
  338. u8 usb:1;
  339. };
  340. /* codec hifi mclk clock divider coefficients */
  341. static const struct _coeff_div coeff_div[] = {
  342. /* 8k */
  343. {12288000, 8000, 1536, 0x6, 0x0},
  344. {11289600, 8000, 1408, 0x16, 0x0},
  345. {18432000, 8000, 2304, 0x7, 0x0},
  346. {16934400, 8000, 2112, 0x17, 0x0},
  347. {12000000, 8000, 1500, 0x6, 0x1},
  348. /* 11.025k */
  349. {11289600, 11025, 1024, 0x18, 0x0},
  350. {16934400, 11025, 1536, 0x19, 0x0},
  351. {12000000, 11025, 1088, 0x19, 0x1},
  352. /* 16k */
  353. {12288000, 16000, 768, 0xa, 0x0},
  354. {18432000, 16000, 1152, 0xb, 0x0},
  355. {12000000, 16000, 750, 0xa, 0x1},
  356. /* 22.05k */
  357. {11289600, 22050, 512, 0x1a, 0x0},
  358. {16934400, 22050, 768, 0x1b, 0x0},
  359. {12000000, 22050, 544, 0x1b, 0x1},
  360. /* 32k */
  361. {12288000, 32000, 384, 0xc, 0x0},
  362. {18432000, 32000, 576, 0xd, 0x0},
  363. {12000000, 32000, 375, 0xa, 0x1},
  364. /* 44.1k */
  365. {11289600, 44100, 256, 0x10, 0x0},
  366. {16934400, 44100, 384, 0x11, 0x0},
  367. {12000000, 44100, 272, 0x11, 0x1},
  368. /* 48k */
  369. {12288000, 48000, 256, 0x0, 0x0},
  370. {18432000, 48000, 384, 0x1, 0x0},
  371. {12000000, 48000, 250, 0x0, 0x1},
  372. /* 88.2k */
  373. {11289600, 88200, 128, 0x1e, 0x0},
  374. {16934400, 88200, 192, 0x1f, 0x0},
  375. {12000000, 88200, 136, 0x1f, 0x1},
  376. /* 96k */
  377. {12288000, 96000, 128, 0xe, 0x0},
  378. {18432000, 96000, 192, 0xf, 0x0},
  379. {12000000, 96000, 125, 0xe, 0x1},
  380. };
  381. static inline int get_coeff(int mclk, int rate)
  382. {
  383. int i;
  384. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  385. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  386. return i;
  387. }
  388. printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
  389. mclk, rate);
  390. return -EINVAL;
  391. }
  392. static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  393. int clk_id, unsigned int freq, int dir)
  394. {
  395. struct snd_soc_codec *codec = codec_dai->codec;
  396. struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec);
  397. switch (freq) {
  398. case 11289600:
  399. case 12000000:
  400. case 12288000:
  401. case 16934400:
  402. case 18432000:
  403. wm8750->sysclk = freq;
  404. return 0;
  405. }
  406. return -EINVAL;
  407. }
  408. static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai,
  409. unsigned int fmt)
  410. {
  411. struct snd_soc_codec *codec = codec_dai->codec;
  412. u16 iface = 0;
  413. /* set master/slave audio interface */
  414. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  415. case SND_SOC_DAIFMT_CBM_CFM:
  416. iface = 0x0040;
  417. break;
  418. case SND_SOC_DAIFMT_CBS_CFS:
  419. break;
  420. default:
  421. return -EINVAL;
  422. }
  423. /* interface format */
  424. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  425. case SND_SOC_DAIFMT_I2S:
  426. iface |= 0x0002;
  427. break;
  428. case SND_SOC_DAIFMT_RIGHT_J:
  429. break;
  430. case SND_SOC_DAIFMT_LEFT_J:
  431. iface |= 0x0001;
  432. break;
  433. case SND_SOC_DAIFMT_DSP_A:
  434. iface |= 0x0003;
  435. break;
  436. case SND_SOC_DAIFMT_DSP_B:
  437. iface |= 0x0013;
  438. break;
  439. default:
  440. return -EINVAL;
  441. }
  442. /* clock inversion */
  443. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  444. case SND_SOC_DAIFMT_NB_NF:
  445. break;
  446. case SND_SOC_DAIFMT_IB_IF:
  447. iface |= 0x0090;
  448. break;
  449. case SND_SOC_DAIFMT_IB_NF:
  450. iface |= 0x0080;
  451. break;
  452. case SND_SOC_DAIFMT_NB_IF:
  453. iface |= 0x0010;
  454. break;
  455. default:
  456. return -EINVAL;
  457. }
  458. snd_soc_write(codec, WM8750_IFACE, iface);
  459. return 0;
  460. }
  461. static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
  462. struct snd_pcm_hw_params *params,
  463. struct snd_soc_dai *dai)
  464. {
  465. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  466. struct snd_soc_codec *codec = rtd->codec;
  467. struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec);
  468. u16 iface = snd_soc_read(codec, WM8750_IFACE) & 0x1f3;
  469. u16 srate = snd_soc_read(codec, WM8750_SRATE) & 0x1c0;
  470. int coeff = get_coeff(wm8750->sysclk, params_rate(params));
  471. /* bit size */
  472. switch (params_format(params)) {
  473. case SNDRV_PCM_FORMAT_S16_LE:
  474. break;
  475. case SNDRV_PCM_FORMAT_S20_3LE:
  476. iface |= 0x0004;
  477. break;
  478. case SNDRV_PCM_FORMAT_S24_LE:
  479. iface |= 0x0008;
  480. break;
  481. case SNDRV_PCM_FORMAT_S32_LE:
  482. iface |= 0x000c;
  483. break;
  484. }
  485. /* set iface & srate */
  486. snd_soc_write(codec, WM8750_IFACE, iface);
  487. if (coeff >= 0)
  488. snd_soc_write(codec, WM8750_SRATE, srate |
  489. (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
  490. return 0;
  491. }
  492. static int wm8750_mute(struct snd_soc_dai *dai, int mute)
  493. {
  494. struct snd_soc_codec *codec = dai->codec;
  495. u16 mute_reg = snd_soc_read(codec, WM8750_ADCDAC) & 0xfff7;
  496. if (mute)
  497. snd_soc_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
  498. else
  499. snd_soc_write(codec, WM8750_ADCDAC, mute_reg);
  500. return 0;
  501. }
  502. static int wm8750_set_bias_level(struct snd_soc_codec *codec,
  503. enum snd_soc_bias_level level)
  504. {
  505. u16 pwr_reg = snd_soc_read(codec, WM8750_PWR1) & 0xfe3e;
  506. switch (level) {
  507. case SND_SOC_BIAS_ON:
  508. /* set vmid to 50k and unmute dac */
  509. snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
  510. break;
  511. case SND_SOC_BIAS_PREPARE:
  512. break;
  513. case SND_SOC_BIAS_STANDBY:
  514. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  515. snd_soc_cache_sync(codec);
  516. /* Set VMID to 5k */
  517. snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
  518. /* ...and ramp */
  519. msleep(1000);
  520. }
  521. /* mute dac and set vmid to 500k, enable VREF */
  522. snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
  523. break;
  524. case SND_SOC_BIAS_OFF:
  525. snd_soc_write(codec, WM8750_PWR1, 0x0001);
  526. break;
  527. }
  528. codec->dapm.bias_level = level;
  529. return 0;
  530. }
  531. #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  532. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
  533. SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
  534. #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  535. SNDRV_PCM_FMTBIT_S24_LE)
  536. static const struct snd_soc_dai_ops wm8750_dai_ops = {
  537. .hw_params = wm8750_pcm_hw_params,
  538. .digital_mute = wm8750_mute,
  539. .set_fmt = wm8750_set_dai_fmt,
  540. .set_sysclk = wm8750_set_dai_sysclk,
  541. };
  542. static struct snd_soc_dai_driver wm8750_dai = {
  543. .name = "wm8750-hifi",
  544. .playback = {
  545. .stream_name = "Playback",
  546. .channels_min = 1,
  547. .channels_max = 2,
  548. .rates = WM8750_RATES,
  549. .formats = WM8750_FORMATS,},
  550. .capture = {
  551. .stream_name = "Capture",
  552. .channels_min = 1,
  553. .channels_max = 2,
  554. .rates = WM8750_RATES,
  555. .formats = WM8750_FORMATS,},
  556. .ops = &wm8750_dai_ops,
  557. };
  558. static int wm8750_suspend(struct snd_soc_codec *codec)
  559. {
  560. wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
  561. return 0;
  562. }
  563. static int wm8750_resume(struct snd_soc_codec *codec)
  564. {
  565. wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  566. return 0;
  567. }
  568. static int wm8750_probe(struct snd_soc_codec *codec)
  569. {
  570. struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec);
  571. int ret;
  572. ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8750->control_type);
  573. if (ret < 0) {
  574. printk(KERN_ERR "wm8750: failed to set cache I/O: %d\n", ret);
  575. return ret;
  576. }
  577. ret = wm8750_reset(codec);
  578. if (ret < 0) {
  579. printk(KERN_ERR "wm8750: failed to reset: %d\n", ret);
  580. return ret;
  581. }
  582. /* charge output caps */
  583. wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  584. /* set the update bits */
  585. snd_soc_update_bits(codec, WM8750_LDAC, 0x0100, 0x0100);
  586. snd_soc_update_bits(codec, WM8750_RDAC, 0x0100, 0x0100);
  587. snd_soc_update_bits(codec, WM8750_LOUT1V, 0x0100, 0x0100);
  588. snd_soc_update_bits(codec, WM8750_ROUT1V, 0x0100, 0x0100);
  589. snd_soc_update_bits(codec, WM8750_LOUT2V, 0x0100, 0x0100);
  590. snd_soc_update_bits(codec, WM8750_ROUT2V, 0x0100, 0x0100);
  591. snd_soc_update_bits(codec, WM8750_LINVOL, 0x0100, 0x0100);
  592. snd_soc_update_bits(codec, WM8750_RINVOL, 0x0100, 0x0100);
  593. return ret;
  594. }
  595. static int wm8750_remove(struct snd_soc_codec *codec)
  596. {
  597. wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
  598. return 0;
  599. }
  600. static struct snd_soc_codec_driver soc_codec_dev_wm8750 = {
  601. .probe = wm8750_probe,
  602. .remove = wm8750_remove,
  603. .suspend = wm8750_suspend,
  604. .resume = wm8750_resume,
  605. .set_bias_level = wm8750_set_bias_level,
  606. .reg_cache_size = ARRAY_SIZE(wm8750_reg),
  607. .reg_word_size = sizeof(u16),
  608. .reg_cache_default = wm8750_reg,
  609. .controls = wm8750_snd_controls,
  610. .num_controls = ARRAY_SIZE(wm8750_snd_controls),
  611. .dapm_widgets = wm8750_dapm_widgets,
  612. .num_dapm_widgets = ARRAY_SIZE(wm8750_dapm_widgets),
  613. .dapm_routes = wm8750_dapm_routes,
  614. .num_dapm_routes = ARRAY_SIZE(wm8750_dapm_routes),
  615. };
  616. static const struct of_device_id wm8750_of_match[] = {
  617. { .compatible = "wlf,wm8750", },
  618. { .compatible = "wlf,wm8987", },
  619. { }
  620. };
  621. MODULE_DEVICE_TABLE(of, wm8750_of_match);
  622. #if defined(CONFIG_SPI_MASTER)
  623. static int __devinit wm8750_spi_probe(struct spi_device *spi)
  624. {
  625. struct wm8750_priv *wm8750;
  626. int ret;
  627. wm8750 = devm_kzalloc(&spi->dev, sizeof(struct wm8750_priv),
  628. GFP_KERNEL);
  629. if (wm8750 == NULL)
  630. return -ENOMEM;
  631. wm8750->control_type = SND_SOC_SPI;
  632. spi_set_drvdata(spi, wm8750);
  633. ret = snd_soc_register_codec(&spi->dev,
  634. &soc_codec_dev_wm8750, &wm8750_dai, 1);
  635. return ret;
  636. }
  637. static int __devexit wm8750_spi_remove(struct spi_device *spi)
  638. {
  639. snd_soc_unregister_codec(&spi->dev);
  640. return 0;
  641. }
  642. static const struct spi_device_id wm8750_spi_ids[] = {
  643. { "wm8750", 0 },
  644. { "wm8987", 0 },
  645. { },
  646. };
  647. MODULE_DEVICE_TABLE(spi, wm8750_spi_ids);
  648. static struct spi_driver wm8750_spi_driver = {
  649. .driver = {
  650. .name = "wm8750",
  651. .owner = THIS_MODULE,
  652. .of_match_table = wm8750_of_match,
  653. },
  654. .id_table = wm8750_spi_ids,
  655. .probe = wm8750_spi_probe,
  656. .remove = __devexit_p(wm8750_spi_remove),
  657. };
  658. #endif /* CONFIG_SPI_MASTER */
  659. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  660. static __devinit int wm8750_i2c_probe(struct i2c_client *i2c,
  661. const struct i2c_device_id *id)
  662. {
  663. struct wm8750_priv *wm8750;
  664. int ret;
  665. wm8750 = devm_kzalloc(&i2c->dev, sizeof(struct wm8750_priv),
  666. GFP_KERNEL);
  667. if (wm8750 == NULL)
  668. return -ENOMEM;
  669. i2c_set_clientdata(i2c, wm8750);
  670. wm8750->control_type = SND_SOC_I2C;
  671. ret = snd_soc_register_codec(&i2c->dev,
  672. &soc_codec_dev_wm8750, &wm8750_dai, 1);
  673. return ret;
  674. }
  675. static __devexit int wm8750_i2c_remove(struct i2c_client *client)
  676. {
  677. snd_soc_unregister_codec(&client->dev);
  678. return 0;
  679. }
  680. static const struct i2c_device_id wm8750_i2c_id[] = {
  681. { "wm8750", 0 },
  682. { "wm8987", 0 },
  683. { }
  684. };
  685. MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id);
  686. static struct i2c_driver wm8750_i2c_driver = {
  687. .driver = {
  688. .name = "wm8750",
  689. .owner = THIS_MODULE,
  690. .of_match_table = wm8750_of_match,
  691. },
  692. .probe = wm8750_i2c_probe,
  693. .remove = __devexit_p(wm8750_i2c_remove),
  694. .id_table = wm8750_i2c_id,
  695. };
  696. #endif
  697. static int __init wm8750_modinit(void)
  698. {
  699. int ret = 0;
  700. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  701. ret = i2c_add_driver(&wm8750_i2c_driver);
  702. if (ret != 0) {
  703. printk(KERN_ERR "Failed to register wm8750 I2C driver: %d\n",
  704. ret);
  705. }
  706. #endif
  707. #if defined(CONFIG_SPI_MASTER)
  708. ret = spi_register_driver(&wm8750_spi_driver);
  709. if (ret != 0) {
  710. printk(KERN_ERR "Failed to register wm8750 SPI driver: %d\n",
  711. ret);
  712. }
  713. #endif
  714. return ret;
  715. }
  716. module_init(wm8750_modinit);
  717. static void __exit wm8750_exit(void)
  718. {
  719. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  720. i2c_del_driver(&wm8750_i2c_driver);
  721. #endif
  722. #if defined(CONFIG_SPI_MASTER)
  723. spi_unregister_driver(&wm8750_spi_driver);
  724. #endif
  725. }
  726. module_exit(wm8750_exit);
  727. MODULE_DESCRIPTION("ASoC WM8750 driver");
  728. MODULE_AUTHOR("Liam Girdwood");
  729. MODULE_LICENSE("GPL");