uda134x.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632
  1. /*
  2. * uda134x.c -- UDA134X ALSA SoC Codec driver
  3. *
  4. * Modifications by Christian Pellegrin <chripell@evolware.org>
  5. *
  6. * Copyright 2007 Dension Audio Systems Ltd.
  7. * Author: Zoltan Devai
  8. *
  9. * Based on the WM87xx drivers by Liam Girdwood and Richard Purdie
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/module.h>
  16. #include <linux/delay.h>
  17. #include <linux/slab.h>
  18. #include <sound/pcm.h>
  19. #include <sound/pcm_params.h>
  20. #include <sound/soc.h>
  21. #include <sound/initval.h>
  22. #include <sound/uda134x.h>
  23. #include <sound/l3.h>
  24. #include "uda134x.h"
  25. #define UDA134X_RATES SNDRV_PCM_RATE_8000_48000
  26. #define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
  27. SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE)
  28. struct uda134x_priv {
  29. int sysclk;
  30. int dai_fmt;
  31. struct snd_pcm_substream *master_substream;
  32. struct snd_pcm_substream *slave_substream;
  33. };
  34. /* In-data addresses are hard-coded into the reg-cache values */
  35. static const char uda134x_reg[UDA134X_REGS_NUM] = {
  36. /* Extended address registers */
  37. 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
  38. /* Status, data regs */
  39. 0x00, 0x83, 0x00, 0x40, 0x80, 0xC0, 0x00,
  40. };
  41. /*
  42. * The codec has no support for reading its registers except for peak level...
  43. */
  44. static inline unsigned int uda134x_read_reg_cache(struct snd_soc_codec *codec,
  45. unsigned int reg)
  46. {
  47. u8 *cache = codec->reg_cache;
  48. if (reg >= UDA134X_REGS_NUM)
  49. return -1;
  50. return cache[reg];
  51. }
  52. /*
  53. * Write the register cache
  54. */
  55. static inline void uda134x_write_reg_cache(struct snd_soc_codec *codec,
  56. u8 reg, unsigned int value)
  57. {
  58. u8 *cache = codec->reg_cache;
  59. if (reg >= UDA134X_REGS_NUM)
  60. return;
  61. cache[reg] = value;
  62. }
  63. /*
  64. * Write to the uda134x registers
  65. *
  66. */
  67. static int uda134x_write(struct snd_soc_codec *codec, unsigned int reg,
  68. unsigned int value)
  69. {
  70. int ret;
  71. u8 addr;
  72. u8 data = value;
  73. struct uda134x_platform_data *pd = codec->control_data;
  74. pr_debug("%s reg: %02X, value:%02X\n", __func__, reg, value);
  75. if (reg >= UDA134X_REGS_NUM) {
  76. printk(KERN_ERR "%s unknown register: reg: %u",
  77. __func__, reg);
  78. return -EINVAL;
  79. }
  80. uda134x_write_reg_cache(codec, reg, value);
  81. switch (reg) {
  82. case UDA134X_STATUS0:
  83. case UDA134X_STATUS1:
  84. addr = UDA134X_STATUS_ADDR;
  85. break;
  86. case UDA134X_DATA000:
  87. case UDA134X_DATA001:
  88. case UDA134X_DATA010:
  89. case UDA134X_DATA011:
  90. addr = UDA134X_DATA0_ADDR;
  91. break;
  92. case UDA134X_DATA1:
  93. addr = UDA134X_DATA1_ADDR;
  94. break;
  95. default:
  96. /* It's an extended address register */
  97. addr = (reg | UDA134X_EXTADDR_PREFIX);
  98. ret = l3_write(&pd->l3,
  99. UDA134X_DATA0_ADDR, &addr, 1);
  100. if (ret != 1)
  101. return -EIO;
  102. addr = UDA134X_DATA0_ADDR;
  103. data = (value | UDA134X_EXTDATA_PREFIX);
  104. break;
  105. }
  106. ret = l3_write(&pd->l3,
  107. addr, &data, 1);
  108. if (ret != 1)
  109. return -EIO;
  110. return 0;
  111. }
  112. static inline void uda134x_reset(struct snd_soc_codec *codec)
  113. {
  114. u8 reset_reg = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
  115. uda134x_write(codec, UDA134X_STATUS0, reset_reg | (1<<6));
  116. msleep(1);
  117. uda134x_write(codec, UDA134X_STATUS0, reset_reg & ~(1<<6));
  118. }
  119. static int uda134x_mute(struct snd_soc_dai *dai, int mute)
  120. {
  121. struct snd_soc_codec *codec = dai->codec;
  122. u8 mute_reg = uda134x_read_reg_cache(codec, UDA134X_DATA010);
  123. pr_debug("%s mute: %d\n", __func__, mute);
  124. if (mute)
  125. mute_reg |= (1<<2);
  126. else
  127. mute_reg &= ~(1<<2);
  128. uda134x_write(codec, UDA134X_DATA010, mute_reg);
  129. return 0;
  130. }
  131. static int uda134x_startup(struct snd_pcm_substream *substream,
  132. struct snd_soc_dai *dai)
  133. {
  134. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  135. struct snd_soc_codec *codec =rtd->codec;
  136. struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
  137. struct snd_pcm_runtime *master_runtime;
  138. if (uda134x->master_substream) {
  139. master_runtime = uda134x->master_substream->runtime;
  140. pr_debug("%s constraining to %d bits at %d\n", __func__,
  141. master_runtime->sample_bits,
  142. master_runtime->rate);
  143. snd_pcm_hw_constraint_minmax(substream->runtime,
  144. SNDRV_PCM_HW_PARAM_RATE,
  145. master_runtime->rate,
  146. master_runtime->rate);
  147. snd_pcm_hw_constraint_minmax(substream->runtime,
  148. SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
  149. master_runtime->sample_bits,
  150. master_runtime->sample_bits);
  151. uda134x->slave_substream = substream;
  152. } else
  153. uda134x->master_substream = substream;
  154. return 0;
  155. }
  156. static void uda134x_shutdown(struct snd_pcm_substream *substream,
  157. struct snd_soc_dai *dai)
  158. {
  159. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  160. struct snd_soc_codec *codec = rtd->codec;
  161. struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
  162. if (uda134x->master_substream == substream)
  163. uda134x->master_substream = uda134x->slave_substream;
  164. uda134x->slave_substream = NULL;
  165. }
  166. static int uda134x_hw_params(struct snd_pcm_substream *substream,
  167. struct snd_pcm_hw_params *params,
  168. struct snd_soc_dai *dai)
  169. {
  170. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  171. struct snd_soc_codec *codec = rtd->codec;
  172. struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
  173. u8 hw_params;
  174. if (substream == uda134x->slave_substream) {
  175. pr_debug("%s ignoring hw_params for slave substream\n",
  176. __func__);
  177. return 0;
  178. }
  179. hw_params = uda134x_read_reg_cache(codec, UDA134X_STATUS0);
  180. hw_params &= STATUS0_SYSCLK_MASK;
  181. hw_params &= STATUS0_DAIFMT_MASK;
  182. pr_debug("%s sysclk: %d, rate:%d\n", __func__,
  183. uda134x->sysclk, params_rate(params));
  184. /* set SYSCLK / fs ratio */
  185. switch (uda134x->sysclk / params_rate(params)) {
  186. case 512:
  187. break;
  188. case 384:
  189. hw_params |= (1<<4);
  190. break;
  191. case 256:
  192. hw_params |= (1<<5);
  193. break;
  194. default:
  195. printk(KERN_ERR "%s unsupported fs\n", __func__);
  196. return -EINVAL;
  197. }
  198. pr_debug("%s dai_fmt: %d, params_format:%d\n", __func__,
  199. uda134x->dai_fmt, params_format(params));
  200. /* set DAI format and word length */
  201. switch (uda134x->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  202. case SND_SOC_DAIFMT_I2S:
  203. break;
  204. case SND_SOC_DAIFMT_RIGHT_J:
  205. switch (params_format(params)) {
  206. case SNDRV_PCM_FORMAT_S16_LE:
  207. hw_params |= (1<<1);
  208. break;
  209. case SNDRV_PCM_FORMAT_S18_3LE:
  210. hw_params |= (1<<2);
  211. break;
  212. case SNDRV_PCM_FORMAT_S20_3LE:
  213. hw_params |= ((1<<2) | (1<<1));
  214. break;
  215. default:
  216. printk(KERN_ERR "%s unsupported format (right)\n",
  217. __func__);
  218. return -EINVAL;
  219. }
  220. break;
  221. case SND_SOC_DAIFMT_LEFT_J:
  222. hw_params |= (1<<3);
  223. break;
  224. default:
  225. printk(KERN_ERR "%s unsupported format\n", __func__);
  226. return -EINVAL;
  227. }
  228. uda134x_write(codec, UDA134X_STATUS0, hw_params);
  229. return 0;
  230. }
  231. static int uda134x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  232. int clk_id, unsigned int freq, int dir)
  233. {
  234. struct snd_soc_codec *codec = codec_dai->codec;
  235. struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
  236. pr_debug("%s clk_id: %d, freq: %u, dir: %d\n", __func__,
  237. clk_id, freq, dir);
  238. /* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable
  239. because the codec is slave. Of course limitations of the clock
  240. master (the IIS controller) apply.
  241. We'll error out on set_hw_params if it's not OK */
  242. if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
  243. uda134x->sysclk = freq;
  244. return 0;
  245. }
  246. printk(KERN_ERR "%s unsupported sysclk\n", __func__);
  247. return -EINVAL;
  248. }
  249. static int uda134x_set_dai_fmt(struct snd_soc_dai *codec_dai,
  250. unsigned int fmt)
  251. {
  252. struct snd_soc_codec *codec = codec_dai->codec;
  253. struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
  254. pr_debug("%s fmt: %08X\n", __func__, fmt);
  255. /* codec supports only full slave mode */
  256. if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
  257. printk(KERN_ERR "%s unsupported slave mode\n", __func__);
  258. return -EINVAL;
  259. }
  260. /* no support for clock inversion */
  261. if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
  262. printk(KERN_ERR "%s unsupported clock inversion\n", __func__);
  263. return -EINVAL;
  264. }
  265. /* We can't setup DAI format here as it depends on the word bit num */
  266. /* so let's just store the value for later */
  267. uda134x->dai_fmt = fmt;
  268. return 0;
  269. }
  270. static int uda134x_set_bias_level(struct snd_soc_codec *codec,
  271. enum snd_soc_bias_level level)
  272. {
  273. u8 reg;
  274. struct uda134x_platform_data *pd = codec->control_data;
  275. int i;
  276. u8 *cache = codec->reg_cache;
  277. pr_debug("%s bias level %d\n", __func__, level);
  278. switch (level) {
  279. case SND_SOC_BIAS_ON:
  280. /* ADC, DAC on */
  281. switch (pd->model) {
  282. case UDA134X_UDA1340:
  283. case UDA134X_UDA1344:
  284. case UDA134X_UDA1345:
  285. reg = uda134x_read_reg_cache(codec, UDA134X_DATA011);
  286. uda134x_write(codec, UDA134X_DATA011, reg | 0x03);
  287. break;
  288. case UDA134X_UDA1341:
  289. reg = uda134x_read_reg_cache(codec, UDA134X_STATUS1);
  290. uda134x_write(codec, UDA134X_STATUS1, reg | 0x03);
  291. break;
  292. default:
  293. printk(KERN_ERR "UDA134X SoC codec: "
  294. "unsupported model %d\n", pd->model);
  295. return -EINVAL;
  296. }
  297. break;
  298. case SND_SOC_BIAS_PREPARE:
  299. /* power on */
  300. if (pd->power) {
  301. pd->power(1);
  302. /* Sync reg_cache with the hardware */
  303. for (i = 0; i < ARRAY_SIZE(uda134x_reg); i++)
  304. codec->driver->write(codec, i, *cache++);
  305. }
  306. break;
  307. case SND_SOC_BIAS_STANDBY:
  308. /* ADC, DAC power off */
  309. switch (pd->model) {
  310. case UDA134X_UDA1340:
  311. case UDA134X_UDA1344:
  312. case UDA134X_UDA1345:
  313. reg = uda134x_read_reg_cache(codec, UDA134X_DATA011);
  314. uda134x_write(codec, UDA134X_DATA011, reg & ~(0x03));
  315. break;
  316. case UDA134X_UDA1341:
  317. reg = uda134x_read_reg_cache(codec, UDA134X_STATUS1);
  318. uda134x_write(codec, UDA134X_STATUS1, reg & ~(0x03));
  319. break;
  320. default:
  321. printk(KERN_ERR "UDA134X SoC codec: "
  322. "unsupported model %d\n", pd->model);
  323. return -EINVAL;
  324. }
  325. break;
  326. case SND_SOC_BIAS_OFF:
  327. /* power off */
  328. if (pd->power)
  329. pd->power(0);
  330. break;
  331. }
  332. codec->dapm.bias_level = level;
  333. return 0;
  334. }
  335. static const char *uda134x_dsp_setting[] = {"Flat", "Minimum1",
  336. "Minimum2", "Maximum"};
  337. static const char *uda134x_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  338. static const char *uda134x_mixmode[] = {"Differential", "Analog1",
  339. "Analog2", "Both"};
  340. static const struct soc_enum uda134x_mixer_enum[] = {
  341. SOC_ENUM_SINGLE(UDA134X_DATA010, 0, 0x04, uda134x_dsp_setting),
  342. SOC_ENUM_SINGLE(UDA134X_DATA010, 3, 0x04, uda134x_deemph),
  343. SOC_ENUM_SINGLE(UDA134X_EA010, 0, 0x04, uda134x_mixmode),
  344. };
  345. static const struct snd_kcontrol_new uda1341_snd_controls[] = {
  346. SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
  347. SOC_SINGLE("Capture Volume", UDA134X_EA010, 2, 0x07, 0),
  348. SOC_SINGLE("Analog1 Volume", UDA134X_EA000, 0, 0x1F, 1),
  349. SOC_SINGLE("Analog2 Volume", UDA134X_EA001, 0, 0x1F, 1),
  350. SOC_SINGLE("Mic Sensitivity", UDA134X_EA010, 2, 7, 0),
  351. SOC_SINGLE("Mic Volume", UDA134X_EA101, 0, 0x1F, 0),
  352. SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
  353. SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
  354. SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
  355. SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
  356. SOC_ENUM("Input Mux", uda134x_mixer_enum[2]),
  357. SOC_SINGLE("AGC Switch", UDA134X_EA100, 4, 1, 0),
  358. SOC_SINGLE("AGC Target Volume", UDA134X_EA110, 0, 0x03, 1),
  359. SOC_SINGLE("AGC Timing", UDA134X_EA110, 2, 0x07, 0),
  360. SOC_SINGLE("DAC +6dB Switch", UDA134X_STATUS1, 6, 1, 0),
  361. SOC_SINGLE("ADC +6dB Switch", UDA134X_STATUS1, 5, 1, 0),
  362. SOC_SINGLE("ADC Polarity Switch", UDA134X_STATUS1, 4, 1, 0),
  363. SOC_SINGLE("DAC Polarity Switch", UDA134X_STATUS1, 3, 1, 0),
  364. SOC_SINGLE("Double Speed Playback Switch", UDA134X_STATUS1, 2, 1, 0),
  365. SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
  366. };
  367. static const struct snd_kcontrol_new uda1340_snd_controls[] = {
  368. SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
  369. SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
  370. SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
  371. SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
  372. SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
  373. SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
  374. };
  375. static const struct snd_kcontrol_new uda1345_snd_controls[] = {
  376. SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
  377. SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
  378. SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
  379. };
  380. static const struct snd_soc_dai_ops uda134x_dai_ops = {
  381. .startup = uda134x_startup,
  382. .shutdown = uda134x_shutdown,
  383. .hw_params = uda134x_hw_params,
  384. .digital_mute = uda134x_mute,
  385. .set_sysclk = uda134x_set_dai_sysclk,
  386. .set_fmt = uda134x_set_dai_fmt,
  387. };
  388. static struct snd_soc_dai_driver uda134x_dai = {
  389. .name = "uda134x-hifi",
  390. /* playback capabilities */
  391. .playback = {
  392. .stream_name = "Playback",
  393. .channels_min = 1,
  394. .channels_max = 2,
  395. .rates = UDA134X_RATES,
  396. .formats = UDA134X_FORMATS,
  397. },
  398. /* capture capabilities */
  399. .capture = {
  400. .stream_name = "Capture",
  401. .channels_min = 1,
  402. .channels_max = 2,
  403. .rates = UDA134X_RATES,
  404. .formats = UDA134X_FORMATS,
  405. },
  406. /* pcm operations */
  407. .ops = &uda134x_dai_ops,
  408. };
  409. static int uda134x_soc_probe(struct snd_soc_codec *codec)
  410. {
  411. struct uda134x_priv *uda134x;
  412. struct uda134x_platform_data *pd = codec->card->dev->platform_data;
  413. int ret;
  414. printk(KERN_INFO "UDA134X SoC Audio Codec\n");
  415. if (!pd) {
  416. printk(KERN_ERR "UDA134X SoC codec: "
  417. "missing L3 bitbang function\n");
  418. return -ENODEV;
  419. }
  420. switch (pd->model) {
  421. case UDA134X_UDA1340:
  422. case UDA134X_UDA1341:
  423. case UDA134X_UDA1344:
  424. case UDA134X_UDA1345:
  425. break;
  426. default:
  427. printk(KERN_ERR "UDA134X SoC codec: "
  428. "unsupported model %d\n",
  429. pd->model);
  430. return -EINVAL;
  431. }
  432. uda134x = kzalloc(sizeof(struct uda134x_priv), GFP_KERNEL);
  433. if (uda134x == NULL)
  434. return -ENOMEM;
  435. snd_soc_codec_set_drvdata(codec, uda134x);
  436. codec->control_data = pd;
  437. if (pd->power)
  438. pd->power(1);
  439. uda134x_reset(codec);
  440. if (pd->is_powered_on_standby)
  441. uda134x_set_bias_level(codec, SND_SOC_BIAS_ON);
  442. else
  443. uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  444. switch (pd->model) {
  445. case UDA134X_UDA1340:
  446. case UDA134X_UDA1344:
  447. ret = snd_soc_add_codec_controls(codec, uda1340_snd_controls,
  448. ARRAY_SIZE(uda1340_snd_controls));
  449. break;
  450. case UDA134X_UDA1341:
  451. ret = snd_soc_add_codec_controls(codec, uda1341_snd_controls,
  452. ARRAY_SIZE(uda1341_snd_controls));
  453. break;
  454. case UDA134X_UDA1345:
  455. ret = snd_soc_add_codec_controls(codec, uda1345_snd_controls,
  456. ARRAY_SIZE(uda1345_snd_controls));
  457. break;
  458. default:
  459. printk(KERN_ERR "%s unknown codec type: %d",
  460. __func__, pd->model);
  461. kfree(uda134x);
  462. return -EINVAL;
  463. }
  464. if (ret < 0) {
  465. printk(KERN_ERR "UDA134X: failed to register controls\n");
  466. kfree(uda134x);
  467. return ret;
  468. }
  469. return 0;
  470. }
  471. /* power down chip */
  472. static int uda134x_soc_remove(struct snd_soc_codec *codec)
  473. {
  474. struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec);
  475. uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  476. uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
  477. kfree(uda134x);
  478. return 0;
  479. }
  480. #if defined(CONFIG_PM)
  481. static int uda134x_soc_suspend(struct snd_soc_codec *codec)
  482. {
  483. uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  484. uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
  485. return 0;
  486. }
  487. static int uda134x_soc_resume(struct snd_soc_codec *codec)
  488. {
  489. uda134x_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
  490. uda134x_set_bias_level(codec, SND_SOC_BIAS_ON);
  491. return 0;
  492. }
  493. #else
  494. #define uda134x_soc_suspend NULL
  495. #define uda134x_soc_resume NULL
  496. #endif /* CONFIG_PM */
  497. static struct snd_soc_codec_driver soc_codec_dev_uda134x = {
  498. .probe = uda134x_soc_probe,
  499. .remove = uda134x_soc_remove,
  500. .suspend = uda134x_soc_suspend,
  501. .resume = uda134x_soc_resume,
  502. .reg_cache_size = sizeof(uda134x_reg),
  503. .reg_word_size = sizeof(u8),
  504. .reg_cache_default = uda134x_reg,
  505. .reg_cache_step = 1,
  506. .read = uda134x_read_reg_cache,
  507. .write = uda134x_write,
  508. .set_bias_level = uda134x_set_bias_level,
  509. };
  510. static int __devinit uda134x_codec_probe(struct platform_device *pdev)
  511. {
  512. return snd_soc_register_codec(&pdev->dev,
  513. &soc_codec_dev_uda134x, &uda134x_dai, 1);
  514. }
  515. static int __devexit uda134x_codec_remove(struct platform_device *pdev)
  516. {
  517. snd_soc_unregister_codec(&pdev->dev);
  518. return 0;
  519. }
  520. static struct platform_driver uda134x_codec_driver = {
  521. .driver = {
  522. .name = "uda134x-codec",
  523. .owner = THIS_MODULE,
  524. },
  525. .probe = uda134x_codec_probe,
  526. .remove = __devexit_p(uda134x_codec_remove),
  527. };
  528. module_platform_driver(uda134x_codec_driver);
  529. MODULE_DESCRIPTION("UDA134X ALSA soc codec driver");
  530. MODULE_AUTHOR("Zoltan Devai, Christian Pellegrin <chripell@evolware.org>");
  531. MODULE_LICENSE("GPL");