rt5631.c 55 KB

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  1. /*
  2. * rt5631.c -- RT5631 ALSA Soc Audio driver
  3. *
  4. * Copyright 2011 Realtek Microelectronics
  5. *
  6. * Author: flove <flove@realtek.com>
  7. *
  8. * Based on WM8753.c
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/init.h>
  18. #include <linux/delay.h>
  19. #include <linux/pm.h>
  20. #include <linux/i2c.h>
  21. #include <linux/spi/spi.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/initval.h>
  28. #include <sound/tlv.h>
  29. #include "rt5631.h"
  30. struct rt5631_priv {
  31. int codec_version;
  32. int master;
  33. int sysclk;
  34. int rx_rate;
  35. int bclk_rate;
  36. int dmic_used_flag;
  37. };
  38. static const u16 rt5631_reg[RT5631_VENDOR_ID2 + 1] = {
  39. [RT5631_SPK_OUT_VOL] = 0x8888,
  40. [RT5631_HP_OUT_VOL] = 0x8080,
  41. [RT5631_MONO_AXO_1_2_VOL] = 0xa080,
  42. [RT5631_AUX_IN_VOL] = 0x0808,
  43. [RT5631_ADC_REC_MIXER] = 0xf0f0,
  44. [RT5631_VDAC_DIG_VOL] = 0x0010,
  45. [RT5631_OUTMIXER_L_CTRL] = 0xffc0,
  46. [RT5631_OUTMIXER_R_CTRL] = 0xffc0,
  47. [RT5631_AXO1MIXER_CTRL] = 0x88c0,
  48. [RT5631_AXO2MIXER_CTRL] = 0x88c0,
  49. [RT5631_DIG_MIC_CTRL] = 0x3000,
  50. [RT5631_MONO_INPUT_VOL] = 0x8808,
  51. [RT5631_SPK_MIXER_CTRL] = 0xf8f8,
  52. [RT5631_SPK_MONO_OUT_CTRL] = 0xfc00,
  53. [RT5631_SPK_MONO_HP_OUT_CTRL] = 0x4440,
  54. [RT5631_SDP_CTRL] = 0x8000,
  55. [RT5631_MONO_SDP_CTRL] = 0x8000,
  56. [RT5631_STEREO_AD_DA_CLK_CTRL] = 0x2010,
  57. [RT5631_GEN_PUR_CTRL_REG] = 0x0e00,
  58. [RT5631_INT_ST_IRQ_CTRL_2] = 0x071a,
  59. [RT5631_MISC_CTRL] = 0x2040,
  60. [RT5631_DEPOP_FUN_CTRL_2] = 0x8000,
  61. [RT5631_SOFT_VOL_CTRL] = 0x07e0,
  62. [RT5631_ALC_CTRL_1] = 0x0206,
  63. [RT5631_ALC_CTRL_3] = 0x2000,
  64. [RT5631_PSEUDO_SPATL_CTRL] = 0x0553,
  65. };
  66. /**
  67. * rt5631_write_index - write index register of 2nd layer
  68. */
  69. static void rt5631_write_index(struct snd_soc_codec *codec,
  70. unsigned int reg, unsigned int value)
  71. {
  72. snd_soc_write(codec, RT5631_INDEX_ADD, reg);
  73. snd_soc_write(codec, RT5631_INDEX_DATA, value);
  74. }
  75. /**
  76. * rt5631_read_index - read index register of 2nd layer
  77. */
  78. static unsigned int rt5631_read_index(struct snd_soc_codec *codec,
  79. unsigned int reg)
  80. {
  81. unsigned int value;
  82. snd_soc_write(codec, RT5631_INDEX_ADD, reg);
  83. value = snd_soc_read(codec, RT5631_INDEX_DATA);
  84. return value;
  85. }
  86. static int rt5631_reset(struct snd_soc_codec *codec)
  87. {
  88. return snd_soc_write(codec, RT5631_RESET, 0);
  89. }
  90. static int rt5631_volatile_register(struct snd_soc_codec *codec,
  91. unsigned int reg)
  92. {
  93. switch (reg) {
  94. case RT5631_RESET:
  95. case RT5631_INT_ST_IRQ_CTRL_2:
  96. case RT5631_INDEX_ADD:
  97. case RT5631_INDEX_DATA:
  98. case RT5631_EQ_CTRL:
  99. return 1;
  100. default:
  101. return 0;
  102. }
  103. }
  104. static int rt5631_readable_register(struct snd_soc_codec *codec,
  105. unsigned int reg)
  106. {
  107. switch (reg) {
  108. case RT5631_RESET:
  109. case RT5631_SPK_OUT_VOL:
  110. case RT5631_HP_OUT_VOL:
  111. case RT5631_MONO_AXO_1_2_VOL:
  112. case RT5631_AUX_IN_VOL:
  113. case RT5631_STEREO_DAC_VOL_1:
  114. case RT5631_MIC_CTRL_1:
  115. case RT5631_STEREO_DAC_VOL_2:
  116. case RT5631_ADC_CTRL_1:
  117. case RT5631_ADC_REC_MIXER:
  118. case RT5631_ADC_CTRL_2:
  119. case RT5631_VDAC_DIG_VOL:
  120. case RT5631_OUTMIXER_L_CTRL:
  121. case RT5631_OUTMIXER_R_CTRL:
  122. case RT5631_AXO1MIXER_CTRL:
  123. case RT5631_AXO2MIXER_CTRL:
  124. case RT5631_MIC_CTRL_2:
  125. case RT5631_DIG_MIC_CTRL:
  126. case RT5631_MONO_INPUT_VOL:
  127. case RT5631_SPK_MIXER_CTRL:
  128. case RT5631_SPK_MONO_OUT_CTRL:
  129. case RT5631_SPK_MONO_HP_OUT_CTRL:
  130. case RT5631_SDP_CTRL:
  131. case RT5631_MONO_SDP_CTRL:
  132. case RT5631_STEREO_AD_DA_CLK_CTRL:
  133. case RT5631_PWR_MANAG_ADD1:
  134. case RT5631_PWR_MANAG_ADD2:
  135. case RT5631_PWR_MANAG_ADD3:
  136. case RT5631_PWR_MANAG_ADD4:
  137. case RT5631_GEN_PUR_CTRL_REG:
  138. case RT5631_GLOBAL_CLK_CTRL:
  139. case RT5631_PLL_CTRL:
  140. case RT5631_INT_ST_IRQ_CTRL_1:
  141. case RT5631_INT_ST_IRQ_CTRL_2:
  142. case RT5631_GPIO_CTRL:
  143. case RT5631_MISC_CTRL:
  144. case RT5631_DEPOP_FUN_CTRL_1:
  145. case RT5631_DEPOP_FUN_CTRL_2:
  146. case RT5631_JACK_DET_CTRL:
  147. case RT5631_SOFT_VOL_CTRL:
  148. case RT5631_ALC_CTRL_1:
  149. case RT5631_ALC_CTRL_2:
  150. case RT5631_ALC_CTRL_3:
  151. case RT5631_PSEUDO_SPATL_CTRL:
  152. case RT5631_INDEX_ADD:
  153. case RT5631_INDEX_DATA:
  154. case RT5631_EQ_CTRL:
  155. case RT5631_VENDOR_ID:
  156. case RT5631_VENDOR_ID1:
  157. case RT5631_VENDOR_ID2:
  158. return 1;
  159. default:
  160. return 0;
  161. }
  162. }
  163. static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
  164. static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0);
  165. static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
  166. /* {0, +20, +24, +30, +35, +40, +44, +50, +52}dB */
  167. static unsigned int mic_bst_tlv[] = {
  168. TLV_DB_RANGE_HEAD(7),
  169. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  170. 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
  171. 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
  172. 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
  173. 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
  174. 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
  175. 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
  176. };
  177. static int rt5631_dmic_get(struct snd_kcontrol *kcontrol,
  178. struct snd_ctl_elem_value *ucontrol)
  179. {
  180. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  181. struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
  182. ucontrol->value.integer.value[0] = rt5631->dmic_used_flag;
  183. return 0;
  184. }
  185. static int rt5631_dmic_put(struct snd_kcontrol *kcontrol,
  186. struct snd_ctl_elem_value *ucontrol)
  187. {
  188. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  189. struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
  190. rt5631->dmic_used_flag = ucontrol->value.integer.value[0];
  191. return 0;
  192. }
  193. /* MIC Input Type */
  194. static const char *rt5631_input_mode[] = {
  195. "Single ended", "Differential"};
  196. static const SOC_ENUM_SINGLE_DECL(
  197. rt5631_mic1_mode_enum, RT5631_MIC_CTRL_1,
  198. RT5631_MIC1_DIFF_INPUT_SHIFT, rt5631_input_mode);
  199. static const SOC_ENUM_SINGLE_DECL(
  200. rt5631_mic2_mode_enum, RT5631_MIC_CTRL_1,
  201. RT5631_MIC2_DIFF_INPUT_SHIFT, rt5631_input_mode);
  202. /* MONO Input Type */
  203. static const SOC_ENUM_SINGLE_DECL(
  204. rt5631_monoin_mode_enum, RT5631_MONO_INPUT_VOL,
  205. RT5631_MONO_DIFF_INPUT_SHIFT, rt5631_input_mode);
  206. /* SPK Ratio Gain Control */
  207. static const char *rt5631_spk_ratio[] = {"1.00x", "1.09x", "1.27x", "1.44x",
  208. "1.56x", "1.68x", "1.99x", "2.34x"};
  209. static const SOC_ENUM_SINGLE_DECL(
  210. rt5631_spk_ratio_enum, RT5631_GEN_PUR_CTRL_REG,
  211. RT5631_SPK_AMP_RATIO_CTRL_SHIFT, rt5631_spk_ratio);
  212. static const struct snd_kcontrol_new rt5631_snd_controls[] = {
  213. /* MIC */
  214. SOC_ENUM("MIC1 Mode Control", rt5631_mic1_mode_enum),
  215. SOC_SINGLE_TLV("MIC1 Boost", RT5631_MIC_CTRL_2,
  216. RT5631_MIC1_BOOST_SHIFT, 8, 0, mic_bst_tlv),
  217. SOC_ENUM("MIC2 Mode Control", rt5631_mic2_mode_enum),
  218. SOC_SINGLE_TLV("MIC2 Boost", RT5631_MIC_CTRL_2,
  219. RT5631_MIC2_BOOST_SHIFT, 8, 0, mic_bst_tlv),
  220. /* MONO IN */
  221. SOC_ENUM("MONOIN Mode Control", rt5631_monoin_mode_enum),
  222. SOC_DOUBLE_TLV("MONOIN_RX Capture Volume", RT5631_MONO_INPUT_VOL,
  223. RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
  224. RT5631_VOL_MASK, 1, in_vol_tlv),
  225. /* AXI */
  226. SOC_DOUBLE_TLV("AXI Capture Volume", RT5631_AUX_IN_VOL,
  227. RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
  228. RT5631_VOL_MASK, 1, in_vol_tlv),
  229. /* DAC */
  230. SOC_DOUBLE_TLV("PCM Playback Volume", RT5631_STEREO_DAC_VOL_2,
  231. RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
  232. RT5631_DAC_VOL_MASK, 1, dac_vol_tlv),
  233. SOC_DOUBLE("PCM Playback Switch", RT5631_STEREO_DAC_VOL_1,
  234. RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
  235. /* AXO */
  236. SOC_SINGLE("AXO1 Playback Switch", RT5631_MONO_AXO_1_2_VOL,
  237. RT5631_L_MUTE_SHIFT, 1, 1),
  238. SOC_SINGLE("AXO2 Playback Switch", RT5631_MONO_AXO_1_2_VOL,
  239. RT5631_R_VOL_SHIFT, 1, 1),
  240. /* OUTVOL */
  241. SOC_DOUBLE("OUTVOL Channel Switch", RT5631_SPK_OUT_VOL,
  242. RT5631_L_EN_SHIFT, RT5631_R_EN_SHIFT, 1, 0),
  243. /* SPK */
  244. SOC_DOUBLE("Speaker Playback Switch", RT5631_SPK_OUT_VOL,
  245. RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
  246. SOC_DOUBLE_TLV("Speaker Playback Volume", RT5631_SPK_OUT_VOL,
  247. RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, 39, 1, out_vol_tlv),
  248. /* MONO OUT */
  249. SOC_SINGLE("MONO Playback Switch", RT5631_MONO_AXO_1_2_VOL,
  250. RT5631_MUTE_MONO_SHIFT, 1, 1),
  251. /* HP */
  252. SOC_DOUBLE("HP Playback Switch", RT5631_HP_OUT_VOL,
  253. RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
  254. SOC_DOUBLE_TLV("HP Playback Volume", RT5631_HP_OUT_VOL,
  255. RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
  256. RT5631_VOL_MASK, 1, out_vol_tlv),
  257. /* DMIC */
  258. SOC_SINGLE_EXT("DMIC Switch", 0, 0, 1, 0,
  259. rt5631_dmic_get, rt5631_dmic_put),
  260. SOC_DOUBLE("DMIC Capture Switch", RT5631_DIG_MIC_CTRL,
  261. RT5631_DMIC_L_CH_MUTE_SHIFT,
  262. RT5631_DMIC_R_CH_MUTE_SHIFT, 1, 1),
  263. /* SPK Ratio Gain Control */
  264. SOC_ENUM("SPK Ratio Control", rt5631_spk_ratio_enum),
  265. };
  266. static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
  267. struct snd_soc_dapm_widget *sink)
  268. {
  269. unsigned int reg;
  270. reg = snd_soc_read(source->codec, RT5631_GLOBAL_CLK_CTRL);
  271. return reg & RT5631_SYSCLK_SOUR_SEL_PLL;
  272. }
  273. static int check_dmic_used(struct snd_soc_dapm_widget *source,
  274. struct snd_soc_dapm_widget *sink)
  275. {
  276. struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(source->codec);
  277. return rt5631->dmic_used_flag;
  278. }
  279. static int check_dacl_to_outmixl(struct snd_soc_dapm_widget *source,
  280. struct snd_soc_dapm_widget *sink)
  281. {
  282. unsigned int reg;
  283. reg = snd_soc_read(source->codec, RT5631_OUTMIXER_L_CTRL);
  284. return !(reg & RT5631_M_DAC_L_TO_OUTMIXER_L);
  285. }
  286. static int check_dacr_to_outmixr(struct snd_soc_dapm_widget *source,
  287. struct snd_soc_dapm_widget *sink)
  288. {
  289. unsigned int reg;
  290. reg = snd_soc_read(source->codec, RT5631_OUTMIXER_R_CTRL);
  291. return !(reg & RT5631_M_DAC_R_TO_OUTMIXER_R);
  292. }
  293. static int check_dacl_to_spkmixl(struct snd_soc_dapm_widget *source,
  294. struct snd_soc_dapm_widget *sink)
  295. {
  296. unsigned int reg;
  297. reg = snd_soc_read(source->codec, RT5631_SPK_MIXER_CTRL);
  298. return !(reg & RT5631_M_DAC_L_TO_SPKMIXER_L);
  299. }
  300. static int check_dacr_to_spkmixr(struct snd_soc_dapm_widget *source,
  301. struct snd_soc_dapm_widget *sink)
  302. {
  303. unsigned int reg;
  304. reg = snd_soc_read(source->codec, RT5631_SPK_MIXER_CTRL);
  305. return !(reg & RT5631_M_DAC_R_TO_SPKMIXER_R);
  306. }
  307. static int check_adcl_select(struct snd_soc_dapm_widget *source,
  308. struct snd_soc_dapm_widget *sink)
  309. {
  310. unsigned int reg;
  311. reg = snd_soc_read(source->codec, RT5631_ADC_REC_MIXER);
  312. return !(reg & RT5631_M_MIC1_TO_RECMIXER_L);
  313. }
  314. static int check_adcr_select(struct snd_soc_dapm_widget *source,
  315. struct snd_soc_dapm_widget *sink)
  316. {
  317. unsigned int reg;
  318. reg = snd_soc_read(source->codec, RT5631_ADC_REC_MIXER);
  319. return !(reg & RT5631_M_MIC2_TO_RECMIXER_R);
  320. }
  321. /**
  322. * onebit_depop_power_stage - auto depop in power stage.
  323. * @enable: power on/off
  324. *
  325. * When power on/off headphone, the depop sequence is done by hardware.
  326. */
  327. static void onebit_depop_power_stage(struct snd_soc_codec *codec, int enable)
  328. {
  329. unsigned int soft_vol, hp_zc;
  330. /* enable one-bit depop function */
  331. snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
  332. RT5631_EN_ONE_BIT_DEPOP, 0);
  333. /* keep soft volume and zero crossing setting */
  334. soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
  335. snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
  336. hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
  337. snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
  338. if (enable) {
  339. /* config one-bit depop parameter */
  340. rt5631_write_index(codec, RT5631_TEST_MODE_CTRL, 0x84c0);
  341. rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x309f);
  342. rt5631_write_index(codec, RT5631_CP_INTL_REG2, 0x6530);
  343. /* power on capless block */
  344. snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2,
  345. RT5631_EN_CAP_FREE_DEPOP);
  346. } else {
  347. /* power off capless block */
  348. snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2, 0);
  349. msleep(100);
  350. }
  351. /* recover soft volume and zero crossing setting */
  352. snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
  353. snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
  354. }
  355. /**
  356. * onebit_depop_mute_stage - auto depop in mute stage.
  357. * @enable: mute/unmute
  358. *
  359. * When mute/unmute headphone, the depop sequence is done by hardware.
  360. */
  361. static void onebit_depop_mute_stage(struct snd_soc_codec *codec, int enable)
  362. {
  363. unsigned int soft_vol, hp_zc;
  364. /* enable one-bit depop function */
  365. snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
  366. RT5631_EN_ONE_BIT_DEPOP, 0);
  367. /* keep soft volume and zero crossing setting */
  368. soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
  369. snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
  370. hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
  371. snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
  372. if (enable) {
  373. schedule_timeout_uninterruptible(msecs_to_jiffies(10));
  374. /* config one-bit depop parameter */
  375. rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x307f);
  376. snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
  377. RT5631_L_MUTE | RT5631_R_MUTE, 0);
  378. msleep(300);
  379. } else {
  380. snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
  381. RT5631_L_MUTE | RT5631_R_MUTE,
  382. RT5631_L_MUTE | RT5631_R_MUTE);
  383. msleep(100);
  384. }
  385. /* recover soft volume and zero crossing setting */
  386. snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
  387. snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
  388. }
  389. /**
  390. * onebit_depop_power_stage - step by step depop sequence in power stage.
  391. * @enable: power on/off
  392. *
  393. * When power on/off headphone, the depop sequence is done in step by step.
  394. */
  395. static void depop_seq_power_stage(struct snd_soc_codec *codec, int enable)
  396. {
  397. unsigned int soft_vol, hp_zc;
  398. /* depop control by register */
  399. snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
  400. RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP);
  401. /* keep soft volume and zero crossing setting */
  402. soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
  403. snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
  404. hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
  405. snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
  406. if (enable) {
  407. /* config depop sequence parameter */
  408. rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303e);
  409. /* power on headphone and charge pump */
  410. snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
  411. RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
  412. RT5631_PWR_HP_R_AMP,
  413. RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
  414. RT5631_PWR_HP_R_AMP);
  415. /* power on soft generator and depop mode2 */
  416. snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
  417. RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP);
  418. msleep(100);
  419. /* stop depop mode */
  420. snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
  421. RT5631_PWR_HP_DEPOP_DIS, RT5631_PWR_HP_DEPOP_DIS);
  422. } else {
  423. /* config depop sequence parameter */
  424. rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303F);
  425. snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
  426. RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
  427. RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP);
  428. msleep(75);
  429. snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
  430. RT5631_POW_ON_SOFT_GEN | RT5631_PD_HPAMP_L_ST_UP |
  431. RT5631_PD_HPAMP_R_ST_UP);
  432. /* start depop mode */
  433. snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
  434. RT5631_PWR_HP_DEPOP_DIS, 0);
  435. /* config depop sequence parameter */
  436. snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
  437. RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP |
  438. RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP);
  439. msleep(80);
  440. snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
  441. RT5631_POW_ON_SOFT_GEN);
  442. /* power down headphone and charge pump */
  443. snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
  444. RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
  445. RT5631_PWR_HP_R_AMP, 0);
  446. }
  447. /* recover soft volume and zero crossing setting */
  448. snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
  449. snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
  450. }
  451. /**
  452. * depop_seq_mute_stage - step by step depop sequence in mute stage.
  453. * @enable: mute/unmute
  454. *
  455. * When mute/unmute headphone, the depop sequence is done in step by step.
  456. */
  457. static void depop_seq_mute_stage(struct snd_soc_codec *codec, int enable)
  458. {
  459. unsigned int soft_vol, hp_zc;
  460. /* depop control by register */
  461. snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
  462. RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP);
  463. /* keep soft volume and zero crossing setting */
  464. soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
  465. snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
  466. hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
  467. snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
  468. if (enable) {
  469. schedule_timeout_uninterruptible(msecs_to_jiffies(10));
  470. /* config depop sequence parameter */
  471. rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
  472. snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
  473. RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
  474. RT5631_EN_HP_R_M_UN_MUTE_DEPOP |
  475. RT5631_EN_HP_L_M_UN_MUTE_DEPOP);
  476. snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
  477. RT5631_L_MUTE | RT5631_R_MUTE, 0);
  478. msleep(160);
  479. } else {
  480. /* config depop sequence parameter */
  481. rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
  482. snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
  483. RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
  484. RT5631_EN_HP_R_M_UN_MUTE_DEPOP |
  485. RT5631_EN_HP_L_M_UN_MUTE_DEPOP);
  486. snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
  487. RT5631_L_MUTE | RT5631_R_MUTE,
  488. RT5631_L_MUTE | RT5631_R_MUTE);
  489. msleep(150);
  490. }
  491. /* recover soft volume and zero crossing setting */
  492. snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
  493. snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
  494. }
  495. static int hp_event(struct snd_soc_dapm_widget *w,
  496. struct snd_kcontrol *kcontrol, int event)
  497. {
  498. struct snd_soc_codec *codec = w->codec;
  499. struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
  500. switch (event) {
  501. case SND_SOC_DAPM_PRE_PMD:
  502. if (rt5631->codec_version) {
  503. onebit_depop_mute_stage(codec, 0);
  504. onebit_depop_power_stage(codec, 0);
  505. } else {
  506. depop_seq_mute_stage(codec, 0);
  507. depop_seq_power_stage(codec, 0);
  508. }
  509. break;
  510. case SND_SOC_DAPM_POST_PMU:
  511. if (rt5631->codec_version) {
  512. onebit_depop_power_stage(codec, 1);
  513. onebit_depop_mute_stage(codec, 1);
  514. } else {
  515. depop_seq_power_stage(codec, 1);
  516. depop_seq_mute_stage(codec, 1);
  517. }
  518. break;
  519. default:
  520. break;
  521. }
  522. return 0;
  523. }
  524. static int set_dmic_params(struct snd_soc_dapm_widget *w,
  525. struct snd_kcontrol *kcontrol, int event)
  526. {
  527. struct snd_soc_codec *codec = w->codec;
  528. struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
  529. switch (rt5631->rx_rate) {
  530. case 44100:
  531. case 48000:
  532. snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
  533. RT5631_DMIC_CLK_CTRL_MASK,
  534. RT5631_DMIC_CLK_CTRL_TO_32FS);
  535. break;
  536. case 32000:
  537. case 22050:
  538. snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
  539. RT5631_DMIC_CLK_CTRL_MASK,
  540. RT5631_DMIC_CLK_CTRL_TO_64FS);
  541. break;
  542. case 16000:
  543. case 11025:
  544. case 8000:
  545. snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
  546. RT5631_DMIC_CLK_CTRL_MASK,
  547. RT5631_DMIC_CLK_CTRL_TO_128FS);
  548. break;
  549. default:
  550. return -EINVAL;
  551. }
  552. return 0;
  553. }
  554. static const struct snd_kcontrol_new rt5631_recmixl_mixer_controls[] = {
  555. SOC_DAPM_SINGLE("OUTMIXL Capture Switch", RT5631_ADC_REC_MIXER,
  556. RT5631_M_OUTMIXL_RECMIXL_BIT, 1, 1),
  557. SOC_DAPM_SINGLE("MIC1_BST1 Capture Switch", RT5631_ADC_REC_MIXER,
  558. RT5631_M_MIC1_RECMIXL_BIT, 1, 1),
  559. SOC_DAPM_SINGLE("AXILVOL Capture Switch", RT5631_ADC_REC_MIXER,
  560. RT5631_M_AXIL_RECMIXL_BIT, 1, 1),
  561. SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER,
  562. RT5631_M_MONO_IN_RECMIXL_BIT, 1, 1),
  563. };
  564. static const struct snd_kcontrol_new rt5631_recmixr_mixer_controls[] = {
  565. SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER,
  566. RT5631_M_MONO_IN_RECMIXR_BIT, 1, 1),
  567. SOC_DAPM_SINGLE("AXIRVOL Capture Switch", RT5631_ADC_REC_MIXER,
  568. RT5631_M_AXIR_RECMIXR_BIT, 1, 1),
  569. SOC_DAPM_SINGLE("MIC2_BST2 Capture Switch", RT5631_ADC_REC_MIXER,
  570. RT5631_M_MIC2_RECMIXR_BIT, 1, 1),
  571. SOC_DAPM_SINGLE("OUTMIXR Capture Switch", RT5631_ADC_REC_MIXER,
  572. RT5631_M_OUTMIXR_RECMIXR_BIT, 1, 1),
  573. };
  574. static const struct snd_kcontrol_new rt5631_spkmixl_mixer_controls[] = {
  575. SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_SPK_MIXER_CTRL,
  576. RT5631_M_RECMIXL_SPKMIXL_BIT, 1, 1),
  577. SOC_DAPM_SINGLE("MIC1_P Playback Switch", RT5631_SPK_MIXER_CTRL,
  578. RT5631_M_MIC1P_SPKMIXL_BIT, 1, 1),
  579. SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_SPK_MIXER_CTRL,
  580. RT5631_M_DACL_SPKMIXL_BIT, 1, 1),
  581. SOC_DAPM_SINGLE("OUTMIXL Playback Switch", RT5631_SPK_MIXER_CTRL,
  582. RT5631_M_OUTMIXL_SPKMIXL_BIT, 1, 1),
  583. };
  584. static const struct snd_kcontrol_new rt5631_spkmixr_mixer_controls[] = {
  585. SOC_DAPM_SINGLE("OUTMIXR Playback Switch", RT5631_SPK_MIXER_CTRL,
  586. RT5631_M_OUTMIXR_SPKMIXR_BIT, 1, 1),
  587. SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_SPK_MIXER_CTRL,
  588. RT5631_M_DACR_SPKMIXR_BIT, 1, 1),
  589. SOC_DAPM_SINGLE("MIC2_P Playback Switch", RT5631_SPK_MIXER_CTRL,
  590. RT5631_M_MIC2P_SPKMIXR_BIT, 1, 1),
  591. SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_SPK_MIXER_CTRL,
  592. RT5631_M_RECMIXR_SPKMIXR_BIT, 1, 1),
  593. };
  594. static const struct snd_kcontrol_new rt5631_outmixl_mixer_controls[] = {
  595. SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_L_CTRL,
  596. RT5631_M_RECMIXL_OUTMIXL_BIT, 1, 1),
  597. SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_L_CTRL,
  598. RT5631_M_RECMIXR_OUTMIXL_BIT, 1, 1),
  599. SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_OUTMIXER_L_CTRL,
  600. RT5631_M_DACL_OUTMIXL_BIT, 1, 1),
  601. SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_L_CTRL,
  602. RT5631_M_MIC1_OUTMIXL_BIT, 1, 1),
  603. SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_L_CTRL,
  604. RT5631_M_MIC2_OUTMIXL_BIT, 1, 1),
  605. SOC_DAPM_SINGLE("MONOIN_RXP Playback Switch", RT5631_OUTMIXER_L_CTRL,
  606. RT5631_M_MONO_INP_OUTMIXL_BIT, 1, 1),
  607. SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_L_CTRL,
  608. RT5631_M_AXIL_OUTMIXL_BIT, 1, 1),
  609. SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_L_CTRL,
  610. RT5631_M_AXIR_OUTMIXL_BIT, 1, 1),
  611. SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_L_CTRL,
  612. RT5631_M_VDAC_OUTMIXL_BIT, 1, 1),
  613. };
  614. static const struct snd_kcontrol_new rt5631_outmixr_mixer_controls[] = {
  615. SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_R_CTRL,
  616. RT5631_M_VDAC_OUTMIXR_BIT, 1, 1),
  617. SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_R_CTRL,
  618. RT5631_M_AXIR_OUTMIXR_BIT, 1, 1),
  619. SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_R_CTRL,
  620. RT5631_M_AXIL_OUTMIXR_BIT, 1, 1),
  621. SOC_DAPM_SINGLE("MONOIN_RXN Playback Switch", RT5631_OUTMIXER_R_CTRL,
  622. RT5631_M_MONO_INN_OUTMIXR_BIT, 1, 1),
  623. SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_R_CTRL,
  624. RT5631_M_MIC2_OUTMIXR_BIT, 1, 1),
  625. SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_R_CTRL,
  626. RT5631_M_MIC1_OUTMIXR_BIT, 1, 1),
  627. SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_OUTMIXER_R_CTRL,
  628. RT5631_M_DACR_OUTMIXR_BIT, 1, 1),
  629. SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_R_CTRL,
  630. RT5631_M_RECMIXR_OUTMIXR_BIT, 1, 1),
  631. SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_R_CTRL,
  632. RT5631_M_RECMIXL_OUTMIXR_BIT, 1, 1),
  633. };
  634. static const struct snd_kcontrol_new rt5631_AXO1MIX_mixer_controls[] = {
  635. SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO1MIXER_CTRL,
  636. RT5631_M_MIC1_AXO1MIX_BIT , 1, 1),
  637. SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO1MIXER_CTRL,
  638. RT5631_M_MIC2_AXO1MIX_BIT, 1, 1),
  639. SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO1MIXER_CTRL,
  640. RT5631_M_OUTMIXL_AXO1MIX_BIT , 1 , 1),
  641. SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO1MIXER_CTRL,
  642. RT5631_M_OUTMIXR_AXO1MIX_BIT, 1, 1),
  643. };
  644. static const struct snd_kcontrol_new rt5631_AXO2MIX_mixer_controls[] = {
  645. SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO2MIXER_CTRL,
  646. RT5631_M_MIC1_AXO2MIX_BIT, 1, 1),
  647. SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO2MIXER_CTRL,
  648. RT5631_M_MIC2_AXO2MIX_BIT, 1, 1),
  649. SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO2MIXER_CTRL,
  650. RT5631_M_OUTMIXL_AXO2MIX_BIT, 1, 1),
  651. SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO2MIXER_CTRL,
  652. RT5631_M_OUTMIXR_AXO2MIX_BIT, 1 , 1),
  653. };
  654. static const struct snd_kcontrol_new rt5631_spolmix_mixer_controls[] = {
  655. SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
  656. RT5631_M_SPKVOLL_SPOLMIX_BIT, 1, 1),
  657. SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
  658. RT5631_M_SPKVOLR_SPOLMIX_BIT, 1, 1),
  659. };
  660. static const struct snd_kcontrol_new rt5631_spormix_mixer_controls[] = {
  661. SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
  662. RT5631_M_SPKVOLL_SPORMIX_BIT, 1, 1),
  663. SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
  664. RT5631_M_SPKVOLR_SPORMIX_BIT, 1, 1),
  665. };
  666. static const struct snd_kcontrol_new rt5631_monomix_mixer_controls[] = {
  667. SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
  668. RT5631_M_OUTVOLL_MONOMIX_BIT, 1, 1),
  669. SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
  670. RT5631_M_OUTVOLR_MONOMIX_BIT, 1, 1),
  671. };
  672. /* Left SPK Volume Input */
  673. static const char *rt5631_spkvoll_sel[] = {"Vmid", "SPKMIXL"};
  674. static const SOC_ENUM_SINGLE_DECL(
  675. rt5631_spkvoll_enum, RT5631_SPK_OUT_VOL,
  676. RT5631_L_EN_SHIFT, rt5631_spkvoll_sel);
  677. static const struct snd_kcontrol_new rt5631_spkvoll_mux_control =
  678. SOC_DAPM_ENUM("Left SPKVOL SRC", rt5631_spkvoll_enum);
  679. /* Left HP Volume Input */
  680. static const char *rt5631_hpvoll_sel[] = {"Vmid", "OUTMIXL"};
  681. static const SOC_ENUM_SINGLE_DECL(
  682. rt5631_hpvoll_enum, RT5631_HP_OUT_VOL,
  683. RT5631_L_EN_SHIFT, rt5631_hpvoll_sel);
  684. static const struct snd_kcontrol_new rt5631_hpvoll_mux_control =
  685. SOC_DAPM_ENUM("Left HPVOL SRC", rt5631_hpvoll_enum);
  686. /* Left Out Volume Input */
  687. static const char *rt5631_outvoll_sel[] = {"Vmid", "OUTMIXL"};
  688. static const SOC_ENUM_SINGLE_DECL(
  689. rt5631_outvoll_enum, RT5631_MONO_AXO_1_2_VOL,
  690. RT5631_L_EN_SHIFT, rt5631_outvoll_sel);
  691. static const struct snd_kcontrol_new rt5631_outvoll_mux_control =
  692. SOC_DAPM_ENUM("Left OUTVOL SRC", rt5631_outvoll_enum);
  693. /* Right Out Volume Input */
  694. static const char *rt5631_outvolr_sel[] = {"Vmid", "OUTMIXR"};
  695. static const SOC_ENUM_SINGLE_DECL(
  696. rt5631_outvolr_enum, RT5631_MONO_AXO_1_2_VOL,
  697. RT5631_R_EN_SHIFT, rt5631_outvolr_sel);
  698. static const struct snd_kcontrol_new rt5631_outvolr_mux_control =
  699. SOC_DAPM_ENUM("Right OUTVOL SRC", rt5631_outvolr_enum);
  700. /* Right HP Volume Input */
  701. static const char *rt5631_hpvolr_sel[] = {"Vmid", "OUTMIXR"};
  702. static const SOC_ENUM_SINGLE_DECL(
  703. rt5631_hpvolr_enum, RT5631_HP_OUT_VOL,
  704. RT5631_R_EN_SHIFT, rt5631_hpvolr_sel);
  705. static const struct snd_kcontrol_new rt5631_hpvolr_mux_control =
  706. SOC_DAPM_ENUM("Right HPVOL SRC", rt5631_hpvolr_enum);
  707. /* Right SPK Volume Input */
  708. static const char *rt5631_spkvolr_sel[] = {"Vmid", "SPKMIXR"};
  709. static const SOC_ENUM_SINGLE_DECL(
  710. rt5631_spkvolr_enum, RT5631_SPK_OUT_VOL,
  711. RT5631_R_EN_SHIFT, rt5631_spkvolr_sel);
  712. static const struct snd_kcontrol_new rt5631_spkvolr_mux_control =
  713. SOC_DAPM_ENUM("Right SPKVOL SRC", rt5631_spkvolr_enum);
  714. /* SPO Left Channel Input */
  715. static const char *rt5631_spol_src_sel[] = {
  716. "SPOLMIX", "MONOIN_RX", "VDAC", "DACL"};
  717. static const SOC_ENUM_SINGLE_DECL(
  718. rt5631_spol_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
  719. RT5631_SPK_L_MUX_SEL_SHIFT, rt5631_spol_src_sel);
  720. static const struct snd_kcontrol_new rt5631_spol_mux_control =
  721. SOC_DAPM_ENUM("SPOL SRC", rt5631_spol_src_enum);
  722. /* SPO Right Channel Input */
  723. static const char *rt5631_spor_src_sel[] = {
  724. "SPORMIX", "MONOIN_RX", "VDAC", "DACR"};
  725. static const SOC_ENUM_SINGLE_DECL(
  726. rt5631_spor_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
  727. RT5631_SPK_R_MUX_SEL_SHIFT, rt5631_spor_src_sel);
  728. static const struct snd_kcontrol_new rt5631_spor_mux_control =
  729. SOC_DAPM_ENUM("SPOR SRC", rt5631_spor_src_enum);
  730. /* MONO Input */
  731. static const char *rt5631_mono_src_sel[] = {"MONOMIX", "MONOIN_RX", "VDAC"};
  732. static const SOC_ENUM_SINGLE_DECL(
  733. rt5631_mono_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
  734. RT5631_MONO_MUX_SEL_SHIFT, rt5631_mono_src_sel);
  735. static const struct snd_kcontrol_new rt5631_mono_mux_control =
  736. SOC_DAPM_ENUM("MONO SRC", rt5631_mono_src_enum);
  737. /* Left HPO Input */
  738. static const char *rt5631_hpl_src_sel[] = {"Left HPVOL", "Left DAC"};
  739. static const SOC_ENUM_SINGLE_DECL(
  740. rt5631_hpl_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
  741. RT5631_HP_L_MUX_SEL_SHIFT, rt5631_hpl_src_sel);
  742. static const struct snd_kcontrol_new rt5631_hpl_mux_control =
  743. SOC_DAPM_ENUM("HPL SRC", rt5631_hpl_src_enum);
  744. /* Right HPO Input */
  745. static const char *rt5631_hpr_src_sel[] = {"Right HPVOL", "Right DAC"};
  746. static const SOC_ENUM_SINGLE_DECL(
  747. rt5631_hpr_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
  748. RT5631_HP_R_MUX_SEL_SHIFT, rt5631_hpr_src_sel);
  749. static const struct snd_kcontrol_new rt5631_hpr_mux_control =
  750. SOC_DAPM_ENUM("HPR SRC", rt5631_hpr_src_enum);
  751. static const struct snd_soc_dapm_widget rt5631_dapm_widgets[] = {
  752. /* Vmid */
  753. SND_SOC_DAPM_VMID("Vmid"),
  754. /* PLL1 */
  755. SND_SOC_DAPM_SUPPLY("PLL1", RT5631_PWR_MANAG_ADD2,
  756. RT5631_PWR_PLL1_BIT, 0, NULL, 0),
  757. /* Input Side */
  758. /* Input Lines */
  759. SND_SOC_DAPM_INPUT("MIC1"),
  760. SND_SOC_DAPM_INPUT("MIC2"),
  761. SND_SOC_DAPM_INPUT("AXIL"),
  762. SND_SOC_DAPM_INPUT("AXIR"),
  763. SND_SOC_DAPM_INPUT("MONOIN_RXN"),
  764. SND_SOC_DAPM_INPUT("MONOIN_RXP"),
  765. SND_SOC_DAPM_INPUT("DMIC"),
  766. /* MICBIAS */
  767. SND_SOC_DAPM_MICBIAS("MIC Bias1", RT5631_PWR_MANAG_ADD2,
  768. RT5631_PWR_MICBIAS1_VOL_BIT, 0),
  769. SND_SOC_DAPM_MICBIAS("MIC Bias2", RT5631_PWR_MANAG_ADD2,
  770. RT5631_PWR_MICBIAS2_VOL_BIT, 0),
  771. /* Boost */
  772. SND_SOC_DAPM_PGA("MIC1 Boost", RT5631_PWR_MANAG_ADD2,
  773. RT5631_PWR_MIC1_BOOT_GAIN_BIT, 0, NULL, 0),
  774. SND_SOC_DAPM_PGA("MIC2 Boost", RT5631_PWR_MANAG_ADD2,
  775. RT5631_PWR_MIC2_BOOT_GAIN_BIT, 0, NULL, 0),
  776. SND_SOC_DAPM_PGA("MONOIN_RXP Boost", RT5631_PWR_MANAG_ADD4,
  777. RT5631_PWR_MONO_IN_P_VOL_BIT, 0, NULL, 0),
  778. SND_SOC_DAPM_PGA("MONOIN_RXN Boost", RT5631_PWR_MANAG_ADD4,
  779. RT5631_PWR_MONO_IN_N_VOL_BIT, 0, NULL, 0),
  780. SND_SOC_DAPM_PGA("AXIL Boost", RT5631_PWR_MANAG_ADD4,
  781. RT5631_PWR_AXIL_IN_VOL_BIT, 0, NULL, 0),
  782. SND_SOC_DAPM_PGA("AXIR Boost", RT5631_PWR_MANAG_ADD4,
  783. RT5631_PWR_AXIR_IN_VOL_BIT, 0, NULL, 0),
  784. /* MONO In */
  785. SND_SOC_DAPM_MIXER("MONO_IN", SND_SOC_NOPM, 0, 0, NULL, 0),
  786. /* REC Mixer */
  787. SND_SOC_DAPM_MIXER("RECMIXL Mixer", RT5631_PWR_MANAG_ADD2,
  788. RT5631_PWR_RECMIXER_L_BIT, 0,
  789. &rt5631_recmixl_mixer_controls[0],
  790. ARRAY_SIZE(rt5631_recmixl_mixer_controls)),
  791. SND_SOC_DAPM_MIXER("RECMIXR Mixer", RT5631_PWR_MANAG_ADD2,
  792. RT5631_PWR_RECMIXER_R_BIT, 0,
  793. &rt5631_recmixr_mixer_controls[0],
  794. ARRAY_SIZE(rt5631_recmixr_mixer_controls)),
  795. /* Because of record duplication for L/R channel,
  796. * L/R ADCs need power up at the same time */
  797. SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
  798. /* DMIC */
  799. SND_SOC_DAPM_SUPPLY("DMIC Supply", RT5631_DIG_MIC_CTRL,
  800. RT5631_DMIC_ENA_SHIFT, 0,
  801. set_dmic_params, SND_SOC_DAPM_PRE_PMU),
  802. /* ADC Data Srouce */
  803. SND_SOC_DAPM_SUPPLY("Left ADC Select", RT5631_INT_ST_IRQ_CTRL_2,
  804. RT5631_ADC_DATA_SEL_MIC1_SHIFT, 0, NULL, 0),
  805. SND_SOC_DAPM_SUPPLY("Right ADC Select", RT5631_INT_ST_IRQ_CTRL_2,
  806. RT5631_ADC_DATA_SEL_MIC2_SHIFT, 0, NULL, 0),
  807. /* ADCs */
  808. SND_SOC_DAPM_ADC("Left ADC", "HIFI Capture",
  809. RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_L_CLK_BIT, 0),
  810. SND_SOC_DAPM_ADC("Right ADC", "HIFI Capture",
  811. RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_R_CLK_BIT, 0),
  812. /* DAC and ADC supply power */
  813. SND_SOC_DAPM_SUPPLY("I2S", RT5631_PWR_MANAG_ADD1,
  814. RT5631_PWR_MAIN_I2S_BIT, 0, NULL, 0),
  815. SND_SOC_DAPM_SUPPLY("DAC REF", RT5631_PWR_MANAG_ADD1,
  816. RT5631_PWR_DAC_REF_BIT, 0, NULL, 0),
  817. /* Output Side */
  818. /* DACs */
  819. SND_SOC_DAPM_DAC("Left DAC", "HIFI Playback",
  820. RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_L_CLK_BIT, 0),
  821. SND_SOC_DAPM_DAC("Right DAC", "HIFI Playback",
  822. RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_R_CLK_BIT, 0),
  823. SND_SOC_DAPM_DAC("Voice DAC", "Voice DAC Mono Playback",
  824. SND_SOC_NOPM, 0, 0),
  825. SND_SOC_DAPM_PGA("Voice DAC Boost", SND_SOC_NOPM, 0, 0, NULL, 0),
  826. /* DAC supply power */
  827. SND_SOC_DAPM_SUPPLY("Left DAC To Mixer", RT5631_PWR_MANAG_ADD1,
  828. RT5631_PWR_DAC_L_TO_MIXER_BIT, 0, NULL, 0),
  829. SND_SOC_DAPM_SUPPLY("Right DAC To Mixer", RT5631_PWR_MANAG_ADD1,
  830. RT5631_PWR_DAC_R_TO_MIXER_BIT, 0, NULL, 0),
  831. /* Left SPK Mixer */
  832. SND_SOC_DAPM_MIXER("SPKMIXL Mixer", RT5631_PWR_MANAG_ADD2,
  833. RT5631_PWR_SPKMIXER_L_BIT, 0,
  834. &rt5631_spkmixl_mixer_controls[0],
  835. ARRAY_SIZE(rt5631_spkmixl_mixer_controls)),
  836. /* Left Out Mixer */
  837. SND_SOC_DAPM_MIXER("OUTMIXL Mixer", RT5631_PWR_MANAG_ADD2,
  838. RT5631_PWR_OUTMIXER_L_BIT, 0,
  839. &rt5631_outmixl_mixer_controls[0],
  840. ARRAY_SIZE(rt5631_outmixl_mixer_controls)),
  841. /* Right Out Mixer */
  842. SND_SOC_DAPM_MIXER("OUTMIXR Mixer", RT5631_PWR_MANAG_ADD2,
  843. RT5631_PWR_OUTMIXER_R_BIT, 0,
  844. &rt5631_outmixr_mixer_controls[0],
  845. ARRAY_SIZE(rt5631_outmixr_mixer_controls)),
  846. /* Right SPK Mixer */
  847. SND_SOC_DAPM_MIXER("SPKMIXR Mixer", RT5631_PWR_MANAG_ADD2,
  848. RT5631_PWR_SPKMIXER_R_BIT, 0,
  849. &rt5631_spkmixr_mixer_controls[0],
  850. ARRAY_SIZE(rt5631_spkmixr_mixer_controls)),
  851. /* Volume Mux */
  852. SND_SOC_DAPM_MUX("Left SPKVOL Mux", RT5631_PWR_MANAG_ADD4,
  853. RT5631_PWR_SPK_L_VOL_BIT, 0,
  854. &rt5631_spkvoll_mux_control),
  855. SND_SOC_DAPM_MUX("Left HPVOL Mux", RT5631_PWR_MANAG_ADD4,
  856. RT5631_PWR_HP_L_OUT_VOL_BIT, 0,
  857. &rt5631_hpvoll_mux_control),
  858. SND_SOC_DAPM_MUX("Left OUTVOL Mux", RT5631_PWR_MANAG_ADD4,
  859. RT5631_PWR_LOUT_VOL_BIT, 0,
  860. &rt5631_outvoll_mux_control),
  861. SND_SOC_DAPM_MUX("Right OUTVOL Mux", RT5631_PWR_MANAG_ADD4,
  862. RT5631_PWR_ROUT_VOL_BIT, 0,
  863. &rt5631_outvolr_mux_control),
  864. SND_SOC_DAPM_MUX("Right HPVOL Mux", RT5631_PWR_MANAG_ADD4,
  865. RT5631_PWR_HP_R_OUT_VOL_BIT, 0,
  866. &rt5631_hpvolr_mux_control),
  867. SND_SOC_DAPM_MUX("Right SPKVOL Mux", RT5631_PWR_MANAG_ADD4,
  868. RT5631_PWR_SPK_R_VOL_BIT, 0,
  869. &rt5631_spkvolr_mux_control),
  870. /* DAC To HP */
  871. SND_SOC_DAPM_PGA_S("Left DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0),
  872. SND_SOC_DAPM_PGA_S("Right DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0),
  873. /* HP Depop */
  874. SND_SOC_DAPM_PGA_S("HP Depop", 1, SND_SOC_NOPM, 0, 0,
  875. hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  876. /* AXO1 Mixer */
  877. SND_SOC_DAPM_MIXER("AXO1MIX Mixer", RT5631_PWR_MANAG_ADD3,
  878. RT5631_PWR_AXO1MIXER_BIT, 0,
  879. &rt5631_AXO1MIX_mixer_controls[0],
  880. ARRAY_SIZE(rt5631_AXO1MIX_mixer_controls)),
  881. /* SPOL Mixer */
  882. SND_SOC_DAPM_MIXER("SPOLMIX Mixer", SND_SOC_NOPM, 0, 0,
  883. &rt5631_spolmix_mixer_controls[0],
  884. ARRAY_SIZE(rt5631_spolmix_mixer_controls)),
  885. /* MONO Mixer */
  886. SND_SOC_DAPM_MIXER("MONOMIX Mixer", RT5631_PWR_MANAG_ADD3,
  887. RT5631_PWR_MONOMIXER_BIT, 0,
  888. &rt5631_monomix_mixer_controls[0],
  889. ARRAY_SIZE(rt5631_monomix_mixer_controls)),
  890. /* SPOR Mixer */
  891. SND_SOC_DAPM_MIXER("SPORMIX Mixer", SND_SOC_NOPM, 0, 0,
  892. &rt5631_spormix_mixer_controls[0],
  893. ARRAY_SIZE(rt5631_spormix_mixer_controls)),
  894. /* AXO2 Mixer */
  895. SND_SOC_DAPM_MIXER("AXO2MIX Mixer", RT5631_PWR_MANAG_ADD3,
  896. RT5631_PWR_AXO2MIXER_BIT, 0,
  897. &rt5631_AXO2MIX_mixer_controls[0],
  898. ARRAY_SIZE(rt5631_AXO2MIX_mixer_controls)),
  899. /* Mux */
  900. SND_SOC_DAPM_MUX("SPOL Mux", SND_SOC_NOPM, 0, 0,
  901. &rt5631_spol_mux_control),
  902. SND_SOC_DAPM_MUX("SPOR Mux", SND_SOC_NOPM, 0, 0,
  903. &rt5631_spor_mux_control),
  904. SND_SOC_DAPM_MUX("MONO Mux", SND_SOC_NOPM, 0, 0,
  905. &rt5631_mono_mux_control),
  906. SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0,
  907. &rt5631_hpl_mux_control),
  908. SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0,
  909. &rt5631_hpr_mux_control),
  910. /* AMP supply */
  911. SND_SOC_DAPM_SUPPLY("MONO Depop", RT5631_PWR_MANAG_ADD3,
  912. RT5631_PWR_MONO_DEPOP_DIS_BIT, 0, NULL, 0),
  913. SND_SOC_DAPM_SUPPLY("Class D", RT5631_PWR_MANAG_ADD1,
  914. RT5631_PWR_CLASS_D_BIT, 0, NULL, 0),
  915. /* Output Lines */
  916. SND_SOC_DAPM_OUTPUT("AUXO1"),
  917. SND_SOC_DAPM_OUTPUT("AUXO2"),
  918. SND_SOC_DAPM_OUTPUT("SPOL"),
  919. SND_SOC_DAPM_OUTPUT("SPOR"),
  920. SND_SOC_DAPM_OUTPUT("HPOL"),
  921. SND_SOC_DAPM_OUTPUT("HPOR"),
  922. SND_SOC_DAPM_OUTPUT("MONO"),
  923. };
  924. static const struct snd_soc_dapm_route rt5631_dapm_routes[] = {
  925. {"MIC1 Boost", NULL, "MIC1"},
  926. {"MIC2 Boost", NULL, "MIC2"},
  927. {"MONOIN_RXP Boost", NULL, "MONOIN_RXP"},
  928. {"MONOIN_RXN Boost", NULL, "MONOIN_RXN"},
  929. {"AXIL Boost", NULL, "AXIL"},
  930. {"AXIR Boost", NULL, "AXIR"},
  931. {"MONO_IN", NULL, "MONOIN_RXP Boost"},
  932. {"MONO_IN", NULL, "MONOIN_RXN Boost"},
  933. {"RECMIXL Mixer", "OUTMIXL Capture Switch", "OUTMIXL Mixer"},
  934. {"RECMIXL Mixer", "MIC1_BST1 Capture Switch", "MIC1 Boost"},
  935. {"RECMIXL Mixer", "AXILVOL Capture Switch", "AXIL Boost"},
  936. {"RECMIXL Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
  937. {"RECMIXR Mixer", "OUTMIXR Capture Switch", "OUTMIXR Mixer"},
  938. {"RECMIXR Mixer", "MIC2_BST2 Capture Switch", "MIC2 Boost"},
  939. {"RECMIXR Mixer", "AXIRVOL Capture Switch", "AXIR Boost"},
  940. {"RECMIXR Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
  941. {"ADC Mixer", NULL, "RECMIXL Mixer"},
  942. {"ADC Mixer", NULL, "RECMIXR Mixer"},
  943. {"Left ADC", NULL, "ADC Mixer"},
  944. {"Left ADC", NULL, "Left ADC Select", check_adcl_select},
  945. {"Left ADC", NULL, "PLL1", check_sysclk1_source},
  946. {"Left ADC", NULL, "I2S"},
  947. {"Left ADC", NULL, "DAC REF"},
  948. {"Right ADC", NULL, "ADC Mixer"},
  949. {"Right ADC", NULL, "Right ADC Select", check_adcr_select},
  950. {"Right ADC", NULL, "PLL1", check_sysclk1_source},
  951. {"Right ADC", NULL, "I2S"},
  952. {"Right ADC", NULL, "DAC REF"},
  953. {"DMIC", NULL, "DMIC Supply", check_dmic_used},
  954. {"Left ADC", NULL, "DMIC"},
  955. {"Right ADC", NULL, "DMIC"},
  956. {"Left DAC", NULL, "PLL1", check_sysclk1_source},
  957. {"Left DAC", NULL, "I2S"},
  958. {"Left DAC", NULL, "DAC REF"},
  959. {"Right DAC", NULL, "PLL1", check_sysclk1_source},
  960. {"Right DAC", NULL, "I2S"},
  961. {"Right DAC", NULL, "DAC REF"},
  962. {"Voice DAC Boost", NULL, "Voice DAC"},
  963. {"SPKMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_spkmixl},
  964. {"SPKMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
  965. {"SPKMIXL Mixer", "MIC1_P Playback Switch", "MIC1"},
  966. {"SPKMIXL Mixer", "DACL Playback Switch", "Left DAC"},
  967. {"SPKMIXL Mixer", "OUTMIXL Playback Switch", "OUTMIXL Mixer"},
  968. {"SPKMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_spkmixr},
  969. {"SPKMIXR Mixer", "OUTMIXR Playback Switch", "OUTMIXR Mixer"},
  970. {"SPKMIXR Mixer", "DACR Playback Switch", "Right DAC"},
  971. {"SPKMIXR Mixer", "MIC2_P Playback Switch", "MIC2"},
  972. {"SPKMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
  973. {"OUTMIXL Mixer", NULL, "Left DAC To Mixer", check_dacl_to_outmixl},
  974. {"OUTMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
  975. {"OUTMIXL Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
  976. {"OUTMIXL Mixer", "DACL Playback Switch", "Left DAC"},
  977. {"OUTMIXL Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
  978. {"OUTMIXL Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
  979. {"OUTMIXL Mixer", "MONOIN_RXP Playback Switch", "MONOIN_RXP Boost"},
  980. {"OUTMIXL Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
  981. {"OUTMIXL Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
  982. {"OUTMIXL Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
  983. {"OUTMIXR Mixer", NULL, "Right DAC To Mixer", check_dacr_to_outmixr},
  984. {"OUTMIXR Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
  985. {"OUTMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
  986. {"OUTMIXR Mixer", "DACR Playback Switch", "Right DAC"},
  987. {"OUTMIXR Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
  988. {"OUTMIXR Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
  989. {"OUTMIXR Mixer", "MONOIN_RXN Playback Switch", "MONOIN_RXN Boost"},
  990. {"OUTMIXR Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
  991. {"OUTMIXR Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
  992. {"OUTMIXR Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
  993. {"Left SPKVOL Mux", "SPKMIXL", "SPKMIXL Mixer"},
  994. {"Left SPKVOL Mux", "Vmid", "Vmid"},
  995. {"Left HPVOL Mux", "OUTMIXL", "OUTMIXL Mixer"},
  996. {"Left HPVOL Mux", "Vmid", "Vmid"},
  997. {"Left OUTVOL Mux", "OUTMIXL", "OUTMIXL Mixer"},
  998. {"Left OUTVOL Mux", "Vmid", "Vmid"},
  999. {"Right OUTVOL Mux", "OUTMIXR", "OUTMIXR Mixer"},
  1000. {"Right OUTVOL Mux", "Vmid", "Vmid"},
  1001. {"Right HPVOL Mux", "OUTMIXR", "OUTMIXR Mixer"},
  1002. {"Right HPVOL Mux", "Vmid", "Vmid"},
  1003. {"Right SPKVOL Mux", "SPKMIXR", "SPKMIXR Mixer"},
  1004. {"Right SPKVOL Mux", "Vmid", "Vmid"},
  1005. {"AXO1MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
  1006. {"AXO1MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
  1007. {"AXO1MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
  1008. {"AXO1MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
  1009. {"AXO2MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
  1010. {"AXO2MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
  1011. {"AXO2MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
  1012. {"AXO2MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
  1013. {"SPOLMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"},
  1014. {"SPOLMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"},
  1015. {"SPORMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"},
  1016. {"SPORMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"},
  1017. {"MONOMIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
  1018. {"MONOMIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
  1019. {"SPOL Mux", "SPOLMIX", "SPOLMIX Mixer"},
  1020. {"SPOL Mux", "MONOIN_RX", "MONO_IN"},
  1021. {"SPOL Mux", "VDAC", "Voice DAC Boost"},
  1022. {"SPOL Mux", "DACL", "Left DAC"},
  1023. {"SPOR Mux", "SPORMIX", "SPORMIX Mixer"},
  1024. {"SPOR Mux", "MONOIN_RX", "MONO_IN"},
  1025. {"SPOR Mux", "VDAC", "Voice DAC Boost"},
  1026. {"SPOR Mux", "DACR", "Right DAC"},
  1027. {"MONO Mux", "MONOMIX", "MONOMIX Mixer"},
  1028. {"MONO Mux", "MONOIN_RX", "MONO_IN"},
  1029. {"MONO Mux", "VDAC", "Voice DAC Boost"},
  1030. {"Right DAC_HP", NULL, "Right DAC"},
  1031. {"Left DAC_HP", NULL, "Left DAC"},
  1032. {"HPL Mux", "Left HPVOL", "Left HPVOL Mux"},
  1033. {"HPL Mux", "Left DAC", "Left DAC_HP"},
  1034. {"HPR Mux", "Right HPVOL", "Right HPVOL Mux"},
  1035. {"HPR Mux", "Right DAC", "Right DAC_HP"},
  1036. {"HP Depop", NULL, "HPL Mux"},
  1037. {"HP Depop", NULL, "HPR Mux"},
  1038. {"AUXO1", NULL, "AXO1MIX Mixer"},
  1039. {"AUXO2", NULL, "AXO2MIX Mixer"},
  1040. {"SPOL", NULL, "Class D"},
  1041. {"SPOL", NULL, "SPOL Mux"},
  1042. {"SPOR", NULL, "Class D"},
  1043. {"SPOR", NULL, "SPOR Mux"},
  1044. {"HPOL", NULL, "HP Depop"},
  1045. {"HPOR", NULL, "HP Depop"},
  1046. {"MONO", NULL, "MONO Depop"},
  1047. {"MONO", NULL, "MONO Mux"},
  1048. };
  1049. struct coeff_clk_div {
  1050. u32 mclk;
  1051. u32 bclk;
  1052. u32 rate;
  1053. u16 reg_val;
  1054. };
  1055. /* PLL divisors */
  1056. struct pll_div {
  1057. u32 pll_in;
  1058. u32 pll_out;
  1059. u16 reg_val;
  1060. };
  1061. static const struct pll_div codec_master_pll_div[] = {
  1062. {2048000, 8192000, 0x0ea0},
  1063. {3686400, 8192000, 0x4e27},
  1064. {12000000, 8192000, 0x456b},
  1065. {13000000, 8192000, 0x495f},
  1066. {13100000, 8192000, 0x0320},
  1067. {2048000, 11289600, 0xf637},
  1068. {3686400, 11289600, 0x2f22},
  1069. {12000000, 11289600, 0x3e2f},
  1070. {13000000, 11289600, 0x4d5b},
  1071. {13100000, 11289600, 0x363b},
  1072. {2048000, 16384000, 0x1ea0},
  1073. {3686400, 16384000, 0x9e27},
  1074. {12000000, 16384000, 0x452b},
  1075. {13000000, 16384000, 0x542f},
  1076. {13100000, 16384000, 0x03a0},
  1077. {2048000, 16934400, 0xe625},
  1078. {3686400, 16934400, 0x9126},
  1079. {12000000, 16934400, 0x4d2c},
  1080. {13000000, 16934400, 0x742f},
  1081. {13100000, 16934400, 0x3c27},
  1082. {2048000, 22579200, 0x2aa0},
  1083. {3686400, 22579200, 0x2f20},
  1084. {12000000, 22579200, 0x7e2f},
  1085. {13000000, 22579200, 0x742f},
  1086. {13100000, 22579200, 0x3c27},
  1087. {2048000, 24576000, 0x2ea0},
  1088. {3686400, 24576000, 0xee27},
  1089. {12000000, 24576000, 0x2915},
  1090. {13000000, 24576000, 0x772e},
  1091. {13100000, 24576000, 0x0d20},
  1092. {26000000, 24576000, 0x2027},
  1093. {26000000, 22579200, 0x392f},
  1094. {24576000, 22579200, 0x0921},
  1095. {24576000, 24576000, 0x02a0},
  1096. };
  1097. static const struct pll_div codec_slave_pll_div[] = {
  1098. {256000, 2048000, 0x46f0},
  1099. {256000, 4096000, 0x3ea0},
  1100. {352800, 5644800, 0x3ea0},
  1101. {512000, 8192000, 0x3ea0},
  1102. {1024000, 8192000, 0x46f0},
  1103. {705600, 11289600, 0x3ea0},
  1104. {1024000, 16384000, 0x3ea0},
  1105. {1411200, 22579200, 0x3ea0},
  1106. {1536000, 24576000, 0x3ea0},
  1107. {2048000, 16384000, 0x1ea0},
  1108. {2822400, 22579200, 0x1ea0},
  1109. {2822400, 45158400, 0x5ec0},
  1110. {5644800, 45158400, 0x46f0},
  1111. {3072000, 24576000, 0x1ea0},
  1112. {3072000, 49152000, 0x5ec0},
  1113. {6144000, 49152000, 0x46f0},
  1114. {705600, 11289600, 0x3ea0},
  1115. {705600, 8467200, 0x3ab0},
  1116. {24576000, 24576000, 0x02a0},
  1117. {1411200, 11289600, 0x1690},
  1118. {2822400, 11289600, 0x0a90},
  1119. {1536000, 12288000, 0x1690},
  1120. {3072000, 12288000, 0x0a90},
  1121. };
  1122. static struct coeff_clk_div coeff_div[] = {
  1123. /* sysclk is 256fs */
  1124. {2048000, 8000 * 32, 8000, 0x1000},
  1125. {2048000, 8000 * 64, 8000, 0x0000},
  1126. {2822400, 11025 * 32, 11025, 0x1000},
  1127. {2822400, 11025 * 64, 11025, 0x0000},
  1128. {4096000, 16000 * 32, 16000, 0x1000},
  1129. {4096000, 16000 * 64, 16000, 0x0000},
  1130. {5644800, 22050 * 32, 22050, 0x1000},
  1131. {5644800, 22050 * 64, 22050, 0x0000},
  1132. {8192000, 32000 * 32, 32000, 0x1000},
  1133. {8192000, 32000 * 64, 32000, 0x0000},
  1134. {11289600, 44100 * 32, 44100, 0x1000},
  1135. {11289600, 44100 * 64, 44100, 0x0000},
  1136. {12288000, 48000 * 32, 48000, 0x1000},
  1137. {12288000, 48000 * 64, 48000, 0x0000},
  1138. {22579200, 88200 * 32, 88200, 0x1000},
  1139. {22579200, 88200 * 64, 88200, 0x0000},
  1140. {24576000, 96000 * 32, 96000, 0x1000},
  1141. {24576000, 96000 * 64, 96000, 0x0000},
  1142. /* sysclk is 512fs */
  1143. {4096000, 8000 * 32, 8000, 0x3000},
  1144. {4096000, 8000 * 64, 8000, 0x2000},
  1145. {5644800, 11025 * 32, 11025, 0x3000},
  1146. {5644800, 11025 * 64, 11025, 0x2000},
  1147. {8192000, 16000 * 32, 16000, 0x3000},
  1148. {8192000, 16000 * 64, 16000, 0x2000},
  1149. {11289600, 22050 * 32, 22050, 0x3000},
  1150. {11289600, 22050 * 64, 22050, 0x2000},
  1151. {16384000, 32000 * 32, 32000, 0x3000},
  1152. {16384000, 32000 * 64, 32000, 0x2000},
  1153. {22579200, 44100 * 32, 44100, 0x3000},
  1154. {22579200, 44100 * 64, 44100, 0x2000},
  1155. {24576000, 48000 * 32, 48000, 0x3000},
  1156. {24576000, 48000 * 64, 48000, 0x2000},
  1157. {45158400, 88200 * 32, 88200, 0x3000},
  1158. {45158400, 88200 * 64, 88200, 0x2000},
  1159. {49152000, 96000 * 32, 96000, 0x3000},
  1160. {49152000, 96000 * 64, 96000, 0x2000},
  1161. /* sysclk is 24.576Mhz or 22.5792Mhz */
  1162. {24576000, 8000 * 32, 8000, 0x7080},
  1163. {24576000, 8000 * 64, 8000, 0x6080},
  1164. {24576000, 16000 * 32, 16000, 0x5080},
  1165. {24576000, 16000 * 64, 16000, 0x4080},
  1166. {24576000, 24000 * 32, 24000, 0x5000},
  1167. {24576000, 24000 * 64, 24000, 0x4000},
  1168. {24576000, 32000 * 32, 32000, 0x3080},
  1169. {24576000, 32000 * 64, 32000, 0x2080},
  1170. {22579200, 11025 * 32, 11025, 0x7000},
  1171. {22579200, 11025 * 64, 11025, 0x6000},
  1172. {22579200, 22050 * 32, 22050, 0x5000},
  1173. {22579200, 22050 * 64, 22050, 0x4000},
  1174. };
  1175. static int get_coeff(int mclk, int rate, int timesofbclk)
  1176. {
  1177. int i;
  1178. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  1179. if (coeff_div[i].mclk == mclk && coeff_div[i].rate == rate &&
  1180. (coeff_div[i].bclk / coeff_div[i].rate) == timesofbclk)
  1181. return i;
  1182. }
  1183. return -EINVAL;
  1184. }
  1185. static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream,
  1186. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  1187. {
  1188. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1189. struct snd_soc_codec *codec = rtd->codec;
  1190. struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
  1191. int timesofbclk = 32, coeff;
  1192. unsigned int iface = 0;
  1193. dev_dbg(codec->dev, "enter %s\n", __func__);
  1194. rt5631->bclk_rate = snd_soc_params_to_bclk(params);
  1195. if (rt5631->bclk_rate < 0) {
  1196. dev_err(codec->dev, "Fail to get BCLK rate\n");
  1197. return rt5631->bclk_rate;
  1198. }
  1199. rt5631->rx_rate = params_rate(params);
  1200. if (rt5631->master)
  1201. coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate,
  1202. rt5631->bclk_rate / rt5631->rx_rate);
  1203. else
  1204. coeff = get_coeff(rt5631->sysclk, rt5631->rx_rate,
  1205. timesofbclk);
  1206. if (coeff < 0) {
  1207. dev_err(codec->dev, "Fail to get coeff\n");
  1208. return -EINVAL;
  1209. }
  1210. switch (params_format(params)) {
  1211. case SNDRV_PCM_FORMAT_S16_LE:
  1212. break;
  1213. case SNDRV_PCM_FORMAT_S20_3LE:
  1214. iface |= RT5631_SDP_I2S_DL_20;
  1215. break;
  1216. case SNDRV_PCM_FORMAT_S24_LE:
  1217. iface |= RT5631_SDP_I2S_DL_24;
  1218. break;
  1219. case SNDRV_PCM_FORMAT_S8:
  1220. iface |= RT5631_SDP_I2S_DL_8;
  1221. break;
  1222. default:
  1223. return -EINVAL;
  1224. }
  1225. snd_soc_update_bits(codec, RT5631_SDP_CTRL,
  1226. RT5631_SDP_I2S_DL_MASK, iface);
  1227. snd_soc_write(codec, RT5631_STEREO_AD_DA_CLK_CTRL,
  1228. coeff_div[coeff].reg_val);
  1229. return 0;
  1230. }
  1231. static int rt5631_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai,
  1232. unsigned int fmt)
  1233. {
  1234. struct snd_soc_codec *codec = codec_dai->codec;
  1235. struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
  1236. unsigned int iface = 0;
  1237. dev_dbg(codec->dev, "enter %s\n", __func__);
  1238. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1239. case SND_SOC_DAIFMT_CBM_CFM:
  1240. rt5631->master = 1;
  1241. break;
  1242. case SND_SOC_DAIFMT_CBS_CFS:
  1243. iface |= RT5631_SDP_MODE_SEL_SLAVE;
  1244. rt5631->master = 0;
  1245. break;
  1246. default:
  1247. return -EINVAL;
  1248. }
  1249. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  1250. case SND_SOC_DAIFMT_I2S:
  1251. break;
  1252. case SND_SOC_DAIFMT_LEFT_J:
  1253. iface |= RT5631_SDP_I2S_DF_LEFT;
  1254. break;
  1255. case SND_SOC_DAIFMT_DSP_A:
  1256. iface |= RT5631_SDP_I2S_DF_PCM_A;
  1257. break;
  1258. case SND_SOC_DAIFMT_DSP_B:
  1259. iface |= RT5631_SDP_I2S_DF_PCM_B;
  1260. break;
  1261. default:
  1262. return -EINVAL;
  1263. }
  1264. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  1265. case SND_SOC_DAIFMT_NB_NF:
  1266. break;
  1267. case SND_SOC_DAIFMT_IB_NF:
  1268. iface |= RT5631_SDP_I2S_BCLK_POL_CTRL;
  1269. break;
  1270. default:
  1271. return -EINVAL;
  1272. }
  1273. snd_soc_write(codec, RT5631_SDP_CTRL, iface);
  1274. return 0;
  1275. }
  1276. static int rt5631_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  1277. int clk_id, unsigned int freq, int dir)
  1278. {
  1279. struct snd_soc_codec *codec = codec_dai->codec;
  1280. struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
  1281. dev_dbg(codec->dev, "enter %s, syclk=%d\n", __func__, freq);
  1282. if ((freq >= (256 * 8000)) && (freq <= (512 * 96000))) {
  1283. rt5631->sysclk = freq;
  1284. return 0;
  1285. }
  1286. return -EINVAL;
  1287. }
  1288. static int rt5631_codec_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  1289. int source, unsigned int freq_in, unsigned int freq_out)
  1290. {
  1291. struct snd_soc_codec *codec = codec_dai->codec;
  1292. struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
  1293. int i, ret = -EINVAL;
  1294. dev_dbg(codec->dev, "enter %s\n", __func__);
  1295. if (!freq_in || !freq_out) {
  1296. dev_dbg(codec->dev, "PLL disabled\n");
  1297. snd_soc_update_bits(codec, RT5631_GLOBAL_CLK_CTRL,
  1298. RT5631_SYSCLK_SOUR_SEL_MASK,
  1299. RT5631_SYSCLK_SOUR_SEL_MCLK);
  1300. return 0;
  1301. }
  1302. if (rt5631->master) {
  1303. for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++)
  1304. if (freq_in == codec_master_pll_div[i].pll_in &&
  1305. freq_out == codec_master_pll_div[i].pll_out) {
  1306. dev_info(codec->dev,
  1307. "change PLL in master mode\n");
  1308. snd_soc_write(codec, RT5631_PLL_CTRL,
  1309. codec_master_pll_div[i].reg_val);
  1310. schedule_timeout_uninterruptible(
  1311. msecs_to_jiffies(20));
  1312. snd_soc_update_bits(codec,
  1313. RT5631_GLOBAL_CLK_CTRL,
  1314. RT5631_SYSCLK_SOUR_SEL_MASK |
  1315. RT5631_PLLCLK_SOUR_SEL_MASK,
  1316. RT5631_SYSCLK_SOUR_SEL_PLL |
  1317. RT5631_PLLCLK_SOUR_SEL_MCLK);
  1318. ret = 0;
  1319. break;
  1320. }
  1321. } else {
  1322. for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++)
  1323. if (freq_in == codec_slave_pll_div[i].pll_in &&
  1324. freq_out == codec_slave_pll_div[i].pll_out) {
  1325. dev_info(codec->dev,
  1326. "change PLL in slave mode\n");
  1327. snd_soc_write(codec, RT5631_PLL_CTRL,
  1328. codec_slave_pll_div[i].reg_val);
  1329. schedule_timeout_uninterruptible(
  1330. msecs_to_jiffies(20));
  1331. snd_soc_update_bits(codec,
  1332. RT5631_GLOBAL_CLK_CTRL,
  1333. RT5631_SYSCLK_SOUR_SEL_MASK |
  1334. RT5631_PLLCLK_SOUR_SEL_MASK,
  1335. RT5631_SYSCLK_SOUR_SEL_PLL |
  1336. RT5631_PLLCLK_SOUR_SEL_BCLK);
  1337. ret = 0;
  1338. break;
  1339. }
  1340. }
  1341. return ret;
  1342. }
  1343. static int rt5631_set_bias_level(struct snd_soc_codec *codec,
  1344. enum snd_soc_bias_level level)
  1345. {
  1346. switch (level) {
  1347. case SND_SOC_BIAS_ON:
  1348. case SND_SOC_BIAS_PREPARE:
  1349. snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD2,
  1350. RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL,
  1351. RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL);
  1352. break;
  1353. case SND_SOC_BIAS_STANDBY:
  1354. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  1355. snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
  1356. RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS,
  1357. RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS);
  1358. msleep(80);
  1359. snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
  1360. RT5631_PWR_FAST_VREF_CTRL,
  1361. RT5631_PWR_FAST_VREF_CTRL);
  1362. codec->cache_only = false;
  1363. snd_soc_cache_sync(codec);
  1364. }
  1365. break;
  1366. case SND_SOC_BIAS_OFF:
  1367. snd_soc_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000);
  1368. snd_soc_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000);
  1369. snd_soc_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000);
  1370. snd_soc_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000);
  1371. break;
  1372. default:
  1373. break;
  1374. }
  1375. codec->dapm.bias_level = level;
  1376. return 0;
  1377. }
  1378. static int rt5631_probe(struct snd_soc_codec *codec)
  1379. {
  1380. struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
  1381. unsigned int val;
  1382. int ret;
  1383. ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
  1384. if (ret != 0) {
  1385. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  1386. return ret;
  1387. }
  1388. val = rt5631_read_index(codec, RT5631_ADDA_MIXER_INTL_REG3);
  1389. if (val & 0x0002)
  1390. rt5631->codec_version = 1;
  1391. else
  1392. rt5631->codec_version = 0;
  1393. rt5631_reset(codec);
  1394. snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
  1395. RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS,
  1396. RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS);
  1397. msleep(80);
  1398. snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
  1399. RT5631_PWR_FAST_VREF_CTRL, RT5631_PWR_FAST_VREF_CTRL);
  1400. /* enable HP zero cross */
  1401. snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, 0x0f18);
  1402. /* power off ClassD auto Recovery */
  1403. if (rt5631->codec_version)
  1404. snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2,
  1405. 0x2000, 0x2000);
  1406. else
  1407. snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2,
  1408. 0x2000, 0);
  1409. /* DMIC */
  1410. if (rt5631->dmic_used_flag) {
  1411. snd_soc_update_bits(codec, RT5631_GPIO_CTRL,
  1412. RT5631_GPIO_PIN_FUN_SEL_MASK |
  1413. RT5631_GPIO_DMIC_FUN_SEL_MASK,
  1414. RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC |
  1415. RT5631_GPIO_DMIC_FUN_SEL_DIMC);
  1416. snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
  1417. RT5631_DMIC_L_CH_LATCH_MASK |
  1418. RT5631_DMIC_R_CH_LATCH_MASK,
  1419. RT5631_DMIC_L_CH_LATCH_FALLING |
  1420. RT5631_DMIC_R_CH_LATCH_RISING);
  1421. }
  1422. codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
  1423. return 0;
  1424. }
  1425. static int rt5631_remove(struct snd_soc_codec *codec)
  1426. {
  1427. rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1428. return 0;
  1429. }
  1430. #ifdef CONFIG_PM
  1431. static int rt5631_suspend(struct snd_soc_codec *codec)
  1432. {
  1433. rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1434. return 0;
  1435. }
  1436. static int rt5631_resume(struct snd_soc_codec *codec)
  1437. {
  1438. rt5631_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  1439. return 0;
  1440. }
  1441. #else
  1442. #define rt5631_suspend NULL
  1443. #define rt5631_resume NULL
  1444. #endif
  1445. #define RT5631_STEREO_RATES SNDRV_PCM_RATE_8000_96000
  1446. #define RT5631_FORMAT (SNDRV_PCM_FMTBIT_S16_LE | \
  1447. SNDRV_PCM_FMTBIT_S20_3LE | \
  1448. SNDRV_PCM_FMTBIT_S24_LE | \
  1449. SNDRV_PCM_FMTBIT_S8)
  1450. static const struct snd_soc_dai_ops rt5631_ops = {
  1451. .hw_params = rt5631_hifi_pcm_params,
  1452. .set_fmt = rt5631_hifi_codec_set_dai_fmt,
  1453. .set_sysclk = rt5631_hifi_codec_set_dai_sysclk,
  1454. .set_pll = rt5631_codec_set_dai_pll,
  1455. };
  1456. static struct snd_soc_dai_driver rt5631_dai[] = {
  1457. {
  1458. .name = "rt5631-hifi",
  1459. .id = 1,
  1460. .playback = {
  1461. .stream_name = "HIFI Playback",
  1462. .channels_min = 1,
  1463. .channels_max = 2,
  1464. .rates = RT5631_STEREO_RATES,
  1465. .formats = RT5631_FORMAT,
  1466. },
  1467. .capture = {
  1468. .stream_name = "HIFI Capture",
  1469. .channels_min = 1,
  1470. .channels_max = 2,
  1471. .rates = RT5631_STEREO_RATES,
  1472. .formats = RT5631_FORMAT,
  1473. },
  1474. .ops = &rt5631_ops,
  1475. },
  1476. };
  1477. static struct snd_soc_codec_driver soc_codec_dev_rt5631 = {
  1478. .probe = rt5631_probe,
  1479. .remove = rt5631_remove,
  1480. .suspend = rt5631_suspend,
  1481. .resume = rt5631_resume,
  1482. .set_bias_level = rt5631_set_bias_level,
  1483. .reg_cache_size = RT5631_VENDOR_ID2 + 1,
  1484. .reg_word_size = sizeof(u16),
  1485. .reg_cache_default = rt5631_reg,
  1486. .volatile_register = rt5631_volatile_register,
  1487. .readable_register = rt5631_readable_register,
  1488. .reg_cache_step = 1,
  1489. .controls = rt5631_snd_controls,
  1490. .num_controls = ARRAY_SIZE(rt5631_snd_controls),
  1491. .dapm_widgets = rt5631_dapm_widgets,
  1492. .num_dapm_widgets = ARRAY_SIZE(rt5631_dapm_widgets),
  1493. .dapm_routes = rt5631_dapm_routes,
  1494. .num_dapm_routes = ARRAY_SIZE(rt5631_dapm_routes),
  1495. };
  1496. static const struct i2c_device_id rt5631_i2c_id[] = {
  1497. { "rt5631", 0 },
  1498. { }
  1499. };
  1500. MODULE_DEVICE_TABLE(i2c, rt5631_i2c_id);
  1501. static int rt5631_i2c_probe(struct i2c_client *i2c,
  1502. const struct i2c_device_id *id)
  1503. {
  1504. struct rt5631_priv *rt5631;
  1505. int ret;
  1506. rt5631 = devm_kzalloc(&i2c->dev, sizeof(struct rt5631_priv),
  1507. GFP_KERNEL);
  1508. if (NULL == rt5631)
  1509. return -ENOMEM;
  1510. i2c_set_clientdata(i2c, rt5631);
  1511. ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5631,
  1512. rt5631_dai, ARRAY_SIZE(rt5631_dai));
  1513. return ret;
  1514. }
  1515. static __devexit int rt5631_i2c_remove(struct i2c_client *client)
  1516. {
  1517. snd_soc_unregister_codec(&client->dev);
  1518. return 0;
  1519. }
  1520. static struct i2c_driver rt5631_i2c_driver = {
  1521. .driver = {
  1522. .name = "rt5631",
  1523. .owner = THIS_MODULE,
  1524. },
  1525. .probe = rt5631_i2c_probe,
  1526. .remove = __devexit_p(rt5631_i2c_remove),
  1527. .id_table = rt5631_i2c_id,
  1528. };
  1529. static int __init rt5631_modinit(void)
  1530. {
  1531. return i2c_add_driver(&rt5631_i2c_driver);
  1532. }
  1533. module_init(rt5631_modinit);
  1534. static void __exit rt5631_modexit(void)
  1535. {
  1536. i2c_del_driver(&rt5631_i2c_driver);
  1537. }
  1538. module_exit(rt5631_modexit);
  1539. MODULE_DESCRIPTION("ASoC RT5631 driver");
  1540. MODULE_AUTHOR("flove <flove@realtek.com>");
  1541. MODULE_LICENSE("GPL");