cs4270.c 22 KB

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  1. /*
  2. * CS4270 ALSA SoC (ASoC) codec driver
  3. *
  4. * Author: Timur Tabi <timur@freescale.com>
  5. *
  6. * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
  7. * under the terms of the GNU General Public License version 2. This
  8. * program is licensed "as is" without any warranty of any kind, whether
  9. * express or implied.
  10. *
  11. * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
  12. *
  13. * Current features/limitations:
  14. *
  15. * - Software mode is supported. Stand-alone mode is not supported.
  16. * - Only I2C is supported, not SPI
  17. * - Support for master and slave mode
  18. * - The machine driver's 'startup' function must call
  19. * cs4270_set_dai_sysclk() with the value of MCLK.
  20. * - Only I2S and left-justified modes are supported
  21. * - Power management is supported
  22. */
  23. #include <linux/module.h>
  24. #include <linux/slab.h>
  25. #include <sound/core.h>
  26. #include <sound/soc.h>
  27. #include <sound/initval.h>
  28. #include <linux/i2c.h>
  29. #include <linux/delay.h>
  30. #include <linux/regulator/consumer.h>
  31. /*
  32. * The codec isn't really big-endian or little-endian, since the I2S
  33. * interface requires data to be sent serially with the MSbit first.
  34. * However, to support BE and LE I2S devices, we specify both here. That
  35. * way, ALSA will always match the bit patterns.
  36. */
  37. #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
  38. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
  39. SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
  40. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
  41. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
  42. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
  43. /* CS4270 registers addresses */
  44. #define CS4270_CHIPID 0x01 /* Chip ID */
  45. #define CS4270_PWRCTL 0x02 /* Power Control */
  46. #define CS4270_MODE 0x03 /* Mode Control */
  47. #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
  48. #define CS4270_TRANS 0x05 /* Transition Control */
  49. #define CS4270_MUTE 0x06 /* Mute Control */
  50. #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
  51. #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
  52. #define CS4270_FIRSTREG 0x01
  53. #define CS4270_LASTREG 0x08
  54. #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
  55. #define CS4270_I2C_INCR 0x80
  56. /* Bit masks for the CS4270 registers */
  57. #define CS4270_CHIPID_ID 0xF0
  58. #define CS4270_CHIPID_REV 0x0F
  59. #define CS4270_PWRCTL_FREEZE 0x80
  60. #define CS4270_PWRCTL_PDN_ADC 0x20
  61. #define CS4270_PWRCTL_PDN_DAC 0x02
  62. #define CS4270_PWRCTL_PDN 0x01
  63. #define CS4270_PWRCTL_PDN_ALL \
  64. (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
  65. #define CS4270_MODE_SPEED_MASK 0x30
  66. #define CS4270_MODE_1X 0x00
  67. #define CS4270_MODE_2X 0x10
  68. #define CS4270_MODE_4X 0x20
  69. #define CS4270_MODE_SLAVE 0x30
  70. #define CS4270_MODE_DIV_MASK 0x0E
  71. #define CS4270_MODE_DIV1 0x00
  72. #define CS4270_MODE_DIV15 0x02
  73. #define CS4270_MODE_DIV2 0x04
  74. #define CS4270_MODE_DIV3 0x06
  75. #define CS4270_MODE_DIV4 0x08
  76. #define CS4270_MODE_POPGUARD 0x01
  77. #define CS4270_FORMAT_FREEZE_A 0x80
  78. #define CS4270_FORMAT_FREEZE_B 0x40
  79. #define CS4270_FORMAT_LOOPBACK 0x20
  80. #define CS4270_FORMAT_DAC_MASK 0x18
  81. #define CS4270_FORMAT_DAC_LJ 0x00
  82. #define CS4270_FORMAT_DAC_I2S 0x08
  83. #define CS4270_FORMAT_DAC_RJ16 0x18
  84. #define CS4270_FORMAT_DAC_RJ24 0x10
  85. #define CS4270_FORMAT_ADC_MASK 0x01
  86. #define CS4270_FORMAT_ADC_LJ 0x00
  87. #define CS4270_FORMAT_ADC_I2S 0x01
  88. #define CS4270_TRANS_ONE_VOL 0x80
  89. #define CS4270_TRANS_SOFT 0x40
  90. #define CS4270_TRANS_ZERO 0x20
  91. #define CS4270_TRANS_INV_ADC_A 0x08
  92. #define CS4270_TRANS_INV_ADC_B 0x10
  93. #define CS4270_TRANS_INV_DAC_A 0x02
  94. #define CS4270_TRANS_INV_DAC_B 0x04
  95. #define CS4270_TRANS_DEEMPH 0x01
  96. #define CS4270_MUTE_AUTO 0x20
  97. #define CS4270_MUTE_ADC_A 0x08
  98. #define CS4270_MUTE_ADC_B 0x10
  99. #define CS4270_MUTE_POLARITY 0x04
  100. #define CS4270_MUTE_DAC_A 0x01
  101. #define CS4270_MUTE_DAC_B 0x02
  102. /* Power-on default values for the registers
  103. *
  104. * This array contains the power-on default values of the registers, with the
  105. * exception of the "CHIPID" register (01h). The lower four bits of that
  106. * register contain the hardware revision, so it is treated as volatile.
  107. *
  108. * Also note that on the CS4270, the first readable register is 1, but ASoC
  109. * assumes the first register is 0. Therfore, the array must have an entry for
  110. * register 0, but we use cs4270_reg_is_readable() to tell ASoC that it can't
  111. * be read.
  112. */
  113. static const u8 cs4270_default_reg_cache[CS4270_LASTREG + 1] = {
  114. 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x20, 0x00, 0x00
  115. };
  116. static const char *supply_names[] = {
  117. "va", "vd", "vlc"
  118. };
  119. /* Private data for the CS4270 */
  120. struct cs4270_private {
  121. enum snd_soc_control_type control_type;
  122. unsigned int mclk; /* Input frequency of the MCLK pin */
  123. unsigned int mode; /* The mode (I2S or left-justified) */
  124. unsigned int slave_mode;
  125. unsigned int manual_mute;
  126. /* power domain regulators */
  127. struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
  128. };
  129. /**
  130. * struct cs4270_mode_ratios - clock ratio tables
  131. * @ratio: the ratio of MCLK to the sample rate
  132. * @speed_mode: the Speed Mode bits to set in the Mode Control register for
  133. * this ratio
  134. * @mclk: the Ratio Select bits to set in the Mode Control register for this
  135. * ratio
  136. *
  137. * The data for this chart is taken from Table 5 of the CS4270 reference
  138. * manual.
  139. *
  140. * This table is used to determine how to program the Mode Control register.
  141. * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
  142. * rates the CS4270 currently supports.
  143. *
  144. * @speed_mode is the corresponding bit pattern to be written to the
  145. * MODE bits of the Mode Control Register
  146. *
  147. * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
  148. * the Mode Control Register.
  149. *
  150. * In situations where a single ratio is represented by multiple speed
  151. * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
  152. * double-speed instead of quad-speed. However, the CS4270 errata states
  153. * that divide-By-1.5 can cause failures, so we avoid that mode where
  154. * possible.
  155. *
  156. * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
  157. * work if Vd is 3.3V. If this effects you, select the
  158. * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
  159. * never select any sample rates that require divide-by-1.5.
  160. */
  161. struct cs4270_mode_ratios {
  162. unsigned int ratio;
  163. u8 speed_mode;
  164. u8 mclk;
  165. };
  166. static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
  167. {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
  168. #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
  169. {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
  170. #endif
  171. {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
  172. {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
  173. {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
  174. {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
  175. {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
  176. {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
  177. {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
  178. };
  179. /* The number of MCLK/LRCK ratios supported by the CS4270 */
  180. #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
  181. static int cs4270_reg_is_readable(struct snd_soc_codec *codec, unsigned int reg)
  182. {
  183. return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);
  184. }
  185. static int cs4270_reg_is_volatile(struct snd_soc_codec *codec, unsigned int reg)
  186. {
  187. /* Unreadable registers are considered volatile */
  188. if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
  189. return 1;
  190. return reg == CS4270_CHIPID;
  191. }
  192. /**
  193. * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
  194. * @codec_dai: the codec DAI
  195. * @clk_id: the clock ID (ignored)
  196. * @freq: the MCLK input frequency
  197. * @dir: the clock direction (ignored)
  198. *
  199. * This function is used to tell the codec driver what the input MCLK
  200. * frequency is.
  201. *
  202. * The value of MCLK is used to determine which sample rates are supported
  203. * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
  204. * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
  205. *
  206. * This function calculates the nine ratios and determines which ones match
  207. * a standard sample rate. If there's a match, then it is added to the list
  208. * of supported sample rates.
  209. *
  210. * This function must be called by the machine driver's 'startup' function,
  211. * otherwise the list of supported sample rates will not be available in
  212. * time for ALSA.
  213. *
  214. * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
  215. * theoretically possible sample rates to be enabled. Call it again with a
  216. * proper value set one the external clock is set (most probably you would do
  217. * that from a machine's driver 'hw_param' hook.
  218. */
  219. static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  220. int clk_id, unsigned int freq, int dir)
  221. {
  222. struct snd_soc_codec *codec = codec_dai->codec;
  223. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  224. cs4270->mclk = freq;
  225. return 0;
  226. }
  227. /**
  228. * cs4270_set_dai_fmt - configure the codec for the selected audio format
  229. * @codec_dai: the codec DAI
  230. * @format: a SND_SOC_DAIFMT_x value indicating the data format
  231. *
  232. * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
  233. * codec accordingly.
  234. *
  235. * Currently, this function only supports SND_SOC_DAIFMT_I2S and
  236. * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
  237. * data for playback only, but ASoC currently does not support different
  238. * formats for playback vs. record.
  239. */
  240. static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
  241. unsigned int format)
  242. {
  243. struct snd_soc_codec *codec = codec_dai->codec;
  244. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  245. /* set DAI format */
  246. switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
  247. case SND_SOC_DAIFMT_I2S:
  248. case SND_SOC_DAIFMT_LEFT_J:
  249. cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
  250. break;
  251. default:
  252. dev_err(codec->dev, "invalid dai format\n");
  253. return -EINVAL;
  254. }
  255. /* set master/slave audio interface */
  256. switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
  257. case SND_SOC_DAIFMT_CBS_CFS:
  258. cs4270->slave_mode = 1;
  259. break;
  260. case SND_SOC_DAIFMT_CBM_CFM:
  261. cs4270->slave_mode = 0;
  262. break;
  263. default:
  264. /* all other modes are unsupported by the hardware */
  265. dev_err(codec->dev, "Unknown master/slave configuration\n");
  266. return -EINVAL;
  267. }
  268. return 0;
  269. }
  270. /**
  271. * cs4270_hw_params - program the CS4270 with the given hardware parameters.
  272. * @substream: the audio stream
  273. * @params: the hardware parameters to set
  274. * @dai: the SOC DAI (ignored)
  275. *
  276. * This function programs the hardware with the values provided.
  277. * Specifically, the sample rate and the data format.
  278. *
  279. * The .ops functions are used to provide board-specific data, like input
  280. * frequencies, to this driver. This function takes that information,
  281. * combines it with the hardware parameters provided, and programs the
  282. * hardware accordingly.
  283. */
  284. static int cs4270_hw_params(struct snd_pcm_substream *substream,
  285. struct snd_pcm_hw_params *params,
  286. struct snd_soc_dai *dai)
  287. {
  288. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  289. struct snd_soc_codec *codec = rtd->codec;
  290. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  291. int ret;
  292. unsigned int i;
  293. unsigned int rate;
  294. unsigned int ratio;
  295. int reg;
  296. /* Figure out which MCLK/LRCK ratio to use */
  297. rate = params_rate(params); /* Sampling rate, in Hz */
  298. ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
  299. for (i = 0; i < NUM_MCLK_RATIOS; i++) {
  300. if (cs4270_mode_ratios[i].ratio == ratio)
  301. break;
  302. }
  303. if (i == NUM_MCLK_RATIOS) {
  304. /* We did not find a matching ratio */
  305. dev_err(codec->dev, "could not find matching ratio\n");
  306. return -EINVAL;
  307. }
  308. /* Set the sample rate */
  309. reg = snd_soc_read(codec, CS4270_MODE);
  310. reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
  311. reg |= cs4270_mode_ratios[i].mclk;
  312. if (cs4270->slave_mode)
  313. reg |= CS4270_MODE_SLAVE;
  314. else
  315. reg |= cs4270_mode_ratios[i].speed_mode;
  316. ret = snd_soc_write(codec, CS4270_MODE, reg);
  317. if (ret < 0) {
  318. dev_err(codec->dev, "i2c write failed\n");
  319. return ret;
  320. }
  321. /* Set the DAI format */
  322. reg = snd_soc_read(codec, CS4270_FORMAT);
  323. reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
  324. switch (cs4270->mode) {
  325. case SND_SOC_DAIFMT_I2S:
  326. reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
  327. break;
  328. case SND_SOC_DAIFMT_LEFT_J:
  329. reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
  330. break;
  331. default:
  332. dev_err(codec->dev, "unknown dai format\n");
  333. return -EINVAL;
  334. }
  335. ret = snd_soc_write(codec, CS4270_FORMAT, reg);
  336. if (ret < 0) {
  337. dev_err(codec->dev, "i2c write failed\n");
  338. return ret;
  339. }
  340. return ret;
  341. }
  342. /**
  343. * cs4270_dai_mute - enable/disable the CS4270 external mute
  344. * @dai: the SOC DAI
  345. * @mute: 0 = disable mute, 1 = enable mute
  346. *
  347. * This function toggles the mute bits in the MUTE register. The CS4270's
  348. * mute capability is intended for external muting circuitry, so if the
  349. * board does not have the MUTEA or MUTEB pins connected to such circuitry,
  350. * then this function will do nothing.
  351. */
  352. static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
  353. {
  354. struct snd_soc_codec *codec = dai->codec;
  355. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  356. int reg6;
  357. reg6 = snd_soc_read(codec, CS4270_MUTE);
  358. if (mute)
  359. reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
  360. else {
  361. reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
  362. reg6 |= cs4270->manual_mute;
  363. }
  364. return snd_soc_write(codec, CS4270_MUTE, reg6);
  365. }
  366. /**
  367. * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
  368. * alsa control.
  369. * @kcontrol: mixer control
  370. * @ucontrol: control element information
  371. *
  372. * This function basically passes the arguments on to the generic
  373. * snd_soc_put_volsw() function and saves the mute information in
  374. * our private data structure. This is because we want to prevent
  375. * cs4270_dai_mute() neglecting the user's decision to manually
  376. * mute the codec's output.
  377. *
  378. * Returns 0 for success.
  379. */
  380. static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
  381. struct snd_ctl_elem_value *ucontrol)
  382. {
  383. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  384. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  385. int left = !ucontrol->value.integer.value[0];
  386. int right = !ucontrol->value.integer.value[1];
  387. cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
  388. (right ? CS4270_MUTE_DAC_B : 0);
  389. return snd_soc_put_volsw(kcontrol, ucontrol);
  390. }
  391. /* A list of non-DAPM controls that the CS4270 supports */
  392. static const struct snd_kcontrol_new cs4270_snd_controls[] = {
  393. SOC_DOUBLE_R("Master Playback Volume",
  394. CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
  395. SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
  396. SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
  397. SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
  398. SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
  399. SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
  400. SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
  401. SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
  402. SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
  403. snd_soc_get_volsw, cs4270_soc_put_mute),
  404. };
  405. static const struct snd_soc_dai_ops cs4270_dai_ops = {
  406. .hw_params = cs4270_hw_params,
  407. .set_sysclk = cs4270_set_dai_sysclk,
  408. .set_fmt = cs4270_set_dai_fmt,
  409. .digital_mute = cs4270_dai_mute,
  410. };
  411. static struct snd_soc_dai_driver cs4270_dai = {
  412. .name = "cs4270-hifi",
  413. .playback = {
  414. .stream_name = "Playback",
  415. .channels_min = 1,
  416. .channels_max = 2,
  417. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  418. .rate_min = 4000,
  419. .rate_max = 216000,
  420. .formats = CS4270_FORMATS,
  421. },
  422. .capture = {
  423. .stream_name = "Capture",
  424. .channels_min = 1,
  425. .channels_max = 2,
  426. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  427. .rate_min = 4000,
  428. .rate_max = 216000,
  429. .formats = CS4270_FORMATS,
  430. },
  431. .ops = &cs4270_dai_ops,
  432. };
  433. /**
  434. * cs4270_probe - ASoC probe function
  435. * @pdev: platform device
  436. *
  437. * This function is called when ASoC has all the pieces it needs to
  438. * instantiate a sound driver.
  439. */
  440. static int cs4270_probe(struct snd_soc_codec *codec)
  441. {
  442. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  443. int i, ret;
  444. /* Tell ASoC what kind of I/O to use to read the registers. ASoC will
  445. * then do the I2C transactions itself.
  446. */
  447. ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs4270->control_type);
  448. if (ret < 0) {
  449. dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
  450. return ret;
  451. }
  452. /* Disable auto-mute. This feature appears to be buggy. In some
  453. * situations, auto-mute will not deactivate when it should, so we want
  454. * this feature disabled by default. An application (e.g. alsactl) can
  455. * re-enabled it by using the controls.
  456. */
  457. ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0);
  458. if (ret < 0) {
  459. dev_err(codec->dev, "i2c write failed\n");
  460. return ret;
  461. }
  462. /* Disable automatic volume control. The hardware enables, and it
  463. * causes volume change commands to be delayed, sometimes until after
  464. * playback has started. An application (e.g. alsactl) can
  465. * re-enabled it by using the controls.
  466. */
  467. ret = snd_soc_update_bits(codec, CS4270_TRANS,
  468. CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);
  469. if (ret < 0) {
  470. dev_err(codec->dev, "i2c write failed\n");
  471. return ret;
  472. }
  473. /* Add the non-DAPM controls */
  474. ret = snd_soc_add_codec_controls(codec, cs4270_snd_controls,
  475. ARRAY_SIZE(cs4270_snd_controls));
  476. if (ret < 0) {
  477. dev_err(codec->dev, "failed to add controls\n");
  478. return ret;
  479. }
  480. /* get the power supply regulators */
  481. for (i = 0; i < ARRAY_SIZE(supply_names); i++)
  482. cs4270->supplies[i].supply = supply_names[i];
  483. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(cs4270->supplies),
  484. cs4270->supplies);
  485. if (ret < 0)
  486. return ret;
  487. ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
  488. cs4270->supplies);
  489. if (ret < 0)
  490. goto error_free_regulators;
  491. return 0;
  492. error_free_regulators:
  493. regulator_bulk_free(ARRAY_SIZE(cs4270->supplies),
  494. cs4270->supplies);
  495. return ret;
  496. }
  497. /**
  498. * cs4270_remove - ASoC remove function
  499. * @pdev: platform device
  500. *
  501. * This function is the counterpart to cs4270_probe().
  502. */
  503. static int cs4270_remove(struct snd_soc_codec *codec)
  504. {
  505. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  506. regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
  507. regulator_bulk_free(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
  508. return 0;
  509. };
  510. #ifdef CONFIG_PM
  511. /* This suspend/resume implementation can handle both - a simple standby
  512. * where the codec remains powered, and a full suspend, where the voltage
  513. * domain the codec is connected to is teared down and/or any other hardware
  514. * reset condition is asserted.
  515. *
  516. * The codec's own power saving features are enabled in the suspend callback,
  517. * and all registers are written back to the hardware when resuming.
  518. */
  519. static int cs4270_soc_suspend(struct snd_soc_codec *codec)
  520. {
  521. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  522. int reg, ret;
  523. reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
  524. if (reg < 0)
  525. return reg;
  526. ret = snd_soc_write(codec, CS4270_PWRCTL, reg);
  527. if (ret < 0)
  528. return ret;
  529. regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
  530. cs4270->supplies);
  531. return 0;
  532. }
  533. static int cs4270_soc_resume(struct snd_soc_codec *codec)
  534. {
  535. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  536. int reg;
  537. regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
  538. cs4270->supplies);
  539. /* In case the device was put to hard reset during sleep, we need to
  540. * wait 500ns here before any I2C communication. */
  541. ndelay(500);
  542. /* first restore the entire register cache ... */
  543. snd_soc_cache_sync(codec);
  544. /* ... then disable the power-down bits */
  545. reg = snd_soc_read(codec, CS4270_PWRCTL);
  546. reg &= ~CS4270_PWRCTL_PDN_ALL;
  547. return snd_soc_write(codec, CS4270_PWRCTL, reg);
  548. }
  549. #else
  550. #define cs4270_soc_suspend NULL
  551. #define cs4270_soc_resume NULL
  552. #endif /* CONFIG_PM */
  553. /*
  554. * ASoC codec driver structure
  555. */
  556. static const struct snd_soc_codec_driver soc_codec_device_cs4270 = {
  557. .probe = cs4270_probe,
  558. .remove = cs4270_remove,
  559. .suspend = cs4270_soc_suspend,
  560. .resume = cs4270_soc_resume,
  561. .volatile_register = cs4270_reg_is_volatile,
  562. .readable_register = cs4270_reg_is_readable,
  563. .reg_cache_size = CS4270_LASTREG + 1,
  564. .reg_word_size = sizeof(u8),
  565. .reg_cache_default = cs4270_default_reg_cache,
  566. };
  567. /**
  568. * cs4270_i2c_probe - initialize the I2C interface of the CS4270
  569. * @i2c_client: the I2C client object
  570. * @id: the I2C device ID (ignored)
  571. *
  572. * This function is called whenever the I2C subsystem finds a device that
  573. * matches the device ID given via a prior call to i2c_add_driver().
  574. */
  575. static int cs4270_i2c_probe(struct i2c_client *i2c_client,
  576. const struct i2c_device_id *id)
  577. {
  578. struct cs4270_private *cs4270;
  579. int ret;
  580. /* Verify that we have a CS4270 */
  581. ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID);
  582. if (ret < 0) {
  583. dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
  584. i2c_client->addr);
  585. return ret;
  586. }
  587. /* The top four bits of the chip ID should be 1100. */
  588. if ((ret & 0xF0) != 0xC0) {
  589. dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
  590. i2c_client->addr);
  591. return -ENODEV;
  592. }
  593. dev_info(&i2c_client->dev, "found device at i2c address %X\n",
  594. i2c_client->addr);
  595. dev_info(&i2c_client->dev, "hardware revision %X\n", ret & 0xF);
  596. cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private),
  597. GFP_KERNEL);
  598. if (!cs4270) {
  599. dev_err(&i2c_client->dev, "could not allocate codec\n");
  600. return -ENOMEM;
  601. }
  602. i2c_set_clientdata(i2c_client, cs4270);
  603. cs4270->control_type = SND_SOC_I2C;
  604. ret = snd_soc_register_codec(&i2c_client->dev,
  605. &soc_codec_device_cs4270, &cs4270_dai, 1);
  606. return ret;
  607. }
  608. /**
  609. * cs4270_i2c_remove - remove an I2C device
  610. * @i2c_client: the I2C client object
  611. *
  612. * This function is the counterpart to cs4270_i2c_probe().
  613. */
  614. static int cs4270_i2c_remove(struct i2c_client *i2c_client)
  615. {
  616. snd_soc_unregister_codec(&i2c_client->dev);
  617. return 0;
  618. }
  619. /*
  620. * cs4270_id - I2C device IDs supported by this driver
  621. */
  622. static const struct i2c_device_id cs4270_id[] = {
  623. {"cs4270", 0},
  624. {}
  625. };
  626. MODULE_DEVICE_TABLE(i2c, cs4270_id);
  627. /*
  628. * cs4270_i2c_driver - I2C device identification
  629. *
  630. * This structure tells the I2C subsystem how to identify and support a
  631. * given I2C device type.
  632. */
  633. static struct i2c_driver cs4270_i2c_driver = {
  634. .driver = {
  635. .name = "cs4270",
  636. .owner = THIS_MODULE,
  637. },
  638. .id_table = cs4270_id,
  639. .probe = cs4270_i2c_probe,
  640. .remove = cs4270_i2c_remove,
  641. };
  642. static int __init cs4270_init(void)
  643. {
  644. return i2c_add_driver(&cs4270_i2c_driver);
  645. }
  646. module_init(cs4270_init);
  647. static void __exit cs4270_exit(void)
  648. {
  649. i2c_del_driver(&cs4270_i2c_driver);
  650. }
  651. module_exit(cs4270_exit);
  652. MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
  653. MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
  654. MODULE_LICENSE("GPL");