shwdt.c 12 KB

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  1. /*
  2. * drivers/watchdog/shwdt.c
  3. *
  4. * Watchdog driver for integrated watchdog in the SuperH processors.
  5. *
  6. * Copyright (C) 2001 - 2010 Paul Mundt <lethal@linux-sh.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. * 14-Dec-2001 Matt Domsch <Matt_Domsch@dell.com>
  14. * Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
  15. *
  16. * 19-Apr-2002 Rob Radez <rob@osinvestor.com>
  17. * Added expect close support, made emulated timeout runtime changeable
  18. * general cleanups, add some ioctls
  19. */
  20. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/init.h>
  25. #include <linux/types.h>
  26. #include <linux/miscdevice.h>
  27. #include <linux/watchdog.h>
  28. #include <linux/reboot.h>
  29. #include <linux/notifier.h>
  30. #include <linux/ioport.h>
  31. #include <linux/fs.h>
  32. #include <linux/mm.h>
  33. #include <linux/slab.h>
  34. #include <linux/io.h>
  35. #include <linux/uaccess.h>
  36. #include <asm/watchdog.h>
  37. #define DRV_NAME "sh-wdt"
  38. /*
  39. * Default clock division ratio is 5.25 msecs. For an additional table of
  40. * values, consult the asm-sh/watchdog.h. Overload this at module load
  41. * time.
  42. *
  43. * In order for this to work reliably we need to have HZ set to 1000 or
  44. * something quite higher than 100 (or we need a proper high-res timer
  45. * implementation that will deal with this properly), otherwise the 10ms
  46. * resolution of a jiffy is enough to trigger the overflow. For things like
  47. * the SH-4 and SH-5, this isn't necessarily that big of a problem, though
  48. * for the SH-2 and SH-3, this isn't recommended unless the WDT is absolutely
  49. * necssary.
  50. *
  51. * As a result of this timing problem, the only modes that are particularly
  52. * feasible are the 4096 and the 2048 divisors, which yield 5.25 and 2.62ms
  53. * overflow periods respectively.
  54. *
  55. * Also, since we can't really expect userspace to be responsive enough
  56. * before the overflow happens, we maintain two separate timers .. One in
  57. * the kernel for clearing out WOVF every 2ms or so (again, this depends on
  58. * HZ == 1000), and another for monitoring userspace writes to the WDT device.
  59. *
  60. * As such, we currently use a configurable heartbeat interval which defaults
  61. * to 30s. In this case, the userspace daemon is only responsible for periodic
  62. * writes to the device before the next heartbeat is scheduled. If the daemon
  63. * misses its deadline, the kernel timer will allow the WDT to overflow.
  64. */
  65. static int clock_division_ratio = WTCSR_CKS_4096;
  66. #define next_ping_period(cks) (jiffies + msecs_to_jiffies(cks - 4))
  67. static const struct watchdog_info sh_wdt_info;
  68. static struct platform_device *sh_wdt_dev;
  69. static DEFINE_SPINLOCK(shwdt_lock);
  70. #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */
  71. static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
  72. static bool nowayout = WATCHDOG_NOWAYOUT;
  73. static unsigned long next_heartbeat;
  74. struct sh_wdt {
  75. void __iomem *base;
  76. struct device *dev;
  77. struct timer_list timer;
  78. unsigned long enabled;
  79. char expect_close;
  80. };
  81. static void sh_wdt_start(struct sh_wdt *wdt)
  82. {
  83. unsigned long flags;
  84. u8 csr;
  85. spin_lock_irqsave(&shwdt_lock, flags);
  86. next_heartbeat = jiffies + (heartbeat * HZ);
  87. mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
  88. csr = sh_wdt_read_csr();
  89. csr |= WTCSR_WT | clock_division_ratio;
  90. sh_wdt_write_csr(csr);
  91. sh_wdt_write_cnt(0);
  92. /*
  93. * These processors have a bit of an inconsistent initialization
  94. * process.. starting with SH-3, RSTS was moved to WTCSR, and the
  95. * RSTCSR register was removed.
  96. *
  97. * On the SH-2 however, in addition with bits being in different
  98. * locations, we must deal with RSTCSR outright..
  99. */
  100. csr = sh_wdt_read_csr();
  101. csr |= WTCSR_TME;
  102. csr &= ~WTCSR_RSTS;
  103. sh_wdt_write_csr(csr);
  104. #ifdef CONFIG_CPU_SH2
  105. csr = sh_wdt_read_rstcsr();
  106. csr &= ~RSTCSR_RSTS;
  107. sh_wdt_write_rstcsr(csr);
  108. #endif
  109. spin_unlock_irqrestore(&shwdt_lock, flags);
  110. }
  111. static void sh_wdt_stop(struct sh_wdt *wdt)
  112. {
  113. unsigned long flags;
  114. u8 csr;
  115. spin_lock_irqsave(&shwdt_lock, flags);
  116. del_timer(&wdt->timer);
  117. csr = sh_wdt_read_csr();
  118. csr &= ~WTCSR_TME;
  119. sh_wdt_write_csr(csr);
  120. spin_unlock_irqrestore(&shwdt_lock, flags);
  121. }
  122. static inline void sh_wdt_keepalive(struct sh_wdt *wdt)
  123. {
  124. unsigned long flags;
  125. spin_lock_irqsave(&shwdt_lock, flags);
  126. next_heartbeat = jiffies + (heartbeat * HZ);
  127. spin_unlock_irqrestore(&shwdt_lock, flags);
  128. }
  129. static int sh_wdt_set_heartbeat(int t)
  130. {
  131. unsigned long flags;
  132. if (unlikely(t < 1 || t > 3600)) /* arbitrary upper limit */
  133. return -EINVAL;
  134. spin_lock_irqsave(&shwdt_lock, flags);
  135. heartbeat = t;
  136. spin_unlock_irqrestore(&shwdt_lock, flags);
  137. return 0;
  138. }
  139. static void sh_wdt_ping(unsigned long data)
  140. {
  141. struct sh_wdt *wdt = (struct sh_wdt *)data;
  142. unsigned long flags;
  143. spin_lock_irqsave(&shwdt_lock, flags);
  144. if (time_before(jiffies, next_heartbeat)) {
  145. u8 csr;
  146. csr = sh_wdt_read_csr();
  147. csr &= ~WTCSR_IOVF;
  148. sh_wdt_write_csr(csr);
  149. sh_wdt_write_cnt(0);
  150. mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
  151. } else
  152. dev_warn(wdt->dev, "Heartbeat lost! Will not ping "
  153. "the watchdog\n");
  154. spin_unlock_irqrestore(&shwdt_lock, flags);
  155. }
  156. static int sh_wdt_open(struct inode *inode, struct file *file)
  157. {
  158. struct sh_wdt *wdt = platform_get_drvdata(sh_wdt_dev);
  159. if (test_and_set_bit(0, &wdt->enabled))
  160. return -EBUSY;
  161. if (nowayout)
  162. __module_get(THIS_MODULE);
  163. file->private_data = wdt;
  164. sh_wdt_start(wdt);
  165. return nonseekable_open(inode, file);
  166. }
  167. static int sh_wdt_close(struct inode *inode, struct file *file)
  168. {
  169. struct sh_wdt *wdt = file->private_data;
  170. if (wdt->expect_close == 42) {
  171. sh_wdt_stop(wdt);
  172. } else {
  173. dev_crit(wdt->dev, "Unexpected close, not "
  174. "stopping watchdog!\n");
  175. sh_wdt_keepalive(wdt);
  176. }
  177. clear_bit(0, &wdt->enabled);
  178. wdt->expect_close = 0;
  179. return 0;
  180. }
  181. static ssize_t sh_wdt_write(struct file *file, const char *buf,
  182. size_t count, loff_t *ppos)
  183. {
  184. struct sh_wdt *wdt = file->private_data;
  185. if (count) {
  186. if (!nowayout) {
  187. size_t i;
  188. wdt->expect_close = 0;
  189. for (i = 0; i != count; i++) {
  190. char c;
  191. if (get_user(c, buf + i))
  192. return -EFAULT;
  193. if (c == 'V')
  194. wdt->expect_close = 42;
  195. }
  196. }
  197. sh_wdt_keepalive(wdt);
  198. }
  199. return count;
  200. }
  201. static long sh_wdt_ioctl(struct file *file, unsigned int cmd,
  202. unsigned long arg)
  203. {
  204. struct sh_wdt *wdt = file->private_data;
  205. int new_heartbeat;
  206. int options, retval = -EINVAL;
  207. switch (cmd) {
  208. case WDIOC_GETSUPPORT:
  209. return copy_to_user((struct watchdog_info *)arg,
  210. &sh_wdt_info, sizeof(sh_wdt_info)) ? -EFAULT : 0;
  211. case WDIOC_GETSTATUS:
  212. case WDIOC_GETBOOTSTATUS:
  213. return put_user(0, (int *)arg);
  214. case WDIOC_SETOPTIONS:
  215. if (get_user(options, (int *)arg))
  216. return -EFAULT;
  217. if (options & WDIOS_DISABLECARD) {
  218. sh_wdt_stop(wdt);
  219. retval = 0;
  220. }
  221. if (options & WDIOS_ENABLECARD) {
  222. sh_wdt_start(wdt);
  223. retval = 0;
  224. }
  225. return retval;
  226. case WDIOC_KEEPALIVE:
  227. sh_wdt_keepalive(wdt);
  228. return 0;
  229. case WDIOC_SETTIMEOUT:
  230. if (get_user(new_heartbeat, (int *)arg))
  231. return -EFAULT;
  232. if (sh_wdt_set_heartbeat(new_heartbeat))
  233. return -EINVAL;
  234. sh_wdt_keepalive(wdt);
  235. /* Fall */
  236. case WDIOC_GETTIMEOUT:
  237. return put_user(heartbeat, (int *)arg);
  238. default:
  239. return -ENOTTY;
  240. }
  241. return 0;
  242. }
  243. static int sh_wdt_notify_sys(struct notifier_block *this,
  244. unsigned long code, void *unused)
  245. {
  246. struct sh_wdt *wdt = platform_get_drvdata(sh_wdt_dev);
  247. if (code == SYS_DOWN || code == SYS_HALT)
  248. sh_wdt_stop(wdt);
  249. return NOTIFY_DONE;
  250. }
  251. static const struct file_operations sh_wdt_fops = {
  252. .owner = THIS_MODULE,
  253. .llseek = no_llseek,
  254. .write = sh_wdt_write,
  255. .unlocked_ioctl = sh_wdt_ioctl,
  256. .open = sh_wdt_open,
  257. .release = sh_wdt_close,
  258. };
  259. static const struct watchdog_info sh_wdt_info = {
  260. .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
  261. WDIOF_MAGICCLOSE,
  262. .firmware_version = 1,
  263. .identity = "SH WDT",
  264. };
  265. static struct notifier_block sh_wdt_notifier = {
  266. .notifier_call = sh_wdt_notify_sys,
  267. };
  268. static struct miscdevice sh_wdt_miscdev = {
  269. .minor = WATCHDOG_MINOR,
  270. .name = "watchdog",
  271. .fops = &sh_wdt_fops,
  272. };
  273. static int __devinit sh_wdt_probe(struct platform_device *pdev)
  274. {
  275. struct sh_wdt *wdt;
  276. struct resource *res;
  277. int rc;
  278. /*
  279. * As this driver only covers the global watchdog case, reject
  280. * any attempts to register per-CPU watchdogs.
  281. */
  282. if (pdev->id != -1)
  283. return -EINVAL;
  284. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  285. if (unlikely(!res))
  286. return -EINVAL;
  287. if (!devm_request_mem_region(&pdev->dev, res->start,
  288. resource_size(res), DRV_NAME))
  289. return -EBUSY;
  290. wdt = devm_kzalloc(&pdev->dev, sizeof(struct sh_wdt), GFP_KERNEL);
  291. if (unlikely(!wdt)) {
  292. rc = -ENOMEM;
  293. goto out_release;
  294. }
  295. wdt->dev = &pdev->dev;
  296. wdt->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
  297. if (unlikely(!wdt->base)) {
  298. rc = -ENXIO;
  299. goto out_err;
  300. }
  301. rc = register_reboot_notifier(&sh_wdt_notifier);
  302. if (unlikely(rc)) {
  303. dev_err(&pdev->dev,
  304. "Can't register reboot notifier (err=%d)\n", rc);
  305. goto out_unmap;
  306. }
  307. sh_wdt_miscdev.parent = wdt->dev;
  308. rc = misc_register(&sh_wdt_miscdev);
  309. if (unlikely(rc)) {
  310. dev_err(&pdev->dev,
  311. "Can't register miscdev on minor=%d (err=%d)\n",
  312. sh_wdt_miscdev.minor, rc);
  313. goto out_unreg;
  314. }
  315. init_timer(&wdt->timer);
  316. wdt->timer.function = sh_wdt_ping;
  317. wdt->timer.data = (unsigned long)wdt;
  318. wdt->timer.expires = next_ping_period(clock_division_ratio);
  319. platform_set_drvdata(pdev, wdt);
  320. sh_wdt_dev = pdev;
  321. dev_info(&pdev->dev, "initialized.\n");
  322. return 0;
  323. out_unreg:
  324. unregister_reboot_notifier(&sh_wdt_notifier);
  325. out_unmap:
  326. devm_iounmap(&pdev->dev, wdt->base);
  327. out_err:
  328. devm_kfree(&pdev->dev, wdt);
  329. out_release:
  330. devm_release_mem_region(&pdev->dev, res->start, resource_size(res));
  331. return rc;
  332. }
  333. static int __devexit sh_wdt_remove(struct platform_device *pdev)
  334. {
  335. struct sh_wdt *wdt = platform_get_drvdata(pdev);
  336. struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  337. platform_set_drvdata(pdev, NULL);
  338. misc_deregister(&sh_wdt_miscdev);
  339. sh_wdt_dev = NULL;
  340. unregister_reboot_notifier(&sh_wdt_notifier);
  341. devm_release_mem_region(&pdev->dev, res->start, resource_size(res));
  342. devm_iounmap(&pdev->dev, wdt->base);
  343. devm_kfree(&pdev->dev, wdt);
  344. return 0;
  345. }
  346. static struct platform_driver sh_wdt_driver = {
  347. .driver = {
  348. .name = DRV_NAME,
  349. .owner = THIS_MODULE,
  350. },
  351. .probe = sh_wdt_probe,
  352. .remove = __devexit_p(sh_wdt_remove),
  353. };
  354. static int __init sh_wdt_init(void)
  355. {
  356. int rc;
  357. if (unlikely(clock_division_ratio < 0x5 ||
  358. clock_division_ratio > 0x7)) {
  359. clock_division_ratio = WTCSR_CKS_4096;
  360. pr_info("divisor must be 0x5<=x<=0x7, using %d\n",
  361. clock_division_ratio);
  362. }
  363. rc = sh_wdt_set_heartbeat(heartbeat);
  364. if (unlikely(rc)) {
  365. heartbeat = WATCHDOG_HEARTBEAT;
  366. pr_info("heartbeat value must be 1<=x<=3600, using %d\n",
  367. heartbeat);
  368. }
  369. pr_info("configured with heartbeat=%d sec (nowayout=%d)\n",
  370. heartbeat, nowayout);
  371. return platform_driver_register(&sh_wdt_driver);
  372. }
  373. static void __exit sh_wdt_exit(void)
  374. {
  375. platform_driver_unregister(&sh_wdt_driver);
  376. }
  377. module_init(sh_wdt_init);
  378. module_exit(sh_wdt_exit);
  379. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
  380. MODULE_DESCRIPTION("SuperH watchdog driver");
  381. MODULE_LICENSE("GPL");
  382. MODULE_ALIAS("platform:" DRV_NAME);
  383. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  384. module_param(clock_division_ratio, int, 0);
  385. MODULE_PARM_DESC(clock_division_ratio,
  386. "Clock division ratio. Valid ranges are from 0x5 (1.31ms) "
  387. "to 0x7 (5.25ms). (default=" __MODULE_STRING(WTCSR_CKS_4096) ")");
  388. module_param(heartbeat, int, 0);
  389. MODULE_PARM_DESC(heartbeat,
  390. "Watchdog heartbeat in seconds. (1 <= heartbeat <= 3600, default="
  391. __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
  392. module_param(nowayout, bool, 0);
  393. MODULE_PARM_DESC(nowayout,
  394. "Watchdog cannot be stopped once started (default="
  395. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");