mpc8xxx_wdt.c 8.1 KB

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  1. /*
  2. * mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
  3. *
  4. * Authors: Dave Updegraff <dave@cray.org>
  5. * Kumar Gala <galak@kernel.crashing.org>
  6. * Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
  7. * ..and from sc520_wdt
  8. * Copyright (c) 2008 MontaVista Software, Inc.
  9. * Anton Vorontsov <avorontsov@ru.mvista.com>
  10. *
  11. * Note: it appears that you can only actually ENABLE or DISABLE the thing
  12. * once after POR. Once enabled, you cannot disable, and vice versa.
  13. *
  14. * This program is free software; you can redistribute it and/or modify it
  15. * under the terms of the GNU General Public License as published by the
  16. * Free Software Foundation; either version 2 of the License, or (at your
  17. * option) any later version.
  18. */
  19. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/kernel.h>
  23. #include <linux/timer.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/module.h>
  27. #include <linux/watchdog.h>
  28. #include <linux/io.h>
  29. #include <linux/uaccess.h>
  30. #include <sysdev/fsl_soc.h>
  31. struct mpc8xxx_wdt {
  32. __be32 res0;
  33. __be32 swcrr; /* System watchdog control register */
  34. #define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
  35. #define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
  36. #define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
  37. #define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
  38. __be32 swcnr; /* System watchdog count register */
  39. u8 res1[2];
  40. __be16 swsrr; /* System watchdog service register */
  41. u8 res2[0xF0];
  42. };
  43. struct mpc8xxx_wdt_type {
  44. int prescaler;
  45. bool hw_enabled;
  46. };
  47. static struct mpc8xxx_wdt __iomem *wd_base;
  48. static int mpc8xxx_wdt_init_late(void);
  49. static u16 timeout = 0xffff;
  50. module_param(timeout, ushort, 0);
  51. MODULE_PARM_DESC(timeout,
  52. "Watchdog timeout in ticks. (0<timeout<65536, default=65535)");
  53. static bool reset = 1;
  54. module_param(reset, bool, 0);
  55. MODULE_PARM_DESC(reset,
  56. "Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");
  57. static bool nowayout = WATCHDOG_NOWAYOUT;
  58. module_param(nowayout, bool, 0);
  59. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  60. "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  61. /*
  62. * We always prescale, but if someone really doesn't want to they can set this
  63. * to 0
  64. */
  65. static int prescale = 1;
  66. static unsigned int timeout_sec;
  67. static unsigned long wdt_is_open;
  68. static DEFINE_SPINLOCK(wdt_spinlock);
  69. static void mpc8xxx_wdt_keepalive(void)
  70. {
  71. /* Ping the WDT */
  72. spin_lock(&wdt_spinlock);
  73. out_be16(&wd_base->swsrr, 0x556c);
  74. out_be16(&wd_base->swsrr, 0xaa39);
  75. spin_unlock(&wdt_spinlock);
  76. }
  77. static void mpc8xxx_wdt_timer_ping(unsigned long arg);
  78. static DEFINE_TIMER(wdt_timer, mpc8xxx_wdt_timer_ping, 0, 0);
  79. static void mpc8xxx_wdt_timer_ping(unsigned long arg)
  80. {
  81. mpc8xxx_wdt_keepalive();
  82. /* We're pinging it twice faster than needed, just to be sure. */
  83. mod_timer(&wdt_timer, jiffies + HZ * timeout_sec / 2);
  84. }
  85. static void mpc8xxx_wdt_pr_warn(const char *msg)
  86. {
  87. pr_crit("%s, expect the %s soon!\n", msg,
  88. reset ? "reset" : "machine check exception");
  89. }
  90. static ssize_t mpc8xxx_wdt_write(struct file *file, const char __user *buf,
  91. size_t count, loff_t *ppos)
  92. {
  93. if (count)
  94. mpc8xxx_wdt_keepalive();
  95. return count;
  96. }
  97. static int mpc8xxx_wdt_open(struct inode *inode, struct file *file)
  98. {
  99. u32 tmp = SWCRR_SWEN;
  100. if (test_and_set_bit(0, &wdt_is_open))
  101. return -EBUSY;
  102. /* Once we start the watchdog we can't stop it */
  103. if (nowayout)
  104. __module_get(THIS_MODULE);
  105. /* Good, fire up the show */
  106. if (prescale)
  107. tmp |= SWCRR_SWPR;
  108. if (reset)
  109. tmp |= SWCRR_SWRI;
  110. tmp |= timeout << 16;
  111. out_be32(&wd_base->swcrr, tmp);
  112. del_timer_sync(&wdt_timer);
  113. return nonseekable_open(inode, file);
  114. }
  115. static int mpc8xxx_wdt_release(struct inode *inode, struct file *file)
  116. {
  117. if (!nowayout)
  118. mpc8xxx_wdt_timer_ping(0);
  119. else
  120. mpc8xxx_wdt_pr_warn("watchdog closed");
  121. clear_bit(0, &wdt_is_open);
  122. return 0;
  123. }
  124. static long mpc8xxx_wdt_ioctl(struct file *file, unsigned int cmd,
  125. unsigned long arg)
  126. {
  127. void __user *argp = (void __user *)arg;
  128. int __user *p = argp;
  129. static const struct watchdog_info ident = {
  130. .options = WDIOF_KEEPALIVEPING,
  131. .firmware_version = 1,
  132. .identity = "MPC8xxx",
  133. };
  134. switch (cmd) {
  135. case WDIOC_GETSUPPORT:
  136. return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
  137. case WDIOC_GETSTATUS:
  138. case WDIOC_GETBOOTSTATUS:
  139. return put_user(0, p);
  140. case WDIOC_KEEPALIVE:
  141. mpc8xxx_wdt_keepalive();
  142. return 0;
  143. case WDIOC_GETTIMEOUT:
  144. return put_user(timeout_sec, p);
  145. default:
  146. return -ENOTTY;
  147. }
  148. }
  149. static const struct file_operations mpc8xxx_wdt_fops = {
  150. .owner = THIS_MODULE,
  151. .llseek = no_llseek,
  152. .write = mpc8xxx_wdt_write,
  153. .unlocked_ioctl = mpc8xxx_wdt_ioctl,
  154. .open = mpc8xxx_wdt_open,
  155. .release = mpc8xxx_wdt_release,
  156. };
  157. static struct miscdevice mpc8xxx_wdt_miscdev = {
  158. .minor = WATCHDOG_MINOR,
  159. .name = "watchdog",
  160. .fops = &mpc8xxx_wdt_fops,
  161. };
  162. static const struct of_device_id mpc8xxx_wdt_match[];
  163. static int __devinit mpc8xxx_wdt_probe(struct platform_device *ofdev)
  164. {
  165. int ret;
  166. const struct of_device_id *match;
  167. struct device_node *np = ofdev->dev.of_node;
  168. struct mpc8xxx_wdt_type *wdt_type;
  169. u32 freq = fsl_get_sys_freq();
  170. bool enabled;
  171. match = of_match_device(mpc8xxx_wdt_match, &ofdev->dev);
  172. if (!match)
  173. return -EINVAL;
  174. wdt_type = match->data;
  175. if (!freq || freq == -1)
  176. return -EINVAL;
  177. wd_base = of_iomap(np, 0);
  178. if (!wd_base)
  179. return -ENOMEM;
  180. enabled = in_be32(&wd_base->swcrr) & SWCRR_SWEN;
  181. if (!enabled && wdt_type->hw_enabled) {
  182. pr_info("could not be enabled in software\n");
  183. ret = -ENOSYS;
  184. goto err_unmap;
  185. }
  186. /* Calculate the timeout in seconds */
  187. if (prescale)
  188. timeout_sec = (timeout * wdt_type->prescaler) / freq;
  189. else
  190. timeout_sec = timeout / freq;
  191. #ifdef MODULE
  192. ret = mpc8xxx_wdt_init_late();
  193. if (ret)
  194. goto err_unmap;
  195. #endif
  196. pr_info("WDT driver for MPC8xxx initialized. mode:%s timeout=%d (%d seconds)\n",
  197. reset ? "reset" : "interrupt", timeout, timeout_sec);
  198. /*
  199. * If the watchdog was previously enabled or we're running on
  200. * MPC8xxx, we should ping the wdt from the kernel until the
  201. * userspace handles it.
  202. */
  203. if (enabled)
  204. mpc8xxx_wdt_timer_ping(0);
  205. return 0;
  206. err_unmap:
  207. iounmap(wd_base);
  208. wd_base = NULL;
  209. return ret;
  210. }
  211. static int __devexit mpc8xxx_wdt_remove(struct platform_device *ofdev)
  212. {
  213. mpc8xxx_wdt_pr_warn("watchdog removed");
  214. del_timer_sync(&wdt_timer);
  215. misc_deregister(&mpc8xxx_wdt_miscdev);
  216. iounmap(wd_base);
  217. return 0;
  218. }
  219. static const struct of_device_id mpc8xxx_wdt_match[] = {
  220. {
  221. .compatible = "mpc83xx_wdt",
  222. .data = &(struct mpc8xxx_wdt_type) {
  223. .prescaler = 0x10000,
  224. },
  225. },
  226. {
  227. .compatible = "fsl,mpc8610-wdt",
  228. .data = &(struct mpc8xxx_wdt_type) {
  229. .prescaler = 0x10000,
  230. .hw_enabled = true,
  231. },
  232. },
  233. {
  234. .compatible = "fsl,mpc823-wdt",
  235. .data = &(struct mpc8xxx_wdt_type) {
  236. .prescaler = 0x800,
  237. },
  238. },
  239. {},
  240. };
  241. MODULE_DEVICE_TABLE(of, mpc8xxx_wdt_match);
  242. static struct platform_driver mpc8xxx_wdt_driver = {
  243. .probe = mpc8xxx_wdt_probe,
  244. .remove = __devexit_p(mpc8xxx_wdt_remove),
  245. .driver = {
  246. .name = "mpc8xxx_wdt",
  247. .owner = THIS_MODULE,
  248. .of_match_table = mpc8xxx_wdt_match,
  249. },
  250. };
  251. /*
  252. * We do wdt initialization in two steps: arch_initcall probes the wdt
  253. * very early to start pinging the watchdog (misc devices are not yet
  254. * available), and later module_init() just registers the misc device.
  255. */
  256. static int mpc8xxx_wdt_init_late(void)
  257. {
  258. int ret;
  259. if (!wd_base)
  260. return -ENODEV;
  261. ret = misc_register(&mpc8xxx_wdt_miscdev);
  262. if (ret) {
  263. pr_err("cannot register miscdev on minor=%d (err=%d)\n",
  264. WATCHDOG_MINOR, ret);
  265. return ret;
  266. }
  267. return 0;
  268. }
  269. #ifndef MODULE
  270. module_init(mpc8xxx_wdt_init_late);
  271. #endif
  272. static int __init mpc8xxx_wdt_init(void)
  273. {
  274. return platform_driver_register(&mpc8xxx_wdt_driver);
  275. }
  276. arch_initcall(mpc8xxx_wdt_init);
  277. static void __exit mpc8xxx_wdt_exit(void)
  278. {
  279. platform_driver_unregister(&mpc8xxx_wdt_driver);
  280. }
  281. module_exit(mpc8xxx_wdt_exit);
  282. MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
  283. MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx "
  284. "uProcessors");
  285. MODULE_LICENSE("GPL");
  286. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);