sii8240.c 148 KB

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  1. /*
  2. * Copyright (C) 2012 Samsung Electronics
  3. *
  4. * Author: kmini.park <kmini.park@samsung.com>
  5. * Sangmi Park <sm0327.park@samsung.com>
  6. * Date: 2:06 PM, 1st June,2012
  7. *
  8. * Based on drivers/video/sii9234.c[Google AOSP(Galaxy Nexus/Tuna)]
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. */
  25. #include <linux/err.h>
  26. #include <linux/module.h>
  27. #include <linux/i2c.h>
  28. #include <linux/gpio.h>
  29. #include <linux/mutex.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/qpnp/pin.h>
  32. #include <linux/sii8240.h>
  33. #include <linux/kernel.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/wait.h>
  36. #include <linux/slab.h>
  37. #include <linux/delay.h>
  38. #include <video/edid.h>
  39. #include <linux/input.h>
  40. #include "sii8240_rcp.h"
  41. #include "sii8240_platform.h"
  42. #include "sii8240_driver.h"
  43. /*#include <linux/barcode_emul.h>*/
  44. #if defined(CONFIG_OF)
  45. #include <linux/of_device.h>
  46. #include <linux/of_gpio.h>
  47. #ifdef SII8240_CHECK_MONITOR
  48. #include <mach/scm.h>
  49. #endif
  50. #undef pr_debug
  51. #define pr_debug pr_info
  52. #undef dev_dbg
  53. #define dev_dbg dev_info
  54. #endif
  55. #define CONFIG_MHL_SWING_LEVEL 1
  56. #ifdef CONFIG_EXTCON
  57. static struct sec_mhl_cable support_cable_list[] = {
  58. { .cable_type = EXTCON_MHL, },
  59. { .cable_type = EXTCON_MHL_VB, },
  60. { .cable_type = EXTCON_SMARTDOCK, },
  61. };
  62. #endif
  63. static struct device *sii8240_mhldev;
  64. static struct sii8240_data *g_sii8240;
  65. #ifdef SII8240_CHECK_MONITOR
  66. static struct hdcp_auth_status g_monitor_cmd;
  67. #endif
  68. struct class *sec_mhl;
  69. EXPORT_SYMBOL(sec_mhl);
  70. #ifdef SII8240_CHECK_MONITOR
  71. static int sii8240_scm_call(struct sii8240_data *sii8240, u32 svc_id, u32 cmd_id,
  72. const void *cmd_buf, size_t cmd_len, void *resp_buf, size_t resp_len)
  73. {
  74. int ret = 0;
  75. if (sii8240->ckdt_stable)
  76. ret = scm_call(svc_id, cmd_id, cmd_buf, cmd_len, resp_buf, resp_len);
  77. return ret;
  78. }
  79. #endif
  80. static int mhl_write_byte_reg(struct i2c_client *client, u32 offset,
  81. u8 value)
  82. {
  83. int ret = i2c_smbus_write_byte_data(client, offset, value);
  84. if (unlikely(ret < 0))
  85. pr_err("[ERROR] sii8240: %s():%d offset:0x%X ret:%d\n",
  86. __func__, __LINE__, offset, ret);
  87. return ret;
  88. }
  89. static int mhl_read_byte_reg(struct i2c_client *client, unsigned int offset,
  90. u8 *value)
  91. {
  92. int ret;
  93. if (!value)
  94. return -EINVAL;
  95. ret = i2c_smbus_read_byte_data(client, offset);
  96. if (unlikely(ret < 0)) {
  97. pr_err("[ERROR] sii8240: %s():%d offset:0x%X ret:%d\n",
  98. __func__, __LINE__, offset, ret);
  99. return ret;
  100. }
  101. *value = ret & 0x000000FF;
  102. return 0;
  103. }
  104. static int mhl_write_block_reg(struct i2c_client *client, unsigned int offset,
  105. u8 len, u8 *values)
  106. {
  107. int ret;
  108. if (!values)
  109. return -EINVAL;
  110. ret = i2c_smbus_write_i2c_block_data(client, offset, len, values);
  111. if (unlikely(ret < 0))
  112. pr_err("[ERROR] sii8240: %s():%d offset:0x%X ret:%d\n",
  113. __func__, __LINE__, offset, ret);
  114. return ret;
  115. }
  116. static int mhl_read_block_reg(struct i2c_client *client, unsigned int offset,
  117. u8 len, u8 *values)
  118. {
  119. int ret;
  120. if (!values)
  121. return -EINVAL;
  122. ret = i2c_smbus_read_i2c_block_data(client, offset, len, values);
  123. if (unlikely(ret < 0))
  124. pr_err("[ERROR] sii8240: %s():%d offset:0x%X ret:%d\n",
  125. __func__, __LINE__, offset, ret);
  126. return ret;
  127. }
  128. static int mhl_modify_reg(struct i2c_client *i2c_client, u8 offset,
  129. u8 mask, u8 data)
  130. {
  131. u8 rd;
  132. int ret;
  133. ret = mhl_read_byte_reg(i2c_client, offset, &rd);
  134. if (unlikely(ret < 0)) {
  135. pr_err("[ERROR] sii8240: %s():%d offset:0x%X ret:%d\n",
  136. __func__, __LINE__, offset, ret);
  137. return ret;
  138. }
  139. rd &= ~mask;
  140. rd |= (data & mask);
  141. ret = mhl_write_byte_reg(i2c_client, offset, rd);
  142. if (unlikely(ret < 0))
  143. pr_err("[ERROR] sii8240: %s():%d offset:0x%X ret:%d\n",
  144. __func__, __LINE__, offset, ret);
  145. return ret;
  146. }
  147. /* NOTE: Registers are set and cleared either by 1 or 0.
  148. * Functions calling these mhl_set_reg and mhl_clear_reg should
  149. * take care of these register-specific details and adjust the mask
  150. */
  151. static int mhl_clear_reg(struct i2c_client *client, unsigned int offset,
  152. u8 mask)
  153. {
  154. int ret;
  155. u8 value;
  156. ret = mhl_read_byte_reg(client, offset, &value);
  157. if (unlikely(ret < 0)) {
  158. pr_err("[ERROR] sii8240: %s():%d offset:0x%X ret:%d\n",
  159. __func__, __LINE__, offset, ret);
  160. return ret;
  161. }
  162. value &= ~mask;
  163. ret = mhl_write_byte_reg(client, offset, value);
  164. if (unlikely(ret < 0))
  165. pr_err("[ERROR] sii8240: %s():%d offset:0x%X ret:%d\n",
  166. __func__, __LINE__, offset, ret);
  167. return ret;
  168. }
  169. static int mhl_set_reg(struct i2c_client *client, unsigned int offset,
  170. u8 mask)
  171. {
  172. int ret;
  173. u8 value;
  174. ret = mhl_read_byte_reg(client, offset, &value);
  175. if (unlikely(ret < 0)) {
  176. pr_err("[ERROR] sii8240: %s():%d offset:0x%X ret:%d\n",
  177. __func__, __LINE__, offset, ret);
  178. return ret;
  179. }
  180. value |= mask;
  181. ret = mhl_write_byte_reg(client, offset, value);
  182. if (unlikely(ret < 0))
  183. pr_err("[ERROR] sii8240: %s():%d offset:0x%X ret:%d\n",
  184. __func__, __LINE__, offset, ret);
  185. return ret;
  186. }
  187. #ifdef SII8240_CHECK_MONITOR
  188. static void sii8240_link_monitor_timer(unsigned long data)
  189. {
  190. struct sii8240_data *sii8240;
  191. sii8240 = dev_get_drvdata(sii8240_mhldev);
  192. queue_work(sii8240->mhl_link_monitor_wq, &sii8240->mhl_link_monitor_work);
  193. }
  194. static void sii8240_link_monitor_work(struct work_struct *work)
  195. {
  196. int ret;
  197. unsigned char rd_data = 0, hdcp_query = 0, status = 0;
  198. struct sii8240_data *sii8240 = dev_get_drvdata(sii8240_mhldev);
  199. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  200. unsigned char rd_data2 = 0;
  201. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  202. if (sii8240->state < STATE_MHL_DISCOVERY_SUCCESS) {
  203. g_monitor_cmd.a |= 0x08;
  204. g_monitor_cmd.a &= ~(0x01);
  205. del_timer_sync(&sii8240->mhl_timer);
  206. sii8240_scm_call(sii8240, _SCM_SVC_OEM, _SCM_OEM_CMD, &g_monitor_cmd, sizeof(g_monitor_cmd), NULL, 0);
  207. pr_info("%s() g_monitor_cmd.a = %d\n", __func__, g_monitor_cmd.a);
  208. pr_info("%s() : mhl status = %d\n", __func__, sii8240->state);
  209. return;
  210. }
  211. ret = mhl_read_byte_reg(tpi, TPI_HDCP_QUERY_DATA_REG, &hdcp_query);
  212. if (unlikely(ret < 0)) {
  213. pr_err ("[ERROR] %s() mhl already has been shut down\n", __func__);
  214. return;
  215. }
  216. rd_data = hdcp_query & HDCP_REPEATER_MASK;
  217. if (rd_data) {
  218. status = hdcp_query & EXTENDED_LINK_PROTECTION_MASK;
  219. pr_info("%s() repeater extended = %d\n", __func__, status);
  220. } else {
  221. status = hdcp_query & LOCAL_LINK_PROTECTION_MASK;
  222. pr_info("%s() local = %d\n", __func__, status);
  223. }
  224. if (status == 0) {
  225. g_monitor_cmd.a |= 0x04;
  226. sii8240_scm_call(sii8240, _SCM_SVC_OEM, _SCM_OEM_CMD, &g_monitor_cmd, sizeof(g_monitor_cmd), NULL, 0);
  227. pr_info("%s() g_monitor_cmd.a = %d\n", __func__, g_monitor_cmd.a);
  228. } else {
  229. g_monitor_cmd.a |= 0x02;
  230. sii8240_scm_call(sii8240, _SCM_SVC_OEM, _SCM_OEM_CMD, &g_monitor_cmd, sizeof(g_monitor_cmd), NULL, 0);
  231. pr_info("%s() g_monitor_cmd.a = %d\n", __func__, g_monitor_cmd.a);
  232. }
  233. /* check if AV_SET_MUTE is coming from QC (BIT6 of PAGE_2:0xA0 register) */
  234. ret = mhl_read_byte_reg(hdmi, 0xA0, &rd_data2);
  235. if (ret < 0)
  236. pr_err("[ERROR]sii8240: %s():%d failed !\n", __func__, __LINE__);
  237. else
  238. pr_info("sii8240: %s(): [jgk] PAGE_2:0xA0:0x%02x !\n", __func__, rd_data2);
  239. mod_timer(&sii8240->mhl_timer, jiffies + msecs_to_jiffies(1000));
  240. }
  241. #endif
  242. static int set_mute_mode(struct sii8240_data *sii8240, bool mute)
  243. {
  244. int ret;
  245. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  246. pr_info("set_mute_mode : %d\n", mute);
  247. if (mute) {
  248. ret = mhl_modify_reg(tpi, 0x1A, AV_MUTE_MASK, AV_MUTE_MASK);
  249. if (unlikely(ret < 0)) {
  250. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  251. __func__, __LINE__);
  252. return ret;
  253. }
  254. } else {
  255. ret = mhl_modify_reg(tpi, 0x1A, AV_MUTE_MASK, AV_MUTE_NORMAL);
  256. if (unlikely(ret < 0)) {
  257. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  258. __func__, __LINE__);
  259. return ret;
  260. }
  261. }
  262. return ret;
  263. }
  264. static int sii8240_send_avi_infoframe(struct sii8240_data *sii8240)
  265. {
  266. int ret = 0;
  267. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  268. pr_info("sii8240: send avi infoframe %d\n", sii8240->hdmi_sink);
  269. if (sii8240->hdmi_sink)
  270. ret = mhl_write_block_reg(tpi, 0x0C, SIZE_AVI_INFOFRAME,
  271. sii8240->output_avi_data);
  272. return ret;
  273. }
  274. #ifdef SFEATURE_HDCP_SUPPORT
  275. void mhl_ddc_bypass(bool bypass_on)
  276. {
  277. int ret = 0;
  278. struct i2c_client *tmds = g_sii8240->pdata->tmds_client;
  279. pr_info("sii8240: ddc bypass - %s\n", bypass_on ? "on" : "off");
  280. if (bypass_on == true) {
  281. ret = mhl_set_reg(tmds, DCTL_REG, EXT_DDC_SEL);
  282. if (unlikely(ret < 0))
  283. pr_err("sii8240: %s():%d Fail to set register\n",
  284. __func__, __LINE__);
  285. } else {
  286. ret = mhl_clear_reg(tmds, DCTL_REG, EXT_DDC_SEL);
  287. if (unlikely(ret < 0))
  288. pr_err("sii8240: %s():%d Fail to set register\n",
  289. __func__, __LINE__);
  290. }
  291. }
  292. static int sii8240_hdcp_on(struct sii8240_data *sii8240, bool hdcp_on)
  293. {
  294. int ret = 0;
  295. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  296. if (hdcp_on) {
  297. pr_info("sii8240: HDCP On\n");
  298. #ifdef CONFIG_ARCH_MSM8974
  299. /* execute AP HDCP if HW rev > 06 and no KS01*/
  300. if (sii8240->pdata->drm_workaround)
  301. platform_ap_hdmi_hdcp_auth(sii8240);
  302. #endif
  303. ret = mhl_modify_reg(tpi, HDCP_CTRL,
  304. BIT_TPI_HDCP_CONTROL_DATA_DOUBLE_RI_CHECK_MASK |
  305. BIT_TPI_HDCP_CONTROL_DATA_COPP_PROTLEVEL_MASK,
  306. BIT_TPI_HDCP_CONTROL_DATA_DOUBLE_RI_CHECK_ENABLE |
  307. BIT_TPI_HDCP_CONTROL_DATA_COPP_PROTLEVEL_MAX);
  308. if (unlikely(ret < 0)) {
  309. pr_err("[ERROR] %s() unable to set HDCP_CTRL register\n", __func__);
  310. return ret;
  311. }
  312. #ifdef SII8240_CHECK_MONITOR
  313. g_monitor_cmd.a = 0x01;
  314. g_monitor_cmd.b = NULL;
  315. g_monitor_cmd.c = NULL;
  316. g_monitor_cmd.d = 0;
  317. sii8240_scm_call(sii8240, _SCM_SVC_OEM, _SCM_OEM_CMD, &g_monitor_cmd, sizeof(g_monitor_cmd), NULL, 0);
  318. pr_info("%s() g_monitor_cmd.a = %d\n", __func__, g_monitor_cmd.a);
  319. #endif
  320. } else {
  321. pr_info("sii8240:HDCP Off\n");
  322. ret = mhl_write_byte_reg(tpi, HDCP_CTRL, 0x00);
  323. if (unlikely(ret < 0)) {
  324. pr_err("[ERROR] unable to reset HDCP_CTRL register to 0x00\n");
  325. return ret;
  326. }
  327. #ifdef SII8240_CHECK_MONITOR
  328. g_monitor_cmd.a |= 0x08;
  329. g_monitor_cmd.a &= ~(0x01);
  330. del_timer_sync(&sii8240->mhl_timer);
  331. cancel_work_sync(&sii8240->mhl_link_monitor_work);
  332. sii8240_scm_call(sii8240, _SCM_SVC_OEM, _SCM_OEM_CMD, &g_monitor_cmd, sizeof(g_monitor_cmd), NULL, 0);
  333. pr_info("%s() g_monitor_cmd.a = %d\n", __func__, g_monitor_cmd.a);
  334. #endif
  335. }
  336. return ret;
  337. }
  338. static int sii8240_tmds_active_hdcp(struct sii8240_data *sii8240)
  339. {
  340. int ret;
  341. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  342. ret = set_mute_mode(sii8240, true);
  343. if (unlikely(ret < 0)) {
  344. pr_err("[ERROR] %s() set_mute_mode fail %d\n", __func__, __LINE__);
  345. return ret;
  346. }
  347. ret = mhl_modify_reg(tpi, 0x1A,
  348. TMDS_OUTPUT_CONTROL_MASK, TMDS_OUTPUT_CONTROL_POWER_DOWN);
  349. if (unlikely(ret < 0)) {
  350. pr_err("[ERROR] %s() mhl_modify_reg fail %d\n", __func__, __LINE__);
  351. return ret;
  352. }
  353. ret = mhl_modify_reg(tpi, 0x1A,
  354. TMDS_OUTPUT_CONTROL_MASK, TMDS_OUTPUT_CONTROL_ACTIVE);
  355. if (unlikely(ret < 0)) {
  356. pr_err("[ERROR] %s() mhl_modify_reg fail %d\n", __func__, __LINE__);
  357. return ret;
  358. }
  359. pr_info("sii8240 : %s\n", __func__);
  360. ret = sii8240_send_avi_infoframe(sii8240);
  361. if (unlikely(ret < 0)) {
  362. pr_err("[ERROR] %s() sii8240_send_avi_infoframe fail %d\n", __func__, __LINE__);
  363. return ret;
  364. }
  365. return ret;
  366. }
  367. #endif
  368. static int tmds_control(struct sii8240_data *sii8240, bool tmds_on)
  369. {
  370. int ret;
  371. #ifdef SFEATURE_HDCP_SUPPORT
  372. u8 value, value2;
  373. #endif
  374. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  375. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  376. sii8240->tmds_enable = tmds_on;
  377. pr_info("sii8240 : %s() TMDS ==> %d\n", __func__, tmds_on);
  378. ret = mhl_modify_reg(hdmi, 0x81, 0x3F, 0x3C);
  379. if (unlikely(ret < 0)) {
  380. pr_err("[ERROR]sii8240: %s():%d mhl_modify_reg failed !\n",
  381. __func__, __LINE__);
  382. return ret;
  383. }
  384. ret = mhl_modify_reg(hdmi, 0x87, 0x07, 0x03);
  385. if (unlikely(ret < 0)) {
  386. pr_err("[ERROR]sii8240: %s():%d mhl_modify_reg failed !\n",
  387. __func__, __LINE__);
  388. return ret;
  389. }
  390. switch (tmds_on) {
  391. case true:
  392. #ifdef SFEATURE_HDCP_SUPPORT
  393. ret = mhl_read_byte_reg(tpi, 0x1A, &value);
  394. if (TMDS_OUTPUT_CONTROL_POWER_DOWN & value) {
  395. pr_info("sii8240: TMDS status is power_down\n");
  396. ret = sii8240_tmds_active_hdcp(sii8240);
  397. if (unlikely(ret < 0)) {
  398. pr_err("[ERROR]sii8240: %s():%d sii8240_tmds_active_hdcp failed !\n",
  399. __func__, __LINE__);
  400. return ret;
  401. }
  402. } else {
  403. ret = mhl_read_byte_reg(tpi, 0x29, &value2);
  404. if (unlikely(ret < 0)) {
  405. pr_err("[ERROR] sii8240: %s():%d mhl_read_byte_reg failed !\n",
  406. __func__, __LINE__);
  407. return ret;
  408. }
  409. if (LINK_STATUS_NORMAL != (LINK_STATUS_MASK & value2)) {
  410. ret = sii8240_tmds_active_hdcp(sii8240);
  411. if (unlikely(ret < 0)) {
  412. pr_err("[ERROR] sii8240: %s():%d sii8240_tmds_active_hdcp failed !\n",
  413. __func__, __LINE__);
  414. return ret;
  415. }
  416. } else if (AV_MUTE_MUTED & value) {
  417. ret = set_mute_mode(sii8240, false);
  418. if (unlikely(ret < 0)) {
  419. pr_err("[ERROR] sii8240: %s():%d set_mute_mode failed !\n",
  420. __func__, __LINE__);
  421. return ret;
  422. }
  423. }
  424. }
  425. #else
  426. ret = mhl_modify_reg(tpi, 0x1A,
  427. AV_MUTE_MASK|TMDS_OUTPUT_CONTROL_MASK,
  428. AV_MUTE_NORMAL|TMDS_OUTPUT_CONTROL_ACTIVE);
  429. if (unlikely(ret < 0)) {
  430. pr_err("[ERROR]sii8240: %s():%d mhl_modify_reg failed !\n",
  431. __func__, __LINE__);
  432. return ret;
  433. }
  434. ret = sii8240_send_avi_infoframe(sii8240);
  435. if (unlikely(ret < 0)) {
  436. pr_err("[ERROR]sii8240: %s():%d sii8240_send_avi_infoframe failed !\n",
  437. __func__, __LINE__);
  438. return ret;
  439. }
  440. if (unlikely(ret < 0))
  441. pr_err("[ERROR] %s() send AVIF fail\n", __func__);
  442. #endif
  443. break;
  444. case false:
  445. #ifdef SFEATURE_HDCP_SUPPORT
  446. sii8240_hdcp_on(sii8240, false);
  447. #endif
  448. sii8240->regs.intr_masks.intr_tpi_mask_value = 0x0;
  449. ret = mhl_write_byte_reg(tpi, 0x3C, 0x0);
  450. if (unlikely(ret < 0)) {
  451. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  452. __func__, __LINE__);
  453. return ret;
  454. }
  455. pr_info("TMDS_OUTPUT_CONTROL_POWER_DOWN |AV_MUTE_NORMAL\n");
  456. ret = mhl_modify_reg(tpi, 0x1A,
  457. TMDS_OUTPUT_CONTROL_MASK | AV_MUTE_MASK,
  458. TMDS_OUTPUT_CONTROL_POWER_DOWN | AV_MUTE_MASK);
  459. if (unlikely(ret < 0)) {
  460. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  461. __func__, __LINE__);
  462. return ret;
  463. }
  464. break;
  465. default:
  466. pr_err("[ERROR] %s() unknown value\n", __func__);
  467. break;
  468. }
  469. return ret;
  470. }
  471. static int set_hdmi_mode(struct sii8240_data *sii8240, bool hdmi_mode)
  472. {
  473. int ret;
  474. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  475. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  476. ret = mhl_modify_reg(hdmi, 0xA1,
  477. BIT_REG_RX_HDMI_CTRL0_hdmi_mode_overwrite_MASK,
  478. BIT_REG_RX_HDMI_CTRL0_hdmi_mode_overwrite_SW_CTRL);
  479. if (unlikely(ret < 0)) {
  480. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  481. __func__, __LINE__);
  482. return ret;
  483. }
  484. if (hdmi_mode) {
  485. ret = mhl_modify_reg(hdmi, 0xA1,
  486. BIT_REG_RX_HDMI_CTRL0_hdmi_mode_sw_value_MASK,
  487. BIT_REG_RX_HDMI_CTRL0_hdmi_mode_sw_value_HDMI);
  488. if (unlikely(ret < 0)) {
  489. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  490. __func__, __LINE__);
  491. return ret;
  492. }
  493. ret = mhl_modify_reg(tpi, 0x1A, TMDS_OUTPUT_MODE_MASK,
  494. TMDS_OUTPUT_MODE_HDMI);
  495. if (unlikely(ret < 0)) {
  496. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  497. __func__, __LINE__);
  498. return ret;
  499. }
  500. ret = mhl_write_byte_reg(hdmi, 0x90, 0xF5);
  501. if (unlikely(ret < 0)) {
  502. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  503. __func__, __LINE__);
  504. return ret;
  505. }
  506. ret = mhl_write_byte_reg(hdmi, 0x91, 0x06);
  507. if (unlikely(ret < 0)) {
  508. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  509. __func__, __LINE__);
  510. return ret;
  511. }
  512. ret = mhl_modify_reg(hdmi, 0xA3,
  513. BIT_RX_HDMI_CTRL2_USE_AV_MUTE_SUPPORT_MASK,
  514. BIT_RX_HDMI_CTRL2_USE_AV_MUTE_SUPPORT_DISABLE);
  515. if (unlikely(ret < 0)) {
  516. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  517. __func__, __LINE__);
  518. return ret;
  519. }
  520. } else{
  521. ret = mhl_modify_reg(hdmi, 0xA1,
  522. BIT_REG_RX_HDMI_CTRL0_hdmi_mode_sw_value_MASK,
  523. BIT_REG_RX_HDMI_CTRL0_hdmi_mode_sw_value_DVI);
  524. if (unlikely(ret < 0)) {
  525. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  526. __func__, __LINE__);
  527. return ret;
  528. }
  529. ret = mhl_modify_reg(tpi, 0x1A, TMDS_OUTPUT_MODE_MASK,
  530. TMDS_OUTPUT_MODE_DVI);
  531. if (unlikely(ret < 0)) {
  532. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  533. __func__, __LINE__);
  534. return ret;
  535. }
  536. ret = mhl_write_byte_reg(hdmi, 0x90, 0xFF);
  537. if (unlikely(ret < 0)) {
  538. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  539. __func__, __LINE__);
  540. return ret;
  541. }
  542. ret = mhl_write_byte_reg(hdmi, 0x91, 0xFF);
  543. if (unlikely(ret < 0)) {
  544. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  545. __func__, __LINE__);
  546. return ret;
  547. }
  548. ret = mhl_modify_reg(hdmi, 0xA3,
  549. BIT_RX_HDMI_CTRL2_USE_AV_MUTE_SUPPORT_MASK,
  550. BIT_RX_HDMI_CTRL2_USE_AV_MUTE_SUPPORT_DISABLE);
  551. if (unlikely(ret < 0)) {
  552. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  553. __func__, __LINE__);
  554. return ret;
  555. }
  556. }
  557. sii8240->hdmi_mode = hdmi_mode;
  558. pr_info("sii8240: %s():HDMI mode = %d\n", __func__, hdmi_mode);
  559. return ret;
  560. }
  561. static int sii8240_fifo_clear(struct sii8240_data *sii8240)
  562. {
  563. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  564. u8 data;
  565. int ret;
  566. pr_info("%s\n", __func__);
  567. ret = mhl_read_byte_reg(tmds, 0xf2, &data);
  568. if (unlikely(ret < 0)) {
  569. pr_err("[ERROR] %s() :%d mhl_read_byte_reg failed!\n", __func__, __LINE__);
  570. return ret;
  571. }
  572. ret = mhl_set_reg(tmds,
  573. TPI_DISABLE_REG, SW_TPI_EN_MASK);
  574. if (unlikely(ret < 0)) {
  575. pr_err("[ERROR] %s() :%d mhl_set_reg failed!\n", __func__, __LINE__);
  576. return ret;
  577. }
  578. if (0x20 & data) {
  579. ret = mhl_write_byte_reg(tmds,
  580. 0xF2, data & ~0x20);
  581. if (unlikely(ret < 0)) {
  582. pr_err("[ERROR] %s() :%d mhl_write_byte_reg failed!\n", __func__, __LINE__);
  583. return ret;
  584. }
  585. ret = mhl_modify_reg(tmds, 0xF3, 0x0F, 0x09);
  586. if (unlikely(ret < 0)) {
  587. pr_err("[ERROR] %s() :%d mhl_modify_reg failed!\n", __func__, __LINE__);
  588. return ret;
  589. }
  590. }
  591. ret = mhl_clear_reg(tmds,
  592. TPI_DISABLE_REG, SW_TPI_EN_MASK);
  593. if (unlikely(ret < 0)) {
  594. pr_err("[ERROR] %s() :%d mhl_clear_reg failed!\n", __func__, __LINE__);
  595. return ret;
  596. }
  597. return ret;
  598. }
  599. #ifdef SFEATURE_HDCP_SUPPORT
  600. static int sii8240_hdcp_key_check(struct sii8240_data *sii8240)
  601. {
  602. u8 aksv[AKSV_SIZE];
  603. int ret, i, cnt;
  604. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  605. memset(aksv, 0x00, AKSV_SIZE);
  606. cnt = 0;
  607. ret = mhl_read_block_reg(tpi, HDCP_KEY, AKSV_SIZE, aksv);
  608. if (unlikely(ret < 0)) {
  609. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  610. __func__, __LINE__);
  611. return ret;
  612. }
  613. pr_info("sii8240: AKSV :0x%x, 0x%x, 0x%x, 0x%x, 0x%x",
  614. aksv[0], aksv[1], aksv[2], aksv[3], aksv[4]);
  615. for (i = 0; i < AKSV_SIZE; i++) {
  616. while (aksv[i] != 0x00) {
  617. if (aksv[i] & 0x01)
  618. cnt++;
  619. aksv[i] >>= 1;
  620. }
  621. }
  622. if (cnt != NUM_OF_ONES_IN_KSV) {
  623. pr_cont(" -> Illegal AKSV !\n");
  624. ret = -EINVAL;
  625. } else
  626. pr_cont(" ->ok\n");
  627. return ret;
  628. }
  629. static int sii8240_hdcp_control(struct sii8240_data *sii8240, u8 hdcp_reg)
  630. {
  631. int ret;
  632. u8 rd_data = 0, hdcp_query;
  633. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  634. ret = mhl_read_byte_reg(tpi, TPI_HDCP_QUERY_DATA_REG, &hdcp_query);
  635. if (unlikely(ret < 0)) {
  636. pr_info("sii8240: HDCP query request fail\n");
  637. return ret;
  638. }
  639. /*HDCP link status changed.
  640. *Indicates a status change event in the LinkStatus (0x29) value.*/
  641. if (hdcp_reg & BIT_TPI_INTR_ST0_HDCP_SECURITY_CHANGE_EVENT) {
  642. rd_data = hdcp_query & LINK_STATUS_MASK;
  643. switch (rd_data) {
  644. case LINK_STATUS_NORMAL:
  645. pr_info("sii8240: %s():%d LINK_STATUS_NORMAL !!!\n",
  646. __func__, __LINE__);
  647. break;
  648. case LINK_STATUS_LINK_LOST:
  649. pr_info("sii8240: %s():%d LINK_STATUS_LINK_LOST !!!\n",
  650. __func__, __LINE__);
  651. if ((sii8240->hdmi_sink == false) && ((hdcp_query & 0x08) == 0)) {
  652. ret = set_mute_mode(sii8240, false);
  653. if (unlikely(ret < 0)) {
  654. pr_err("[ERROR] sii8240: set_mute_mode on fail\n");
  655. return ret;
  656. }
  657. }
  658. ret = sii8240_hdcp_on(sii8240, false);
  659. if (unlikely(ret < 0)) {
  660. pr_err("[ERROR]sii8240: tmds_control on fail\n");
  661. return ret;
  662. }
  663. ret = sii8240_tmds_active_hdcp(sii8240);
  664. if (unlikely(ret < 0)) {
  665. pr_err("[ERROR]sii8240: sii8240_tmds_active_hdcp fail\n");
  666. return ret;
  667. }
  668. break;
  669. case LINK_STATUS_RENEGOTIATION_REQ:
  670. pr_info("sii8240: %s():%d LINK_STATUS_RENEGOTIATION_REQ !!!\n",
  671. __func__, __LINE__);
  672. sii8240_fifo_clear(sii8240);
  673. ret = sii8240_hdcp_on(sii8240, false);
  674. if (unlikely(ret < 0)) {
  675. pr_err("[ERROR] sii8240: sii8240_hdcp_on off fail\n");
  676. return ret;
  677. }
  678. msleep(100);
  679. ret = sii8240_tmds_active_hdcp(sii8240);
  680. if (unlikely(ret < 0)) {
  681. pr_err("[ERROR]sii8240: set_mute_mode on fail\n");
  682. return ret;
  683. }
  684. break;
  685. case LINK_STATUS_LINK_SUSPENDED:
  686. pr_info("sii8240: %s():%d LINK_STATUS_LINK_SUSPENDED !!!\n",
  687. __func__, __LINE__);
  688. ret = sii8240_hdcp_on(sii8240, false);
  689. if (unlikely(ret < 0)) {
  690. pr_err("[ERROR]sii8240: hdcp off fail\n");
  691. return ret;
  692. }
  693. break;
  694. }
  695. }
  696. /*HDCP Authentication status changed.
  697. *Indicates either that the previous authentication request has completed
  698. *or that an Ri mismatch has caused authentication to fail.*/
  699. if (hdcp_reg & BIT_TPI_INTR_ST0_HDCP_AUTH_STATUS_CHANGE_EVENT) {
  700. rd_data = hdcp_query &
  701. (EXTENDED_LINK_PROTECTION_MASK |
  702. LOCAL_LINK_PROTECTION_MASK);
  703. switch (rd_data) {
  704. case (EXTENDED_LINK_PROTECTION_NONE |
  705. LOCAL_LINK_PROTECTION_NONE):
  706. pr_info("EXTENDED_LINK_PROTECTION_NONE\n");
  707. ret = sii8240_hdcp_on(sii8240, false);
  708. if (unlikely(ret < 0)) {
  709. pr_err("[ERROR]sii8240: sii8240_hdcp_on fail\n");
  710. return ret;
  711. }
  712. ret = sii8240_tmds_active_hdcp(sii8240);
  713. if (unlikely(ret < 0)) {
  714. pr_err("[ERROR]sii8240: sii8240_tmds_active_hdcp fail\n");
  715. return ret;
  716. }
  717. break;
  718. case LOCAL_LINK_PROTECTION_SECURE:
  719. pr_info("sii8240: %s():%d LOCAL_LINK_PROTECTION_SECURE\n",
  720. __func__, __LINE__);
  721. if (!(HDCP_REPEATER_MASK & hdcp_query)) {
  722. ret = set_mute_mode(sii8240, false);
  723. if (unlikely(ret < 0)) {
  724. pr_err("[ERROR]sii8240: set_mute_mode off fail\n");
  725. return ret;
  726. }
  727. #ifdef SII8240_CHECK_MONITOR
  728. if ((g_monitor_cmd.a & 0x01) == 0x01) {
  729. /*start checking link status*/
  730. sii8240_link_monitor_timer((unsigned long) sii8240);
  731. pr_info("%s():%d sii8240_link_monitor_timer\n",
  732. __func__, __LINE__);
  733. } else
  734. pr_err("[ERROR] : %s monitor state : %d\n",
  735. __func__, g_monitor_cmd.a);
  736. #endif
  737. }
  738. break;
  739. case (EXTENDED_LINK_PROTECTION_SECURE |
  740. LOCAL_LINK_PROTECTION_SECURE):
  741. pr_info("EXTENDED_LINK_PROTECTION_SECURE\n");
  742. if (HDCP_REPEATER_MASK & hdcp_query) {
  743. ret = set_mute_mode(sii8240, false);
  744. if (unlikely(ret < 0)) {
  745. pr_err("[ERROR]sii8240: set_mute_mode off fail\n");
  746. return ret;
  747. }
  748. #ifdef SII8240_CHECK_MONITOR
  749. if ((g_monitor_cmd.a & 0x01) == 0x01) {
  750. /*start checking link status*/
  751. sii8240_link_monitor_timer((unsigned long) sii8240);
  752. pr_info("%s():%d sii8240_link_monitor_timer\n",
  753. __func__, __LINE__);
  754. } else
  755. pr_err("[ERROR] : %s monitor state : %d\n",
  756. __func__, g_monitor_cmd.a);
  757. #endif
  758. }
  759. break;
  760. default:
  761. pr_info("sii8240: %s():%d default !!!\n",
  762. __func__, __LINE__);
  763. ret = sii8240_hdcp_on(sii8240, false);
  764. if (unlikely(ret < 0)) {
  765. pr_err("[ERROR] sii8240: sii8240_hdcp_on fail\n");
  766. return ret;
  767. }
  768. ret = sii8240_tmds_active_hdcp(sii8240);
  769. if (unlikely(ret < 0)) {
  770. pr_err("[ERROR] %s(%d) sii8240: tmds_control off fail\n", __func__, __LINE__);
  771. return ret;
  772. }
  773. break;
  774. }
  775. }
  776. /*Read BKSV Done.
  777. *Various bits in 0x29 contain information acquired from BCAPs.*/
  778. if (hdcp_reg & BIT_TPI_INTR_ST0_BKSV_DONE) {
  779. pr_info("sii8240: %s():%d BIT_TPI_INTR_ST0_BKSV_DONE\n",
  780. __func__, __LINE__);
  781. ret = set_hdmi_mode(sii8240, sii8240->hdmi_sink);
  782. if (unlikely(ret < 0)) {
  783. pr_err("[ERROR] sii8240: %s():%d set_hdmi_mode fail\n",
  784. __func__, __LINE__);
  785. return ret;
  786. }
  787. /*HDCP on*/
  788. if (hdcp_query & PROTECTION_TYPE_MASK) {
  789. ret = sii8240_hdcp_on(sii8240, true);
  790. if (unlikely(ret < 0)) {
  791. pr_err("[ERROR] %s(%d):sii8240_hdcp_on is fail\n",
  792. __func__, __LINE__);
  793. ret = sii8240_hdcp_on(sii8240, false);
  794. if (unlikely(ret < 0)) {
  795. pr_err("[ERROR] %s(%d):sii8240_hdcp_on is fail\n",
  796. __func__, __LINE__);
  797. return ret;
  798. }
  799. ret = sii8240_tmds_active_hdcp(sii8240);
  800. if (unlikely(ret < 0)) {
  801. pr_err("[ERROR] sii8240: tmds_control off fail\n");
  802. return ret;
  803. }
  804. }
  805. }
  806. }
  807. if (hdcp_reg & BIT_TPI_INTR_ST0_BKSV_ERR) {
  808. pr_info("sii8240: %s():bksv err\n", __func__);
  809. ret = sii8240_hdcp_on(sii8240, false);
  810. if (unlikely(ret < 0)) {
  811. pr_err("[ERROR] %s(%d):sii8240_hdcp_on is fail\n",
  812. __func__, __LINE__);
  813. return ret;
  814. }
  815. ret = sii8240_tmds_active_hdcp(sii8240);
  816. if (unlikely(ret < 0)) {
  817. pr_err("[ERROR] sii8240: tmds_control off fail\n");
  818. return ret;
  819. }
  820. }
  821. return 0;
  822. }
  823. #endif
  824. static void sii8240_check_hdmi_mode(struct sii8240_data *sii8240, int exts)
  825. {
  826. u8 datablock;
  827. u8 *edid;
  828. int i, ieee_reg;
  829. /* 3 = VSD */
  830. datablock = 3;
  831. i = 0x4;
  832. edid = sii8240->edid + (exts * EDID_LENGTH);
  833. for (; i < edid[2]; i += ((edid[i] & 0x1f) + 1)) {
  834. /* Find vendor specific block */
  835. if ((edid[i] >> 5) == datablock) {
  836. ieee_reg = edid[i + 1] | (edid[i + 2] << 8) |
  837. edid[i + 3] << 16;
  838. if (ieee_reg == 0x000c03) {
  839. pr_info("sii9240: hdmi_sink\n");
  840. sii8240->hdmi_sink = true;
  841. }
  842. break;
  843. }
  844. }
  845. }
  846. static int sii8240_read_edid_block(struct sii8240_data *sii8240, u8 edid_ext)
  847. {
  848. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  849. int ret;
  850. int i = 0;
  851. u8 data;
  852. u16 temp = edid_ext << 7;
  853. ret = mhl_set_reg(hdmi, EDID_STATUS_HW_ASSIST_REG, HW_EDID_DONE);
  854. if (unlikely(ret < 0)) {
  855. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  856. __func__, __LINE__);
  857. return ret;
  858. }
  859. ret = mhl_write_byte_reg(hdmi, EDID_CTRL_REG,
  860. EDID_MODE_EN | EDID_FIFO_ADDR_AUTO);
  861. if (unlikely(ret < 0)) {
  862. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  863. __func__, __LINE__);
  864. return ret;
  865. }
  866. if (!edid_ext) { /* Block-0 */
  867. ret = mhl_write_byte_reg(hdmi, EDID_PAGE_HW_ASSIST_REG,
  868. HW_READ_EDID_BLOCK_0);
  869. if (unlikely(ret < 0)) {
  870. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  871. __func__, __LINE__);
  872. return ret;
  873. }
  874. } else { /* other EDID-extension blocks */
  875. ret = mhl_write_byte_reg(hdmi, EDID_BLOCK_ADDR_HW_ASSIST_REG,
  876. (1<<(edid_ext-1)));
  877. if (unlikely(ret < 0)) {
  878. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  879. __func__, __LINE__);
  880. return ret;
  881. }
  882. }
  883. /* TODO: use some completion mechanism or wait_for_completion_timeout
  884. * APIs instead of this loop */
  885. do {
  886. ret = mhl_read_byte_reg(hdmi, EDID_STATUS_HW_ASSIST_REG,
  887. &data);
  888. if (unlikely(ret < 0)) {
  889. pr_info("sii8240:edid reg read failed!\n");
  890. return ret;
  891. }
  892. if (data & HW_EDID_DONE) {
  893. ret = mhl_write_byte_reg(hdmi,
  894. EDID_STATUS_HW_ASSIST_REG,
  895. HW_EDID_DONE);
  896. if (unlikely(ret < 0)) {
  897. pr_info("sii8240: edid done failed!\n");
  898. return ret;
  899. }
  900. break;
  901. }
  902. if (data & HW_EDID_ERROR) {
  903. ret = mhl_write_byte_reg(hdmi,
  904. EDID_STATUS_HW_ASSIST_REG,
  905. HW_EDID_ERROR);
  906. if (unlikely(ret < 0)) {
  907. pr_info("sii8240: edid read error!\n");
  908. return ret;
  909. }
  910. sii8240_fifo_clear(sii8240);
  911. ret = mhl_write_byte_reg(hdmi, EDID_PAGE_HW_ASSIST_REG,
  912. HW_READ_EDID_BLOCK_0);
  913. if (unlikely(ret < 0)) {
  914. pr_info("sii8240: edid block 0 failed !\n");
  915. return ret;
  916. }
  917. }
  918. usleep_range(1000, 2000);
  919. i++;
  920. } while (i < 100);
  921. if (i == 100) {
  922. pr_info("sii8240:%s():%d EDID READ timeout\n",
  923. __func__, __LINE__);
  924. return -ETIMEDOUT;
  925. }
  926. /* CHECK: 0,(1<<7),0,(1<<7) values being used in reference driver */
  927. ret = mhl_write_byte_reg(hdmi, EDID_FIFO_ADDR_REG, (temp & 0xFF));
  928. if (unlikely(ret < 0)) {
  929. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  930. __func__, __LINE__);
  931. return ret;
  932. }
  933. /* TODO 1: We can optimize this loop using loop unrolling techniques */
  934. /* TODO 2: In one of the reference driver, block read is being used;
  935. need to investiage on this */
  936. /* SMBus allows at most 32 bytes, so read by 32 bytes 4 times. */
  937. for (i = 0; i < EDID_LENGTH/I2C_SMBUS_BLOCK_MAX; i++) {
  938. ret = mhl_read_block_reg(hdmi, EDID_FIFO_RD_DATA_REG,
  939. I2C_SMBUS_BLOCK_MAX,
  940. (&sii8240->edid[i*I2C_SMBUS_BLOCK_MAX +
  941. edid_ext*EDID_LENGTH]));
  942. if (unlikely(ret < 0)) {
  943. pr_err("failed to read EDID_FIFO_RD_DATA_REG\n");
  944. return ret;
  945. }
  946. }
  947. return ret;
  948. }
  949. u8 sii8240_mhl_get_version(void)
  950. {
  951. struct sii8240_data *sii8240 = dev_get_drvdata(sii8240_mhldev);
  952. return sii8240->regs.peer_devcap[MHL_DEVCAP_MHL_VERSION];
  953. }
  954. u8 sii8240_support_packedpixel(void)
  955. {
  956. struct sii8240_data *sii8240 = dev_get_drvdata(sii8240_mhldev);
  957. return (sii8240->regs.peer_devcap[MHL_DEVCAP_VID_LINK_MODE] >> 3) & 0x01;
  958. }
  959. u8 *sii8240_get_mhl_edid(void)
  960. {
  961. pr_info("sii8240->edid : 0x%p\n", g_sii8240->edid);
  962. return g_sii8240->edid;
  963. }
  964. static int sii8240_read_edid(struct sii8240_data *sii8240)
  965. {
  966. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  967. int ret;
  968. int i;
  969. u8 edid_exts;
  970. sii8240->hdmi_sink = false;
  971. memset(sii8240->edid, 0, sizeof(sii8240->edid));
  972. /* Read EDID block-0 */
  973. ret = sii8240_read_edid_block(sii8240, 0);
  974. if (unlikely(ret < 0)) {
  975. pr_err("[ERROR] sii8240: %s():%d sii8240_read_edid_block\n",
  976. __func__, __LINE__);
  977. goto err_exit;
  978. }
  979. edid_exts = sii8240->edid[0x7e]; /* no. of edid extensions */
  980. /* boundary check for edid_exist: especially when mhl urgents
  981. for disconnection, edid_exts get wrong value, in this case
  982. reset edid_exts=1(default) to avoid kernel panic
  983. by exceding sii8240->edid[0x7e] array boundary */
  984. if (edid_exts >= (EDID_MAX_LENGTH/EDID_LENGTH)) {
  985. pr_err("[ERROR] sii8240: edid_exts = %d is wrong\n", edid_exts);
  986. sii8240->edid[0x7e] = 0x00;
  987. edid_exts = 0;
  988. }
  989. if (!edid_exts) {
  990. ret = mhl_write_byte_reg(hdmi, EDID_BLOCK_ADDR_HW_ASSIST_REG,
  991. (1<<0));
  992. if (ret < 0)
  993. return ret;
  994. goto edid_populated;
  995. }
  996. for (i = 1; i <= edid_exts; i++) {
  997. ret = sii8240_read_edid_block(sii8240, i);
  998. if (unlikely(ret < 0)) {
  999. pr_err("[ERROR] sii8240: %s():%d sii8240_read_edid_block\n",
  1000. __func__, __LINE__);
  1001. goto err_exit;
  1002. }
  1003. /* check hdmi mode if CEA BLOCK(ext edid[0] == 0x02) */
  1004. if (sii8240->edid[i * EDID_LENGTH] == 0x02)
  1005. sii8240_check_hdmi_mode(sii8240, i);
  1006. }
  1007. edid_populated:
  1008. print_hex_dump(KERN_INFO, "EDID = ",
  1009. DUMP_PREFIX_OFFSET, 16, 1,
  1010. sii8240->edid, EDID_LENGTH * (1 + edid_exts), false);
  1011. ret = mhl_write_byte_reg(hdmi, EDID_FIFO_ADDR_REG, 0);
  1012. if (unlikely(ret < 0)) {
  1013. pr_err("[ERROR] sii8240: %s():%d !\n",
  1014. __func__, __LINE__);
  1015. goto err_exit;
  1016. }
  1017. #if 0 /* this is for AP side edid reading through DDC */
  1018. /* Block operations can handle only 32 bytes at a time */
  1019. for (i = 0; i < (edid_exts+1)*(EDID_LENGTH/I2C_SMBUS_BLOCK_MAX); i++) {
  1020. ret = mhl_write_block_reg(hdmi, EDID_FIFO_WR_DATA_REG,
  1021. I2C_SMBUS_BLOCK_MAX,
  1022. &sii8240->edid[i*I2C_SMBUS_BLOCK_MAX]);
  1023. if (unlikely(ret < 0)) {
  1024. pr_err("[ERROR] sii8240: edid write block error\n");
  1025. break;
  1026. }
  1027. }
  1028. #endif
  1029. ret = mhl_write_byte_reg(hdmi, EDID_CTRL_REG, EDID_PRIME_VALID |
  1030. EDID_FIFO_ADDR_AUTO | EDID_MODE_EN);
  1031. if (unlikely(ret < 0)) {
  1032. pr_err("[ERROR] sii8240: %s():%d mhl_write_byte_reg\n",
  1033. __func__, __LINE__);
  1034. goto err_exit;
  1035. }
  1036. ret = mhl_set_reg(sii8240->pdata->disc_client, POWER_CTRL_REG, PCLK_EN);
  1037. if (unlikely(ret < 0)) {
  1038. pr_err("[ERROR] sii8240: %s():%d mhl_set_reg\n",
  1039. __func__, __LINE__);
  1040. goto err_exit;
  1041. }
  1042. pr_info("sii8240: edid read and stored successfully\n");
  1043. return ret;
  1044. err_exit:
  1045. pr_err("[ERROR] err_exit: hdmi_sink set to false\n");
  1046. sii8240->hdmi_sink = false;
  1047. return ret;
  1048. }
  1049. static int mhl_hpd_control_low(struct sii8240_data *sii8240)
  1050. {
  1051. int ret;
  1052. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  1053. ret = mhl_modify_reg(tmds, UPSTRM_HPD_CTRL_REG,
  1054. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_MASK |
  1055. BIT_HPD_CTRL_HPD_OUT_OVR_EN_MASK,
  1056. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_OFF |
  1057. BIT_HPD_CTRL_HPD_OUT_OVR_EN_ON);
  1058. if (unlikely(ret < 0)) {
  1059. pr_warn("[ERROR]sii8240: %s():%d failed !\n",
  1060. __func__, __LINE__);
  1061. return ret;
  1062. }
  1063. sii8240->hpd_status = false;
  1064. return ret;
  1065. }
  1066. static int force_usb_id_switch_open(struct sii8240_data *sii8240)
  1067. {
  1068. int ret;
  1069. struct i2c_client *disc = sii8240->pdata->disc_client;
  1070. ret = mhl_modify_reg(disc, 0x10, 0x1, 0x0);
  1071. if (unlikely(ret < 0)) {
  1072. pr_err("[ERROR] sii8240: %s():%d !\n",
  1073. __func__, __LINE__);
  1074. return ret;
  1075. }
  1076. ret = mhl_modify_reg(disc, 0x15,
  1077. BIT_DC6_USB_OVERRIDE_MASK, BIT_DC6_USB_OVERRIDE_ON);
  1078. if (unlikely(ret < 0)) {
  1079. pr_err("[ERROR] sii8240: %s():%d !\n",
  1080. __func__, __LINE__);
  1081. return ret;
  1082. }
  1083. ret = mhl_write_byte_reg(disc, 0x12, BIT_DC3_COMM_IMME_ON |
  1084. BIT_DC3_FORCE_MHL_OFF |
  1085. BIT_DC3_DISC_SIMODE_OFF |
  1086. BIT_DC3_FORCE_USB_OFF |
  1087. BIT_DC3_USB_EN_OFF |
  1088. BIT_DC3_DLYTRG_SEL_064ms);
  1089. if (unlikely(ret < 0)) {
  1090. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1091. __func__, __LINE__);
  1092. return ret;
  1093. }
  1094. ret = mhl_hpd_control_low(sii8240);
  1095. if (unlikely(ret < 0)) {
  1096. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1097. __func__, __LINE__);
  1098. return ret;
  1099. }
  1100. return ret;
  1101. }
  1102. static int release_usb_id_switch_open(struct sii8240_data *sii8240)
  1103. {
  1104. int ret;
  1105. struct i2c_client *disc = sii8240->pdata->disc_client;
  1106. msleep(50);
  1107. ret = mhl_modify_reg(disc, 0x15, 0x40, 0x0);
  1108. if (unlikely(ret < 0)) {
  1109. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1110. __func__, __LINE__);
  1111. return ret;
  1112. }
  1113. /*enable discovery*/
  1114. ret = mhl_modify_reg(disc, 0x10, 0x1, 0x1);
  1115. if (unlikely(ret < 0)) {
  1116. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1117. __func__, __LINE__);
  1118. return ret;
  1119. }
  1120. return ret;
  1121. }
  1122. static int sii8240_set_interrupt(struct sii8240_data *sii8240)
  1123. {
  1124. int ret;
  1125. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  1126. struct i2c_client *disc = sii8240->pdata->disc_client;
  1127. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  1128. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  1129. ret = mhl_write_byte_reg(tmds, 0x75,
  1130. sii8240->regs.intr_masks.intr1_mask_value);
  1131. if (unlikely(ret < 0)) {
  1132. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1133. __func__, __LINE__);
  1134. return ret;
  1135. }
  1136. ret = mhl_write_byte_reg(tmds, 0x76,
  1137. sii8240->regs.intr_masks.intr2_mask_value);
  1138. if (unlikely(ret < 0)) {
  1139. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1140. __func__, __LINE__);
  1141. return ret;
  1142. }
  1143. ret = mhl_write_byte_reg(tmds, 0x77,
  1144. sii8240->regs.intr_masks.intr3_mask_value);
  1145. if (unlikely(ret < 0)) {
  1146. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1147. __func__, __LINE__);
  1148. return ret;
  1149. }
  1150. ret = mhl_write_byte_reg(disc, DISC_INTR_ENABLE_REG,
  1151. sii8240->regs.intr_masks.intr4_mask_value);
  1152. if (unlikely(ret < 0)) {
  1153. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1154. __func__, __LINE__);
  1155. return ret;
  1156. }
  1157. ret = mhl_write_byte_reg(tmds, 0x78,
  1158. sii8240->regs.intr_masks.intr5_mask_value);
  1159. if (unlikely(ret < 0)) {
  1160. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1161. __func__, __LINE__);
  1162. return ret;
  1163. }
  1164. ret = mhl_write_byte_reg(cbus, CBUS_MSC_INTR_ENABLE_REG,
  1165. sii8240->regs.intr_masks.intr_cbus0_mask_value);
  1166. if (unlikely(ret < 0)) {
  1167. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1168. __func__, __LINE__);
  1169. return ret;
  1170. }
  1171. ret = mhl_write_byte_reg(cbus, CBUS_MSC_ERROR_INTR_ENABLE_REG,
  1172. sii8240->regs.intr_masks.intr_cbus1_mask_value);
  1173. if (unlikely(ret < 0)) {
  1174. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1175. __func__, __LINE__);
  1176. return ret;
  1177. }
  1178. ret = mhl_write_byte_reg(tmds, 0x7D,
  1179. sii8240->regs.intr_masks.intr7_mask_value);
  1180. if (unlikely(ret < 0)) {
  1181. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1182. __func__, __LINE__);
  1183. return ret;
  1184. }
  1185. ret = mhl_write_byte_reg(tmds, 0x7E,
  1186. sii8240->regs.intr_masks.intr8_mask_value);
  1187. if (unlikely(ret < 0)) {
  1188. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1189. __func__, __LINE__);
  1190. return ret;
  1191. }
  1192. ret = mhl_write_byte_reg(tpi, 0x3C,
  1193. sii8240->regs.intr_masks.intr_tpi_mask_value);
  1194. if (unlikely(ret < 0)) {
  1195. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  1196. __func__, __LINE__);
  1197. return ret;
  1198. }
  1199. return ret;
  1200. }
  1201. /* Functions for Switching Power States, Some boards use these
  1202. * functions,hence adding it here */
  1203. static int switch_to_d3(struct sii8240_data *sii8240)
  1204. {
  1205. int ret;
  1206. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  1207. struct i2c_client *disc = sii8240->pdata->disc_client;
  1208. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  1209. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  1210. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  1211. memset(&sii8240->regs.intr_masks, 0, sizeof(sii8240->regs.intr_masks));
  1212. sii8240->regs.intr_masks.intr4_mask_value = BIT_INTR4_RGND_DETECTION;
  1213. sii8240->regs.link_mode = MHL_STATUS_CLK_NORMAL;
  1214. ret = sii8240_set_interrupt(sii8240);
  1215. if (unlikely(ret < 0)) {
  1216. pr_err("[ERROR] %s() sii8240_set_interrupt\n", __func__);
  1217. return ret;
  1218. }
  1219. ret = mhl_hpd_control_low(sii8240);
  1220. if (unlikely(ret < 0)) {
  1221. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1222. __func__, __LINE__);
  1223. return ret;
  1224. }
  1225. ret = mhl_write_byte_reg(hdmi, MHLTX_TERM_CTRL_REG, 0xD0);
  1226. if (unlikely(ret < 0)) {
  1227. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1228. __func__, __LINE__);
  1229. return ret;
  1230. }
  1231. /*Clear all interrupt*/
  1232. ret = mhl_write_byte_reg(disc, 0x21, 0xFF);
  1233. if (unlikely(ret < 0)) {
  1234. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1235. __func__, __LINE__);
  1236. return ret;
  1237. }
  1238. ret = mhl_write_byte_reg(tmds, 0x71, 0xFF);
  1239. if (unlikely(ret < 0)) {
  1240. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1241. __func__, __LINE__);
  1242. return ret;
  1243. }
  1244. ret = mhl_write_byte_reg(tmds, 0x72, 0xFF);
  1245. if (unlikely(ret < 0)) {
  1246. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1247. __func__, __LINE__);
  1248. return ret;
  1249. }
  1250. ret = mhl_write_byte_reg(tmds, 0x73, 0xFF);
  1251. if (unlikely(ret < 0)) {
  1252. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1253. __func__, __LINE__);
  1254. return ret;
  1255. }
  1256. ret = mhl_write_byte_reg(tmds, 0x74, 0xFF);
  1257. if (unlikely(ret < 0)) {
  1258. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1259. __func__, __LINE__);
  1260. return ret;
  1261. }
  1262. ret = mhl_write_byte_reg(tmds, 0x7B, 0xFF);
  1263. if (unlikely(ret < 0)) {
  1264. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1265. __func__, __LINE__);
  1266. return ret;
  1267. }
  1268. ret = mhl_write_byte_reg(tmds, 0x7C, 0xFF);
  1269. if (unlikely(ret < 0)) {
  1270. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1271. __func__, __LINE__);
  1272. return ret;
  1273. }
  1274. ret = mhl_write_byte_reg(tmds, 0xE0, 0xFF);
  1275. if (unlikely(ret < 0)) {
  1276. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1277. __func__, __LINE__);
  1278. return ret;
  1279. }
  1280. ret = mhl_write_byte_reg(cbus, 0x8C, 0xFF);
  1281. if (unlikely(ret < 0)) {
  1282. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1283. __func__, __LINE__);
  1284. return ret;
  1285. }
  1286. ret = mhl_write_byte_reg(cbus, 0x8E, 0xFF);
  1287. if (unlikely(ret < 0)) {
  1288. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1289. __func__, __LINE__);
  1290. return ret;
  1291. }
  1292. ret = mhl_write_byte_reg(cbus, 0x92, 0xFF);
  1293. if (unlikely(ret < 0)) {
  1294. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1295. __func__, __LINE__);
  1296. return ret;
  1297. }
  1298. ret = mhl_write_byte_reg(cbus, 0x94, 0xFF);
  1299. if (unlikely(ret < 0)) {
  1300. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1301. __func__, __LINE__);
  1302. return ret;
  1303. }
  1304. ret = mhl_write_byte_reg(cbus, 0x96, 0xFF);
  1305. if (unlikely(ret < 0)) {
  1306. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1307. __func__, __LINE__);
  1308. return ret;
  1309. }
  1310. ret = mhl_write_byte_reg(cbus, 0x98, 0xFF);
  1311. if (unlikely(ret < 0)) {
  1312. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1313. __func__, __LINE__);
  1314. return ret;
  1315. }
  1316. ret = mhl_write_byte_reg(cbus, 0x9A, 0xFF);
  1317. if (unlikely(ret < 0)) {
  1318. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1319. __func__, __LINE__);
  1320. return ret;
  1321. }
  1322. ret = mhl_write_byte_reg(cbus, 0x9C, 0xFF);
  1323. if (unlikely(ret < 0)) {
  1324. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1325. __func__, __LINE__);
  1326. return ret;
  1327. }
  1328. ret = mhl_write_byte_reg(tpi, 0x3D, 0xFF);
  1329. if (unlikely(ret < 0)) {
  1330. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1331. __func__, __LINE__);
  1332. return ret;
  1333. }
  1334. msleep(50);
  1335. ret = mhl_modify_reg(disc, DISC_CTRL1_REG, 1<<0x0, 0x1);
  1336. if (unlikely(ret < 0)) {
  1337. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1338. __func__, __LINE__);
  1339. return ret;
  1340. }
  1341. ret = mhl_modify_reg(disc, 0x01, 1<<0x0, 0x0);
  1342. if (unlikely(ret < 0)) {
  1343. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1344. __func__, __LINE__);
  1345. return ret;
  1346. }
  1347. sii8240->state = STATE_MHL_READY_RGND_DETECT;
  1348. pr_info("sii8240: D3: Power saving mode\n");
  1349. if (!sii8240->irq_enabled) {
  1350. enable_irq(sii8240->irq);
  1351. sii8240->irq_enabled = true;
  1352. pr_info("sii8240: interrupt enabled\n");
  1353. }
  1354. return 0;
  1355. }
  1356. /* toggle hpd line low for 100ms */
  1357. static int sii8240_toggle_hpd(struct i2c_client *client)
  1358. {
  1359. int ret;
  1360. ret = mhl_set_reg(client, UPSTRM_HPD_CTRL_REG, HPD_OVERRIDE_EN);
  1361. if (unlikely(ret < 0)) {
  1362. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1363. __func__, __LINE__);
  1364. return ret;
  1365. }
  1366. ret = mhl_clear_reg(client, UPSTRM_HPD_CTRL_REG, HPD_OUT_OVERRIDE_VAL);
  1367. if (unlikely(ret < 0)) {
  1368. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1369. __func__, __LINE__);
  1370. return ret;
  1371. }
  1372. msleep(100);
  1373. ret = mhl_set_reg(client, UPSTRM_HPD_CTRL_REG, HPD_OUT_OVERRIDE_VAL);
  1374. if (unlikely(ret < 0)) {
  1375. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1376. __func__, __LINE__);
  1377. return ret;
  1378. }
  1379. ret = mhl_clear_reg(client, UPSTRM_HPD_CTRL_REG, HPD_OVERRIDE_EN);
  1380. if (unlikely(ret < 0)) {
  1381. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1382. __func__, __LINE__);
  1383. return ret;
  1384. }
  1385. return ret;
  1386. }
  1387. static int sii8240_host_devcap_init(struct sii8240_data *sii8240)
  1388. {
  1389. int ret;
  1390. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  1391. u8 devcap[] = { DEV_STATE, DEV_MHL_VERSION, DEV_CAT_SOURCE_NO_PWR,
  1392. DEV_ADOPTER_ID_H, DEV_ADOPTER_ID_L, DEV_VID_LINK_MODE,
  1393. DEV_AUDIO_LINK_MODE, DEV_VIDEO_TYPE, DEV_LOGICAL_DEV,
  1394. DEV_BANDWIDTH, DEV_FEATURE_FLAG, DEV_DEVICE_ID_H,
  1395. DEV_DEVICE_ID_L, DEV_SCRATCHPAD_SIZE,
  1396. DEV_INT_STATUS_SIZE, DEV_RESERVED };
  1397. for (ret = 0; ret < DEVCAP_COUNT_MAX; ret++)
  1398. sii8240->regs.host_devcap[ret] = devcap[ret];
  1399. ret = mhl_write_block_reg(cbus, MHL_DEVCAP_DEVSTATE,
  1400. DEVCAP_COUNT_MAX, devcap);
  1401. if (unlikely(ret < 0)) {
  1402. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1403. __func__, __LINE__);
  1404. return ret;
  1405. }
  1406. return 0;
  1407. }
  1408. /* Do we really need to do this? */
  1409. static int sii8240_cbus_init(struct sii8240_data *sii8240)
  1410. {
  1411. int ret;
  1412. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  1413. ret = mhl_write_byte_reg(cbus, CBUS_MHL_INTR_REG_0_MASK, 0xFF);
  1414. if (unlikely(ret < 0)) {
  1415. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1416. __func__, __LINE__);
  1417. return ret;
  1418. }
  1419. ret = mhl_write_byte_reg(cbus, CBUS_MHL_INTR_REG_1_MASK, 0xFF);
  1420. if (unlikely(ret < 0)) {
  1421. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1422. __func__, __LINE__);
  1423. return ret;
  1424. }
  1425. ret = mhl_write_byte_reg(cbus, CBUS_MHL_INTR_REG_2_MASK, 0xFF);
  1426. if (unlikely(ret < 0)) {
  1427. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1428. __func__, __LINE__);
  1429. return ret;
  1430. }
  1431. ret = mhl_write_byte_reg(cbus, CBUS_MHL_INTR_REG_3_MASK, 0xFF);
  1432. if (unlikely(ret < 0)) {
  1433. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1434. __func__, __LINE__);
  1435. return ret;
  1436. }
  1437. return ret;
  1438. }
  1439. static int sii8240_init_regs(struct sii8240_data *sii8240)
  1440. {
  1441. int ret;
  1442. struct i2c_client *disc = sii8240->pdata->disc_client;
  1443. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  1444. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  1445. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  1446. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  1447. pr_info("sii8240_init_regs\n");
  1448. memset(sii8240->regs.peer_devcap, 0x0,
  1449. sizeof(sii8240->regs.peer_devcap));
  1450. ret = mhl_modify_reg(disc, INT_CTRL_REG, 0x06, 0x00);
  1451. if (unlikely(ret < 0)) {
  1452. pr_err("[ERROR] sii8240: %s():%d failed !\n", __func__, __LINE__);
  1453. return ret;
  1454. }
  1455. ret = mhl_write_byte_reg(disc, POWER_CTRL_REG, POWER_TO_D0);
  1456. if (unlikely(ret < 0)) {
  1457. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1458. __func__, __LINE__);
  1459. return ret;
  1460. }
  1461. if (sii8240->state == STATE_MHL_CONNECTED) {
  1462. ret = mhl_modify_reg(disc, DISC_CTRL1_REG, (1<<1), 0x00);
  1463. if (unlikely(ret < 0)) {
  1464. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1465. __func__, __LINE__);
  1466. return ret;
  1467. }
  1468. }
  1469. ret = mhl_write_byte_reg(hdmi, TMDS_CLK_EN_REG, 0x01);
  1470. if (unlikely(ret < 0)) {
  1471. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1472. __func__, __LINE__);
  1473. return ret;
  1474. }
  1475. ret = mhl_write_byte_reg(hdmi, TMDS_CH_EN_REG, 0x11);
  1476. if (unlikely(ret < 0)) {
  1477. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1478. __func__, __LINE__);
  1479. return ret;
  1480. }
  1481. ret = mhl_clear_reg(tmds, TPI_DISABLE_REG, SW_TPI_EN_MASK);
  1482. if (unlikely(ret < 0)) {
  1483. pr_err("[ERROR] sii8240: %s():%d Fail to clear register\n",
  1484. __func__, __LINE__);
  1485. return ret;
  1486. }
  1487. ret = mhl_write_byte_reg(tpi, TPI_HDCP_CTRL_REG, 0x00);
  1488. if (unlikely(ret < 0)) {
  1489. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1490. __func__, __LINE__);
  1491. return ret;
  1492. }
  1493. ret = mhl_set_reg(tpi, TPI_AV_MUTE_REG, AV_MUTE_MASK);
  1494. if (unlikely(ret < 0)) {
  1495. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1496. __func__, __LINE__);
  1497. return ret;
  1498. }
  1499. ret = mhl_write_byte_reg(tpi, 0xBB, 0x76);
  1500. if (unlikely(ret < 0)) {
  1501. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1502. __func__, __LINE__);
  1503. return ret;
  1504. }
  1505. ret = mhl_write_byte_reg(tpi, 0x3D, 0xFF);
  1506. if (unlikely(ret < 0)) {
  1507. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1508. __func__, __LINE__);
  1509. return ret;
  1510. }
  1511. ret = mhl_write_byte_reg(hdmi, 0xA4, 0x00);
  1512. if (unlikely(ret < 0)) {
  1513. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1514. __func__, __LINE__);
  1515. return ret;
  1516. }
  1517. ret = mhl_write_byte_reg(hdmi, 0x80,
  1518. BIT_MHLTX_CTL1_TX_TERM_MODE_100DIFF |
  1519. BIT_MHLTX_CTL1_DISC_OVRIDE_ON);
  1520. if (unlikely(ret < 0)) {
  1521. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1522. __func__, __LINE__);
  1523. return ret;
  1524. }
  1525. ret = mhl_modify_reg(hdmi, 0x82, BIT_MHLTX_CTL3_DAMPING_SEL_MASK,
  1526. sii8240->pdata->damping);
  1527. if (unlikely(ret < 0)) {
  1528. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1529. __func__, __LINE__);
  1530. return ret;
  1531. }
  1532. #if CONFIG_MHL_SWING_LEVEL
  1533. ret = mhl_modify_reg(hdmi, MHLTX_CTL4_REG, BIT_CLK_SWING_CTL_MASK |
  1534. BIT_DATA_SWING_CTL_MASK, sii8240->pdata->swing_level);
  1535. if (unlikely(ret < 0)) {
  1536. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1537. __func__, __LINE__);
  1538. return ret;
  1539. }
  1540. #else
  1541. ret = mhl_modify_reg(hdmi, 0x83, BIT_CLK_SWING_CTL_MASK |
  1542. BIT_DATA_SWING_CTL_MASK, 0x33);
  1543. if (unlikely(ret < 0)) {
  1544. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1545. __func__, __LINE__);
  1546. return ret;
  1547. }
  1548. #endif
  1549. ret = mhl_write_byte_reg(cbus, 0xA7, 0x1C);
  1550. if (unlikely(ret < 0)) {
  1551. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1552. __func__, __LINE__);
  1553. return ret;
  1554. }
  1555. if (sii8240->state == STATE_MHL_CONNECTED) {
  1556. ret = mhl_write_byte_reg(hdmi, MHLTX_TERM_CTRL_REG, 0x10);
  1557. if (unlikely(ret < 0)) {
  1558. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1559. __func__, __LINE__);
  1560. return ret;
  1561. }
  1562. #if CONFIG_MHL_SWING_LEVEL
  1563. ret = mhl_modify_reg(hdmi,
  1564. MHLTX_CTL4_REG, BIT_CLK_SWING_CTL_MASK |
  1565. BIT_DATA_SWING_CTL_MASK
  1566. , sii8240->pdata->swing_level);
  1567. if (unlikely(ret < 0)) {
  1568. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1569. __func__, __LINE__);
  1570. return ret;
  1571. }
  1572. #else
  1573. ret = mhl_modify_reg(hdmi,
  1574. MHLTX_CTL4_REG, BIT_CLK_SWING_CTL_MASK |
  1575. BIT_DATA_SWING_CTL_MASK, 0x34);
  1576. if (unlikely(ret < 0)) {
  1577. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1578. __func__, __LINE__);
  1579. return ret;
  1580. }
  1581. #endif
  1582. }
  1583. ret = mhl_write_byte_reg(hdmi, 0x87, 0x0A);
  1584. if (unlikely(ret < 0)) {
  1585. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1586. __func__, __LINE__);
  1587. return ret;
  1588. }
  1589. ret = mhl_write_byte_reg(tmds, 0x85, 0x02);
  1590. if (unlikely(ret < 0)) {
  1591. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1592. __func__, __LINE__);
  1593. return ret;
  1594. }
  1595. ret = mhl_write_byte_reg(hdmi, 0x00, 0x00);
  1596. if (unlikely(ret < 0)) {
  1597. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1598. __func__, __LINE__);
  1599. return ret;
  1600. }
  1601. ret = mhl_write_byte_reg(hdmi, 0x4C, 0xD0);
  1602. if (unlikely(ret < 0)) {
  1603. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1604. __func__, __LINE__);
  1605. return ret;
  1606. }
  1607. ret = mhl_write_byte_reg(disc, 0x11, 0xA5);
  1608. if (unlikely(ret < 0)) {
  1609. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1610. __func__, __LINE__);
  1611. return ret;
  1612. }
  1613. ret = mhl_write_byte_reg(disc, DISC_CTRL6_REG, 0x11);
  1614. if (unlikely(ret < 0)) {
  1615. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1616. __func__, __LINE__);
  1617. return ret;
  1618. }
  1619. ret = mhl_write_byte_reg(disc, DISC_CTRL9_REG,
  1620. CBUS_LOW_TO_DISCONNECT |
  1621. WAKE_DRVFLT | DISC_PULSE_PROCEED);
  1622. if (unlikely(ret < 0)) {
  1623. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1624. __func__, __LINE__);
  1625. return ret;
  1626. }
  1627. if (sii8240->state == STATE_MHL_CONNECTED) {
  1628. ret = mhl_write_byte_reg(disc, DISC_CTRL1_REG, 0x27);
  1629. if (unlikely(ret < 0)) {
  1630. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1631. __func__, __LINE__);
  1632. return ret;
  1633. }
  1634. } else {
  1635. ret = mhl_write_byte_reg(disc, DISC_CTRL1_REG, 0x26);
  1636. if (unlikely(ret < 0)) {
  1637. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1638. __func__, __LINE__);
  1639. return ret;
  1640. }
  1641. }
  1642. ret = mhl_write_byte_reg(disc, DISC_CTRL3_REG, 0x86);
  1643. if (unlikely(ret < 0)) {
  1644. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1645. __func__, __LINE__);
  1646. return ret;
  1647. }
  1648. /*This code is for disable RGND open interrupt */
  1649. /*
  1650. ret = mhl_write_byte_reg(disc, 0x13, 0xAC);
  1651. if (unlikely(ret < 0))
  1652. return ret;
  1653. */
  1654. ret = mhl_write_byte_reg(hdmi, TPI_PACKET_FILTER_REG,
  1655. DROP_GCP_PKT | DROP_AVI_PKT |
  1656. DROP_MPEG_PKT | DROP_SPIF_PKT |
  1657. DROP_CEA_CP_PKT | DROP_CEA_GAMUT_PKT);
  1658. if (unlikely(ret < 0)) {
  1659. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1660. __func__, __LINE__);
  1661. return ret;
  1662. }
  1663. if (sii8240->state == STATE_DISCONNECTED) {
  1664. ret = mhl_modify_reg(disc, POWER_CTRL_REG,
  1665. BIT_DPD_PDIDCK_MASK, BIT_DPD_PDIDCK_POWER_DOWN);
  1666. if (unlikely(ret < 0)) {
  1667. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1668. __func__, __LINE__);
  1669. return ret;
  1670. }
  1671. }
  1672. if (sii8240->state == STATE_MHL_CONNECTED) {
  1673. ret = mhl_modify_reg(disc, POWER_CTRL_REG,
  1674. BIT_DPD_PDIDCK_MASK, BIT_DPD_PDIDCK_MASK);
  1675. if (unlikely(ret < 0)) {
  1676. pr_err("[ERROR] sii8240: %s():%d Fail to write register\n",
  1677. __func__, __LINE__);
  1678. return ret;
  1679. }
  1680. }
  1681. /* In reference driver,HPD_OVERRIDE is enabled and HPD is set to low.
  1682. * Here, override of hpd is disabled(hence, hpd will propagate from
  1683. * downstream to upstream, no manual intervention).
  1684. */
  1685. ret = mhl_modify_reg(tmds, UPSTRM_HPD_CTRL_REG, (1<<6), 0x0);
  1686. if (unlikely(ret < 0)) {
  1687. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1688. __func__, __LINE__);
  1689. return ret;
  1690. }
  1691. ret = mhl_hpd_control_low(sii8240);
  1692. if (sii8240->state == STATE_MHL_CONNECTED) {
  1693. ret = mhl_modify_reg(hdmi, 0xAC,
  1694. BIT_HDMI_CLR_BUFFER_RX_HDMI_VSI_CLR_W_AVI_EN_MASK |
  1695. BIT_HDMI_CLR_BUFFER_RX_HDMI_VSI_CLR_EN_MASK,
  1696. BIT_HDMI_CLR_BUFFER_RX_HDMI_VSI_CLR_W_AVI_EN_CLEAR |
  1697. BIT_HDMI_CLR_BUFFER_RX_HDMI_VSI_CLR_EN_CLEAR);
  1698. if (unlikely(ret < 0)) {
  1699. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1700. __func__, __LINE__);
  1701. return ret;
  1702. }
  1703. }
  1704. ret = mhl_write_byte_reg(disc, 0x00, 0x84);
  1705. if (unlikely(ret < 0)) {
  1706. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1707. __func__, __LINE__);
  1708. return ret;
  1709. }
  1710. ret = mhl_write_byte_reg(tmds, DCTL_REG, TRANSCODE_OFF |
  1711. TCLK_PHASE_INVERTED);
  1712. if (unlikely(ret < 0)) {
  1713. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1714. __func__, __LINE__);
  1715. return ret;
  1716. }
  1717. #ifdef SFEATURE_UNSTABLE_SOURCE_WA
  1718. ret = mhl_modify_reg(tmds, 0x80, BIT_TMDS_CCTRL_CKDT_EN,
  1719. BIT_TMDS_CCTRL_CKDT_EN);
  1720. if (unlikely(ret < 0)) {
  1721. pr_err("[ERROR] sii8240: %s():%d Fail to set register\n",
  1722. __func__, __LINE__);
  1723. return ret;
  1724. }
  1725. #endif
  1726. ret = sii8240_cbus_init(sii8240);
  1727. if (unlikely(ret < 0)) {
  1728. pr_err("[ERROR] sii8240: %s():%d sii8240_cbus_init\n",
  1729. __func__, __LINE__);
  1730. return ret;
  1731. }
  1732. ret = sii8240_host_devcap_init(sii8240);
  1733. if (unlikely(ret < 0)) {
  1734. pr_err("[ERROR] sii8240: %s():%d sii8240_host_devcap_init\n",
  1735. __func__, __LINE__);
  1736. return ret;
  1737. }
  1738. #ifdef SFEATURE_HDCP_SUPPORT
  1739. ret = sii8240_hdcp_key_check(sii8240);
  1740. if (unlikely(ret < 0)) {
  1741. pr_err("[ERROR] sii8240_hdcp_key_check failed !\n");
  1742. return ret;
  1743. }
  1744. #endif/*SFEATURE_HDCP_SUPPORT*/
  1745. return ret;
  1746. }
  1747. /* Must call with sii8240->lock held */
  1748. static int sii8240_msc_req_locked(struct sii8240_data *sii8240, u8 req_type,
  1749. u8 offset, u8 first_data, u8 second_data)
  1750. {
  1751. int ret = 1;
  1752. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  1753. bool write_offset;
  1754. bool write_first_data;
  1755. bool write_second_data;
  1756. mutex_unlock(&sii8240->lock);
  1757. mutex_lock(&sii8240->msc_lock);
  1758. write_offset = req_type & (START_READ_DEVCAP |
  1759. START_WRITE_STAT_SET_INT | START_WRITE_BURST);
  1760. write_first_data = req_type &
  1761. (START_WRITE_STAT_SET_INT | START_MSC_MSG);
  1762. write_second_data = req_type & START_MSC_MSG;
  1763. pr_info("%s() SEND:offset = 0x%x\n", __func__, offset);
  1764. init_completion(&sii8240->cbus_complete);
  1765. if (write_offset) {
  1766. ret = mhl_write_byte_reg(cbus, MSC_CMD_OR_OFFSET_REG, offset);
  1767. if (unlikely(ret < 0)) {
  1768. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1769. __func__, __LINE__);
  1770. goto err_exit;
  1771. }
  1772. }
  1773. if (write_first_data) {
  1774. ret = mhl_write_byte_reg(cbus, MSC_SEND_DATA1_REG, first_data);
  1775. if (unlikely(ret < 0)) {
  1776. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1777. __func__, __LINE__);
  1778. goto err_exit;
  1779. }
  1780. }
  1781. if (write_second_data) {
  1782. ret = mhl_write_byte_reg(cbus, MSC_SEND_DATA2_REG, second_data);
  1783. if (unlikely(ret < 0)) {
  1784. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1785. __func__, __LINE__);
  1786. goto err_exit;
  1787. }
  1788. }
  1789. ret = mhl_write_byte_reg(cbus, CBUS_MSC_CMD_START_REG, req_type);
  1790. if (unlikely(ret < 0)) {
  1791. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  1792. __func__, __LINE__);
  1793. goto err_exit;
  1794. }
  1795. if (!completion_done(&sii8240->cbus_complete)) {
  1796. ret = wait_for_completion_timeout(&sii8240->cbus_complete,
  1797. msecs_to_jiffies(2000));
  1798. if (ret == 0)
  1799. pr_warn("[WARN] sii8240: %s() timeout. type:0x%X, offset:0x%X\n",
  1800. __func__, req_type, offset);
  1801. ret = ret ? 0 : -EIO;
  1802. }
  1803. err_exit:
  1804. mutex_unlock(&sii8240->msc_lock);
  1805. mutex_lock(&sii8240->lock);
  1806. return ret;
  1807. }
  1808. /* Must call with sii8240->lock held */
  1809. static int sii8240_devcap_read_locked(struct sii8240_data *sii8240, u8 offset)
  1810. {
  1811. int ret;
  1812. u8 val;
  1813. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  1814. if (offset > 0xf)
  1815. return -EINVAL;
  1816. ret = sii8240_msc_req_locked(sii8240, START_READ_DEVCAP, offset, 0, 0);
  1817. if (unlikely(ret < 0))
  1818. pr_warn("[WARN] msc req locked error\n");
  1819. ret = mhl_read_byte_reg(cbus, MSC_RCVD_DATA1_REG, &val);
  1820. if (unlikely(ret < 0)) {
  1821. pr_err("[ERROR] msc rcvd data reg read failing\n");
  1822. return ret;
  1823. }
  1824. return val;
  1825. }
  1826. static int sii8240_queue_devcap_read_locked(struct sii8240_data *sii8240,
  1827. u8 offset)
  1828. {
  1829. struct cbus_data *cbus_cmd;
  1830. int ret = 0;
  1831. cbus_cmd = kzalloc(sizeof(struct cbus_data), GFP_KERNEL);
  1832. if (!cbus_cmd) {
  1833. pr_err("[ERROR] sii8240: failed to allocate msc data\n");
  1834. return -ENOMEM;
  1835. }
  1836. cbus_cmd->cmd = READ_DEVCAP;
  1837. cbus_cmd->offset = offset;
  1838. cbus_cmd->use_completion = true;
  1839. init_completion(&cbus_cmd->complete);
  1840. list_add_tail(&cbus_cmd->list, &sii8240->cbus_data_list);
  1841. queue_work(sii8240->cbus_cmd_wqs, &sii8240->cbus_work);
  1842. mutex_unlock(&sii8240->lock);
  1843. ret = wait_for_completion_timeout(&cbus_cmd->complete,
  1844. msecs_to_jiffies(2500));
  1845. mutex_lock(&sii8240->lock);
  1846. if (ret == 0)
  1847. pr_warn("sii8240: read devcap:0x%X time out !!\n", offset);
  1848. else
  1849. kfree(cbus_cmd);
  1850. return ret;
  1851. }
  1852. static int sii8240_queue_cbus_cmd_locked(struct sii8240_data *sii8240,
  1853. u8 command, u8 offset, u8 data)
  1854. {
  1855. struct cbus_data *cbus_cmd;
  1856. cbus_cmd = kzalloc(sizeof(struct cbus_data), GFP_KERNEL);
  1857. if (!cbus_cmd) {
  1858. pr_err("[ERROR] sii8240: failed to allocate msc data\n");
  1859. return -ENOMEM;
  1860. }
  1861. cbus_cmd->cmd = command;
  1862. cbus_cmd->offset = offset;
  1863. cbus_cmd->data = data; /*modified for 3.1.1.13*/
  1864. cbus_cmd->use_completion = false;
  1865. list_add_tail(&cbus_cmd->list, &sii8240->cbus_data_list);
  1866. queue_work(sii8240->cbus_cmd_wqs, &sii8240->cbus_work);
  1867. return 0;
  1868. }
  1869. bool is_key_supported(struct sii8240_data *sii8240, int keyindex)
  1870. {
  1871. u8 log_dev = DEV_LOGICAL_DEV;
  1872. if (sii8240_rcp_keymap[keyindex].key_code != KEY_UNKNOWN &&
  1873. sii8240_rcp_keymap[keyindex].key_code != KEY_RESERVED &&
  1874. (sii8240_rcp_keymap[keyindex].log_dev_type & log_dev))
  1875. return true;
  1876. else
  1877. return false;
  1878. }
  1879. static int sii8240_register_input_device(struct sii8240_data *sii8240)
  1880. {
  1881. struct input_dev *input;
  1882. int ret;
  1883. u8 i;
  1884. input = input_allocate_device();
  1885. if (!input) {
  1886. pr_err("[ERROR] sii8240: failed to allocate input device\n");
  1887. return -ENOMEM;
  1888. }
  1889. set_bit(EV_KEY, input->evbit);
  1890. for (i = 0; i < SII8240_RCP_NUM_KEYS; i++)
  1891. sii8240->keycode[i] = sii8240_rcp_keymap[i].key_code;
  1892. input->keycode = sii8240->keycode;
  1893. input->keycodemax = SII8240_RCP_NUM_KEYS;
  1894. input->keycodesize = sizeof(sii8240->keycode[0]);
  1895. for (i = 0; i < SII8240_RCP_NUM_KEYS; i++) {
  1896. if (is_key_supported(sii8240, i))
  1897. set_bit(sii8240->keycode[i], input->keybit);
  1898. }
  1899. input->name = "sii8240_rcp";
  1900. input->id.bustype = BUS_I2C;
  1901. input_set_drvdata(input, sii8240);
  1902. dev_info(&sii8240->pdata->tmds_client->dev,
  1903. "sii8240: registering input device\n");
  1904. ret = input_register_device(input);
  1905. if (unlikely(ret < 0)) {
  1906. pr_err("[ERROR] sii8240: failed to register input device\n");
  1907. input_free_device(input);
  1908. return ret;
  1909. }
  1910. mutex_lock(&sii8240->input_lock);
  1911. sii8240->input_dev = input;
  1912. mutex_unlock(&sii8240->input_lock);
  1913. return 0;
  1914. }
  1915. static void rcp_key_report(struct sii8240_data *sii8240, u16 key)
  1916. {
  1917. pr_info("sii8240: report rcp key: %d\n", key);
  1918. mutex_lock(&sii8240->input_lock);
  1919. if (sii8240->input_dev) {
  1920. input_report_key(sii8240->input_dev, key, 1);
  1921. input_report_key(sii8240->input_dev, key, 0);
  1922. input_sync(sii8240->input_dev);
  1923. }
  1924. mutex_unlock(&sii8240->input_lock);
  1925. }
  1926. static void cbus_process_rcp_key_locked(struct sii8240_data *sii8240, u8 key)
  1927. {
  1928. if (key == 0x7E) {
  1929. pr_info("sii8240 : MHL switch event sent : 1\n");
  1930. switch_set_state(&sii8240->mhl_event_switch, 1);
  1931. }
  1932. if (key < SII8240_RCP_NUM_KEYS) {
  1933. if (is_key_supported(sii8240, key)) {
  1934. /* Report the key */
  1935. rcp_key_report(sii8240, sii8240->keycode[key]);
  1936. /* Send the RCP ack */
  1937. sii8240_msc_req_locked(sii8240, START_MSC_MSG, 0, MSG_RCPK, key);
  1938. } else {
  1939. /* Send a RCPE(RCP Error Message) to Peer followed by RCPK with
  1940. * old key-code so that initiator(TV) can recognize
  1941. * failed key code */
  1942. sii8240_msc_req_locked(sii8240, START_MSC_MSG,
  1943. 0, MSG_RCPE, RCPE_KEY_INVALID);
  1944. }
  1945. } else {
  1946. /* Input key value is release key
  1947. * Send the RCP ack */
  1948. sii8240_msc_req_locked(sii8240, START_MSC_MSG, 0, MSG_RCPK, key);
  1949. }
  1950. }
  1951. static void cbus_process_rap_key_locked(struct sii8240_data *sii8240, u8 key)
  1952. {
  1953. int ret;
  1954. u8 err = RAPK_NO_ERROR;
  1955. switch (key) {
  1956. case RAP_POLL:
  1957. /* no action, just sent to elicit an ACK */
  1958. break;
  1959. case RAP_CONTENT_ON:
  1960. /*TODO:A source shall not enable its TMDS unless it has received
  1961. * SET_HPD,sees active RxSense(RSEN) and sees PATH_EN{Sink} = 1
  1962. */
  1963. ret = tmds_control(sii8240, true);
  1964. if (unlikely(ret < 0)) {
  1965. pr_err("[ERROR]sii8240: %s():%d tmds_control failed!\n",
  1966. __func__, __LINE__);
  1967. return;
  1968. }
  1969. break;
  1970. case RAP_CONTENT_OFF:
  1971. /*TODO: With MHL 1.2 Specs,For a Source, CONTENT_OFF does not
  1972. * necessarily means that TMDS output is disabled */
  1973. ret = tmds_control(sii8240, false);
  1974. if (unlikely(ret < 0)) {
  1975. pr_err("[ERROR]sii8240: %s():%d tmds_control failed!\n",
  1976. __func__, __LINE__);
  1977. return;
  1978. }
  1979. break;
  1980. default:
  1981. pr_warn("sii8240: unrecognized RAP code %u\n", key);
  1982. err = RAPK_UNRECOGNIZED;
  1983. }
  1984. ret = sii8240_msc_req_locked(sii8240, START_MSC_MSG, 0, MSG_RAPK, err);
  1985. if (unlikely(ret < 0)) {
  1986. pr_err("[ERROR] sii8240: %s():%d sii8240_msc_req_locked failed!\n",
  1987. __func__, __LINE__);
  1988. return;
  1989. }
  1990. }
  1991. static void sii8240_power_down(struct sii8240_data *sii8240)
  1992. {
  1993. pr_info("%s()\n", __func__);
  1994. mhl_hpd_control_low(sii8240);
  1995. mutex_lock(&sii8240->lock);
  1996. if (sii8240->irq_enabled) {
  1997. disable_irq_nosync(sii8240->irq);
  1998. sii8240->irq_enabled = false;
  1999. pr_info("sii8240: interrupt disabled\n");
  2000. }
  2001. mutex_unlock(&sii8240->lock);
  2002. sii8240->state = STATE_DISCONNECTED;
  2003. cancel_work_sync(&sii8240->cbus_work);
  2004. cancel_work_sync(&sii8240->redetect_work);
  2005. cancel_work_sync(&sii8240->avi_control_work);
  2006. #ifdef SFEATURE_UNSTABLE_SOURCE_WA
  2007. del_timer_sync(&sii8240->avi_check_timer);
  2008. #endif
  2009. if (sii8240->pdata->power)
  2010. sii8240->pdata->power(0);
  2011. }
  2012. static int cbus_handle_write_state_locked(struct sii8240_data *sii8240,
  2013. u8 offset, u8 data)
  2014. {
  2015. int ret;
  2016. ret = sii8240_msc_req_locked
  2017. (sii8240, START_WRITE_STAT_SET_INT, offset, data, 0);
  2018. if (unlikely(ret < 0))
  2019. return ret;
  2020. if (offset == CBUS_MHL_STATUS_OFFSET_0 &&
  2021. data == MHL_STATUS_DCAP_READY) {
  2022. /* notify the peer by updating the status register too */
  2023. sii8240_msc_req_locked(sii8240, START_WRITE_STAT_SET_INT,
  2024. CBUS_MHL_INTR_REG_0,
  2025. MHL_INT_DCAP_CHG, 0);
  2026. }
  2027. return ret;
  2028. }
  2029. static void sii8240_setup_charging(struct sii8240_data *sii8240)
  2030. {
  2031. u8 plim, dev_cat;
  2032. u16 adopter_id;
  2033. u8 *peer_devcap = sii8240->regs.peer_devcap;
  2034. if ((peer_devcap[MHL_DEVCAP_MHL_VERSION] & 0xF0) >= 0x20) {
  2035. dev_cat = peer_devcap[MHL_DEVCAP_DEV_CAT];
  2036. pr_info("sii8240: DEV_CAT 0x%x\n", dev_cat);
  2037. if (((dev_cat >> 4) & 0x1) == 1) {
  2038. plim = ((dev_cat >> 5) & 0x3);
  2039. pr_info("sii8240 : PLIM 0x%x\n", plim);
  2040. if (sii8240->pdata->charger_mhl_cb)
  2041. sii8240->pdata->charger_mhl_cb(false, plim);
  2042. }
  2043. } else if ((peer_devcap[MHL_DEVCAP_MHL_VERSION] & 0xF0) == 0x10) {
  2044. adopter_id = peer_devcap[MHL_DEVCAP_ADOPTER_ID_L] |
  2045. peer_devcap[MHL_DEVCAP_ADOPTER_ID_H] << 8;
  2046. pr_info("sii8240: adopter id:%d, reserved:%d\n",
  2047. adopter_id, peer_devcap[MHL_DEVCAP_RESERVED]);
  2048. if (adopter_id == 321 && peer_devcap[MHL_DEVCAP_RESERVED] == 2) {
  2049. if (sii8240->pdata->charger_mhl_cb)
  2050. sii8240->pdata->charger_mhl_cb(false, 0x01);
  2051. }
  2052. } else {
  2053. pr_err("sii8240:%s MHL version error - 0x%X\n", __func__,
  2054. peer_devcap[MHL_DEVCAP_MHL_VERSION]);
  2055. }
  2056. }
  2057. static void sii8240_msc_event(struct work_struct *work)
  2058. {
  2059. int ret = -1;
  2060. struct cbus_data *data, *next;
  2061. struct sii8240_data *sii8240 = container_of(work, struct sii8240_data,
  2062. cbus_work);
  2063. mutex_lock(&sii8240->cbus_lock);
  2064. mutex_lock(&sii8240->lock);
  2065. list_for_each_entry_safe(data, next, &sii8240->cbus_data_list, list) {
  2066. if (sii8240->cbus_abort) {
  2067. pr_warn("sii8240 : abort received. so wait 2secs\n");
  2068. sii8240->cbus_abort = false;
  2069. msleep(2000);
  2070. }
  2071. if (sii8240->state != STATE_DISCONNECTED) {
  2072. switch (data->cmd) {
  2073. case MSC_MSG:
  2074. switch (data->offset) {
  2075. case MSG_RCP:
  2076. pr_info("sii8240: RCP Arrived. KEY CODE:%d\n",
  2077. data->data);
  2078. cbus_process_rcp_key_locked(sii8240, data->data);
  2079. break;
  2080. case MSG_RAP:
  2081. pr_info("sii8240: RAP Arrived\n");
  2082. cbus_process_rap_key_locked(sii8240, data->data);
  2083. break;
  2084. case MSG_RCPK:
  2085. pr_info("sii8240: RCPK Arrived\n");
  2086. break;
  2087. case MSG_RCPE:
  2088. pr_info("sii8240: RCPE Arrived\n");
  2089. break;
  2090. case MSG_RAPK:
  2091. pr_info("sii8240: RAPK Arrived\n");
  2092. break;
  2093. default:
  2094. pr_info("sii8240: MAC error\n");
  2095. break;
  2096. }
  2097. break;
  2098. case READ_DEVCAP:
  2099. pr_debug("sii8240: READ_DEVCAP : 0x%X\n",
  2100. data->offset);
  2101. ret = sii8240_devcap_read_locked(sii8240,
  2102. data->offset);
  2103. if (unlikely(ret < 0)) {
  2104. pr_err("[ERROR] error offset%d\n",
  2105. data->offset);
  2106. break;
  2107. }
  2108. sii8240->regs.peer_devcap[data->offset] = ret;
  2109. if (data->use_completion)
  2110. complete(&data->complete);
  2111. if (data->offset == MHL_DEVCAP_DEV_CAT)
  2112. sii8240_setup_charging(sii8240);
  2113. ret = 0;
  2114. break;
  2115. case SET_INT:
  2116. pr_info("sii8240: msc_event: SET_INT\n");
  2117. ret = sii8240_msc_req_locked(sii8240,
  2118. START_WRITE_STAT_SET_INT,
  2119. data->offset, data->data, 0);
  2120. if (unlikely(ret < 0))
  2121. pr_err("[ERROR] sii8240: error set_int req\n");
  2122. break;
  2123. case WRITE_STAT:
  2124. pr_info("sii8240: msc_event: WRITE_STAT\n");
  2125. ret = cbus_handle_write_state_locked(sii8240,
  2126. data->offset, data->data);
  2127. if (unlikely(ret < 0))
  2128. pr_err("[ERROR] sii8240: error write_stat\n");
  2129. break;
  2130. case WRITE_BURST:
  2131. /* TODO: */
  2132. break;
  2133. case GET_STATE:
  2134. case GET_VENDOR_ID:
  2135. case SET_HPD:
  2136. case CLR_HPD:
  2137. case GET_MSC_ERR_CODE:
  2138. case GET_SC3_ERR_CODE:
  2139. case GET_SC1_ERR_CODE:
  2140. case GET_DDC_ERR_CODE:
  2141. ret = sii8240_msc_req_locked(sii8240,
  2142. START_MISC_CMD, data->offset,
  2143. data->data, 0);
  2144. if (unlikely(ret < 0))
  2145. pr_err("[ERROR] sii8240: offset%d,data=%d\n",
  2146. data->offset, data->data);
  2147. break;
  2148. default:
  2149. pr_info("sii8240: invalid msc command\n");
  2150. break;
  2151. }
  2152. }
  2153. list_del(&data->list);
  2154. if (!data->use_completion)
  2155. kfree(data);
  2156. }
  2157. mutex_unlock(&sii8240->lock);
  2158. mutex_unlock(&sii8240->cbus_lock);
  2159. }
  2160. static int sii8240_get_avi_info(struct sii8240_data *sii8240)
  2161. {
  2162. int ret;
  2163. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  2164. ret = mhl_modify_reg(hdmi, US_HDMI_INFO_PKT_CTRL,
  2165. BIT_RX_HDMI_CTRL2_VSI_MON_SEL_MASK,
  2166. BIT_RX_HDMI_CTRL2_VSI_MON_SEL_AVI_INFOFRAME);
  2167. if (unlikely(ret < 0)) {
  2168. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  2169. __func__, __LINE__);
  2170. return ret;
  2171. }
  2172. ret = mhl_read_block_reg(hdmi,
  2173. 0xB8, INFO_BUFFER, sii8240->aviInfoFrame);
  2174. if (unlikely(ret < 0)) {
  2175. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  2176. __func__, __LINE__);
  2177. return ret;
  2178. }
  2179. print_hex_dump(KERN_ERR, "sii8240: avi_info = ",
  2180. DUMP_PREFIX_NONE, 16, 1,
  2181. sii8240->aviInfoFrame, INFO_BUFFER, false);
  2182. return ret;
  2183. }
  2184. #ifdef MHL_2X_3D
  2185. static int sii8240_get_vsi_info(struct sii8240_data *sii8240)
  2186. {
  2187. int ret;
  2188. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  2189. ret = mhl_modify_reg(hdmi,
  2190. 0xA3, BIT_RX_HDMI_CTRL2_VSI_MON_SEL_MASK,
  2191. BIT_RX_HDMI_CTRL2_VSI_MON_SEL_VS_INFOFRAME);
  2192. if (unlikely(ret < 0)) {
  2193. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2194. __func__, __LINE__);
  2195. return ret;
  2196. }
  2197. ret = mhl_write_block_reg(hdmi, 0xB8,
  2198. INFO_BUFFER,
  2199. sii8240->vendorSpecificInfoFrame);
  2200. if (unlikely(ret < 0)) {
  2201. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2202. __func__, __LINE__);
  2203. return ret;
  2204. }
  2205. return ret;
  2206. }
  2207. /*Video Format Data in 3D support *
  2208. * 0x00: burst id_h *
  2209. * 0x01: burst id_l *
  2210. * 0x02: check_sum *
  2211. * 0x03: total_entry *
  2212. * 0x04: sequence index *
  2213. * 0x05: number of entry *
  2214. * 0x06: vdi_0_h *
  2215. * 0x07: vdi_0_l *
  2216. * 0x08: vdi_1_h *
  2217. * 0x09: vdi_1_l *
  2218. * 0x0A: vdi_2_h *
  2219. * 0x0B: vdi_2_l *
  2220. * 0x0C: vdi_3_h *
  2221. * 0x0D: vdi_3_l *
  2222. * 0x0E: vdi_4_h *
  2223. * 0x0F: vdi_4_l */
  2224. static int sii8240_check_3D_vic(struct sii8240_data *sii8240,
  2225. u8 tot_ent, u8 num_ent, u8 *data)
  2226. {
  2227. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  2228. int ret = 0;
  2229. if ((sii8240->vic_data.tot_ent - (sii8240->vic_data.num_ent + num_ent))
  2230. >= 0) {
  2231. pr_info("num_ent : %d\n", num_ent);
  2232. memcpy(&sii8240->vic_data.vdi[sii8240->vic_data.num_ent],
  2233. data, (2*num_ent));
  2234. sii8240->vic_data.num_ent += num_ent;
  2235. }
  2236. if (sii8240->vic_data.num_ent == sii8240->vic_data.tot_ent) {
  2237. if ((sii8240->hpd_status == true) &&
  2238. (sii8240->dtd_data.num_ent == sii8240->dtd_data.tot_ent)) {
  2239. /*make HPD be high*/
  2240. ret = mhl_modify_reg(tmds, UPSTRM_HPD_CTRL_REG,
  2241. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_MASK|
  2242. BIT_HPD_CTRL_HPD_OUT_OVR_EN_MASK,
  2243. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_ON|
  2244. BIT_HPD_CTRL_HPD_OUT_OVR_EN_ON);
  2245. if (unlikely(ret < 0)) {
  2246. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2247. __func__, __LINE__);
  2248. return ret;
  2249. }
  2250. }
  2251. pr_info("HPD high\n");
  2252. }
  2253. return ret;
  2254. }
  2255. static int sii8240_check_3D_dtd(struct sii8240_data *sii8240,
  2256. u8 tot_ent, u8 num_ent, u8 *data)
  2257. {
  2258. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  2259. int ret = 0;
  2260. if ((sii8240->dtd_data.tot_ent -
  2261. (sii8240->dtd_data.num_ent + num_ent)) >= 0) {
  2262. memcpy(&sii8240->dtd_data.vdi[sii8240->dtd_data.num_ent],
  2263. data, (2*num_ent));
  2264. sii8240->dtd_data.num_ent += num_ent;
  2265. }
  2266. if (sii8240->dtd_data.num_ent == sii8240->dtd_data.tot_ent) {
  2267. if ((sii8240->hpd_status == true) &&
  2268. (sii8240->vic_data.num_ent == sii8240->vic_data.tot_ent)) {
  2269. /*make HPD be high*/
  2270. ret = mhl_modify_reg(tmds, UPSTRM_HPD_CTRL_REG,
  2271. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_MASK|
  2272. BIT_HPD_CTRL_HPD_OUT_OVR_EN_MASK,
  2273. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_ON|
  2274. BIT_HPD_CTRL_HPD_OUT_OVR_EN_ON);
  2275. if (unlikely(ret < 0)) {
  2276. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2277. __func__, __LINE__);
  2278. return ret;
  2279. }
  2280. }
  2281. pr_info("HPD high\n");
  2282. }
  2283. return ret;
  2284. }
  2285. #endif
  2286. static int sii8240_get_write_burst(struct sii8240_data *sii8240)
  2287. {
  2288. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  2289. int ret;
  2290. u8 scratchpad[16];
  2291. #ifdef MHL_2X_3D
  2292. u16 burst_id = 0;
  2293. #endif
  2294. memset(scratchpad, 0x00, 16);
  2295. ret = mhl_read_block_reg(cbus, CBUS_MHL_SCRPAD_REG_0, 16, scratchpad);
  2296. if (unlikely(ret < 0)) {
  2297. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2298. __func__, __LINE__);
  2299. return ret;
  2300. }
  2301. #ifdef MHL_2X_3D
  2302. burst_id = scratchpad[B_ID_H];
  2303. burst_id <<= 8;
  2304. burst_id |= scratchpad[B_ID_L];
  2305. switch (burst_id) {
  2306. case MHL_3D_VIC_CODE:
  2307. pr_info("vid code\n");
  2308. /*Initiation of first scratchpad*/
  2309. if (scratchpad[SEQ] == 0x01) {
  2310. sii8240->vic_data.tot_ent = scratchpad[TOT_ENT];
  2311. sii8240->vic_data.num_ent = 0;
  2312. }
  2313. ret = sii8240_check_3D_vic(sii8240, scratchpad[TOT_ENT],
  2314. scratchpad[NUM_ENT], &scratchpad[VDI_0_H]);
  2315. if (unlikely(ret < 0)) {
  2316. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2317. __func__, __LINE__);
  2318. return ret;
  2319. }
  2320. break;
  2321. case MHL_3D_DTD_CODE:
  2322. pr_info("dtd code\n");
  2323. if (scratchpad[SEQ] == 0x01) {
  2324. sii8240->dtd_data.tot_ent = scratchpad[TOT_ENT];
  2325. sii8240->dtd_data.num_ent = 0;
  2326. }
  2327. ret = sii8240_check_3D_dtd(sii8240, scratchpad[TOT_ENT],
  2328. scratchpad[NUM_ENT], &scratchpad[VDI_0_H]);
  2329. if (unlikely(ret < 0)) {
  2330. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2331. __func__, __LINE__);
  2332. return ret;
  2333. }
  2334. break;
  2335. default:
  2336. pr_warn("[WARN] invalid burst_id\n");
  2337. break;
  2338. }
  2339. #endif
  2340. return ret;
  2341. }
  2342. static int sii8240_check_avi_info_checksum(struct sii8240_data *sii8240,
  2343. u8 *data)
  2344. {
  2345. u8 checksum = 0;
  2346. u8 i = 0;
  2347. u8 infoframedata[INFO_BUFFER];
  2348. memcpy(infoframedata, data, INFO_BUFFER);
  2349. for (i = 0; i < INFO_BUFFER; i++)
  2350. checksum += infoframedata[i];
  2351. checksum = 0x100 - checksum;
  2352. return checksum;
  2353. }
  2354. static void sii8240_set_avi_info_checksum_data(struct sii8240_data *sii8240)
  2355. {
  2356. u8 checksum;
  2357. u8 i;
  2358. /*these are set by the hardware*/
  2359. checksum = 0x82 + 0x02 + 0x0D;
  2360. for (i = 1; i < SIZE_AVI_INFOFRAME; i++)
  2361. checksum += sii8240->output_avi_data[i];
  2362. checksum = 0x100 - checksum;
  2363. sii8240->output_avi_data[0] = checksum;
  2364. }
  2365. static int sii8240_check_avi_info(struct sii8240_data *sii8240)
  2366. {
  2367. int ret = 0, i;
  2368. for (i = 0 ; i < INFO_BUFFER ; i++) {
  2369. if (sii8240->current_aviInfoFrame[i] !=
  2370. sii8240->aviInfoFrame[i])
  2371. ret = 1;
  2372. }
  2373. if (ret == 1) {
  2374. pr_info("%s() current_aviInfoFrame -------\n", __func__);
  2375. print_hex_dump(KERN_ERR, "sii8240: avi_info = ",
  2376. DUMP_PREFIX_NONE, 16, 1,
  2377. sii8240->current_aviInfoFrame, INFO_BUFFER, false);
  2378. pr_info("%s() aviInfoFrame -------\n", __func__);
  2379. print_hex_dump(KERN_ERR, "sii8240: avi_info = ",
  2380. DUMP_PREFIX_NONE, 16, 1,
  2381. sii8240->aviInfoFrame, INFO_BUFFER, false);
  2382. }
  2383. return ret;
  2384. }
  2385. static void sii8240_set_colorspace
  2386. (struct sii8240_data *sii8240, bool pack_pixel)
  2387. {
  2388. int ret = 0;
  2389. u8 colorspace = 0;
  2390. u8 input_range = 0;
  2391. u8 data;
  2392. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  2393. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  2394. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  2395. if (pack_pixel)
  2396. pr_info("sii8240: %s(): pack_pixel\n", __func__);
  2397. else
  2398. pr_info("sii8240: %s(): none pack_pixel\n", __func__);
  2399. if (pack_pixel)
  2400. /*Video stream is encoded in PackedPixel mode*/
  2401. data = BIT_VID_MODE_m1080p_ENABLE;
  2402. else
  2403. data = BIT_VID_MODE_m1080p_DISABLE;
  2404. ret = mhl_modify_reg(tmds, 0x4A, BIT_VID_MODE_m1080p_MASK, data);
  2405. if (unlikely(ret < 0)) {
  2406. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2407. __func__, __LINE__);
  2408. return;
  2409. }
  2410. if (pack_pixel)
  2411. /*The incoming HDMI pixel clock is multiplied
  2412. by 2 for PackedPixel mode*/
  2413. data = BIT_MHLTX_CTL4_MHL_CLK_RATIO_2X;
  2414. else
  2415. data = BIT_MHLTX_CTL4_MHL_CLK_RATIO_3X;
  2416. ret = mhl_modify_reg(hdmi, 0x83,
  2417. BIT_MHLTX_CTL4_MHL_CLK_RATIO_MASK, data);
  2418. if (unlikely(ret < 0)) {
  2419. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2420. __func__, __LINE__);
  2421. return;
  2422. }
  2423. if (pack_pixel)
  2424. /*the outgoing MHL link clock is
  2425. configured as PackedPixel clock*/
  2426. data = 0x60;
  2427. else
  2428. data = 0xA0;
  2429. ret = mhl_write_byte_reg(hdmi, 0x85, data);
  2430. if (unlikely(ret < 0)) {
  2431. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2432. __func__, __LINE__);
  2433. return;
  2434. }
  2435. /*[INFO_DATA1] 0x00 : nodata
  2436. 0x20 : YCbCr 4:2:2
  2437. 0x40 : YCbCr 4:4:4
  2438. 0x60 ; Future*/
  2439. colorspace = (sii8240->current_aviInfoFrame
  2440. [INFO_CHECKSUM + INFO_DATA1] & 0x60);
  2441. switch (colorspace) {
  2442. case 0x00:
  2443. pr_info("RGB :");
  2444. colorspace = 0x00;
  2445. /*[INFO_DATA3] 0x00 : Default
  2446. 0x04 : Limited Range
  2447. 0x08 : Full Range
  2448. 0x0C : Reserved*/
  2449. input_range = (sii8240->current_aviInfoFrame
  2450. [INFO_CHECKSUM + INFO_DATA3] & 0x0C);
  2451. break;
  2452. case 0x20:
  2453. pr_info("YCBCR 422 :");
  2454. colorspace = 0x02;
  2455. input_range = (sii8240->current_aviInfoFrame
  2456. [INFO_CHECKSUM + INFO_DATA5] & 0xC0);
  2457. break;
  2458. case 0x40:
  2459. pr_info("YCBCR 444 :");
  2460. input_range = (sii8240->current_aviInfoFrame
  2461. [INFO_CHECKSUM + INFO_DATA5] & 0xC0);
  2462. colorspace = 0x01;
  2463. break;
  2464. case 0x60:
  2465. pr_info("FUTURE :");
  2466. colorspace = 0x00;
  2467. input_range = (sii8240->current_aviInfoFrame
  2468. [INFO_CHECKSUM + INFO_DATA5] & 0xC0);
  2469. break;
  2470. }
  2471. /*Input range checking*/
  2472. switch (input_range) {
  2473. case 0x00:
  2474. pr_info("input_range AUTO\n");
  2475. input_range = 0x00;
  2476. break;
  2477. case 0x04:
  2478. pr_info("input_range Limited\n");
  2479. input_range = 0x08;
  2480. break;
  2481. case 0x08:
  2482. pr_info("input_range FULL\n");
  2483. input_range = 0x04;
  2484. break;
  2485. case 0x0C:
  2486. pr_info("input_range Reserved\n");
  2487. input_range = 0x00;
  2488. break;
  2489. default:
  2490. pr_info("input_range default\n");
  2491. input_range = 0x00;
  2492. break;
  2493. }
  2494. if (!sii8240->hdmi_sink) {
  2495. colorspace = 0x00;
  2496. input_range = BIT_TPI_OUTPUT_QUAN_RANGE_LIMITED;
  2497. }
  2498. /*The output video encoding is forced to YCbCr 4:2:2
  2499. by setting the input video format and
  2500. output video format at TPI:0x09 and TPI:0x0A.*/
  2501. data = colorspace|input_range;
  2502. ret = mhl_modify_reg(tpi, 0x09,
  2503. BIT_TPI_INPUT_FORMAT_MASK |
  2504. BIT_TPI_INPUT_QUAN_RANGE_MASK, data);
  2505. if (unlikely(ret < 0)) {
  2506. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2507. __func__, __LINE__);
  2508. return;
  2509. }
  2510. if (pack_pixel)
  2511. colorspace = 0x02;
  2512. else if (input_range != 0x04)
  2513. input_range = 0x08;
  2514. data = colorspace|input_range;
  2515. ret = mhl_modify_reg(tpi, 0x0A,
  2516. BIT_TPI_OUTPUT_FORMAT_MASK |
  2517. BIT_TPI_OUTPUT_QUAN_RANGE_MASK, data);
  2518. if (unlikely(ret < 0)) {
  2519. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2520. __func__, __LINE__);
  2521. return;
  2522. }
  2523. return;
  2524. }
  2525. static int sii8240_set_mhl_timing(struct sii8240_data *sii8240)
  2526. {
  2527. /*set packed pixcel information*/
  2528. memset(sii8240->support_mhl_timing.avi_infoframe,
  2529. 0x00, HDMI_VFRMT_MAX);
  2530. sii8240->support_mhl_timing.
  2531. avi_infoframe[HDMI_PATTERN_GEN] = 1;
  2532. sii8240->support_mhl_timing.
  2533. avi_infoframe[HDMI_VFRMT_1920x1080p60_16_9] = 1;
  2534. sii8240->support_mhl_timing.
  2535. avi_infoframe[HDMI_VFRMT_1920x1080p50_16_9] = 1;
  2536. #ifdef MHL_2X_3D
  2537. sii8240->support_mhl_timing.
  2538. avi_infoframe[HDMI_VFRMT_1280x720p50_16_9] = 1;
  2539. sii8240->support_mhl_timing.
  2540. avi_infoframe[HDMI_VFRMT_1280x720p60_16_9] = 1;
  2541. sii8240->support_mhl_timing.
  2542. avi_infoframe[HDMI_VFRMT_1920x1080p24_16_9] = 1;
  2543. sii8240->support_mhl_timing.
  2544. avi_infoframe[HDMI_VFRMT_1920x1080p30_16_9] = 1;
  2545. #endif
  2546. sii8240->support_mhl_timing.
  2547. avi_infoframe[HDMI_VFRMT_640x480p60_4_3] = 1;
  2548. return 1;
  2549. }
  2550. static bool sii8240_get_mhl_timing(struct sii8240_data *sii8240, u8 vic)
  2551. {
  2552. bool ret = false;
  2553. /*get packed pixcel information*/
  2554. if (sii8240->support_mhl_timing.avi_infoframe[vic] == 1)
  2555. ret = true;
  2556. switch (vic) {
  2557. case HDMI_VFRMT_1280x720p50_16_9:
  2558. case HDMI_VFRMT_1280x720p60_16_9:
  2559. case HDMI_VFRMT_1920x1080p24_16_9:
  2560. case HDMI_VFRMT_1920x1080p30_16_9:
  2561. sii8240->input_3d_format = NON_FRAME_PACKING_3D;
  2562. ret = false;
  2563. break;
  2564. default:
  2565. break;
  2566. }
  2567. return ret;
  2568. }
  2569. static int sii8240_packed_pixel_avi_info_locked(struct sii8240_data *sii8240)
  2570. {
  2571. int ret;
  2572. bool patternGen = false;
  2573. u8 vic;
  2574. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  2575. pr_info("sii8240_packed_pixel_avi_info_locked\n");
  2576. ret = sii8240_check_avi_info_checksum(sii8240, sii8240->aviInfoFrame);
  2577. if (ret) {
  2578. pr_err("[ERROR] sii8240: avi info checksum is fail\n");
  2579. set_hdmi_mode(sii8240, false);
  2580. return ret;
  2581. }
  2582. /*AVI information was changed newly and checksum is also no problems*/
  2583. ret = set_hdmi_mode(sii8240, true);
  2584. if (unlikely(ret < 0)) {
  2585. pr_err("[ERROR] sii8240: %s():%d set_hdmi_mode fail\n",
  2586. __func__, __LINE__);
  2587. return ret;
  2588. }
  2589. /* VIC = video format Identification Code
  2590. 16 : 1920x1080p 60Hz
  2591. 31 : 1920x1080p 50HZ
  2592. 0 : no VIC format in CEA document */
  2593. vic = sii8240->aviInfoFrame[INFO_VIC];
  2594. patternGen = sii8240_get_mhl_timing(sii8240, vic);
  2595. if (patternGen) {
  2596. pr_info("sii8240: over 75MHz\n");
  2597. sii8240->regs.link_mode &= ~MHL_STATUS_CLK_MODE_NORMAL;
  2598. sii8240->regs.link_mode |= MHL_STATUS_CLK_MODE_PACKED_PIXEL;
  2599. } else {
  2600. sii8240->regs.link_mode &= ~MHL_STATUS_CLK_MODE_PACKED_PIXEL;
  2601. sii8240->regs.link_mode |= MHL_STATUS_CLK_MODE_NORMAL;
  2602. }
  2603. pr_info("vic value = %d, linkmode = 0x%x\n",
  2604. vic, sii8240->regs.link_mode);
  2605. ret = sii8240_msc_req_locked(sii8240, START_WRITE_STAT_SET_INT
  2606. , CBUS_MHL_STATUS_OFFSET_1, sii8240->regs.link_mode, 0);
  2607. if (ret < 0)
  2608. pr_warn("msc req locked error\n");
  2609. /*Copy avi information to current variable*/
  2610. memcpy(&sii8240->current_aviInfoFrame,
  2611. &sii8240->aviInfoFrame, INFO_BUFFER);
  2612. memcpy(&sii8240->output_avi_data[0],
  2613. &sii8240->aviInfoFrame[INFO_CHECKSUM], SIZE_AVI_INFOFRAME);
  2614. if (patternGen) {
  2615. /*Because of the 16bits carried in PackedPixel mode,
  2616. if the incoming video encoding is RGB of YCbCr 4:4:4,
  2617. the video must be converted to YCbCr 4:2:2*/
  2618. sii8240->output_avi_data[INFO_DATA1] &= ~0x60;
  2619. sii8240->output_avi_data[INFO_DATA1] |= 0x20;
  2620. }
  2621. sii8240_set_avi_info_checksum_data(sii8240);
  2622. /*HDMI input clock is under 75MHz*/
  2623. if (vic <= HDMI_VFRMT_720x480p60_16_9 && vic != 0) {
  2624. pr_info("%s() under 75MHz\n", __func__);
  2625. ret = mhl_write_byte_reg(hdmi, 0x4C, 0xD0);
  2626. if (unlikely(ret < 0)) {
  2627. pr_err("[ERROR] sii8240: %s():%d mhl_write_byte_reg\n",
  2628. __func__, __LINE__);
  2629. return ret;
  2630. }
  2631. }
  2632. /*HDMI input clock is over 75MHz*/
  2633. if (patternGen) {
  2634. ret = mhl_write_byte_reg(hdmi, 0x4C, 0xD0);
  2635. if (unlikely(ret < 0)) {
  2636. pr_err("[ERROR] sii8240: %s():%d mhl_write_byte_reg\n",
  2637. __func__, __LINE__);
  2638. return ret;
  2639. }
  2640. }
  2641. sii8240_set_colorspace(sii8240, patternGen);
  2642. return ret;
  2643. }
  2644. static int sii8240_bypass_avi_info_locked(struct sii8240_data *sii8240)
  2645. {
  2646. int ret;
  2647. /*struct i2c_client *tpi = sii8240->pdata->tpi_client; */
  2648. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  2649. pr_info("sii8240_bypass_avi_info_locked\n");
  2650. ret = sii8240_check_avi_info_checksum(sii8240, sii8240->aviInfoFrame);
  2651. if (ret) {
  2652. pr_err("[ERROR] sii8240: avi info checksum is fail\n");
  2653. set_hdmi_mode(sii8240, false);
  2654. return ret;
  2655. }
  2656. /*AVI information was changed newly and checksum is also no problems*/
  2657. sii8240->regs.link_mode &= ~MHL_STATUS_CLK_MODE_PACKED_PIXEL;
  2658. sii8240->regs.link_mode |= MHL_STATUS_CLK_MODE_NORMAL;
  2659. ret = sii8240_msc_req_locked(sii8240, START_WRITE_STAT_SET_INT,
  2660. CBUS_MHL_STATUS_OFFSET_1, sii8240->regs.link_mode, 0);
  2661. if (unlikely(ret < 0)) {
  2662. pr_err("[ERROR] sii8240: %s():%d sii8240_msc_req_locked fail\n",
  2663. __func__, __LINE__);
  2664. return ret;
  2665. }
  2666. ret = mhl_write_byte_reg(hdmi, 0x4C, 0xD0);
  2667. if (unlikely(ret < 0)) {
  2668. pr_err("[ERROR] sii8240: %s():%d mhl_write_byte_reg\n",
  2669. __func__, __LINE__);
  2670. return ret;
  2671. }
  2672. /*bypass avi info*/
  2673. memcpy(&sii8240->current_aviInfoFrame,
  2674. &sii8240->aviInfoFrame, INFO_BUFFER);
  2675. pr_info("%s() change current_aviInfoFrame\n", __func__);
  2676. print_hex_dump(KERN_ERR, "sii8240: avi_info = ",
  2677. DUMP_PREFIX_NONE, 16, 1,
  2678. sii8240->current_aviInfoFrame, INFO_BUFFER, false);
  2679. memcpy(&sii8240->output_avi_data[0],
  2680. &sii8240->aviInfoFrame[INFO_CHECKSUM], SIZE_AVI_INFOFRAME);
  2681. sii8240_set_avi_info_checksum_data(sii8240);
  2682. sii8240_set_colorspace(sii8240, false);
  2683. return ret;
  2684. }
  2685. static void sii8240_avi_control_thread(struct work_struct *work)
  2686. {
  2687. struct sii8240_data *sii8240 = container_of(work, struct sii8240_data,
  2688. avi_control_work);
  2689. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  2690. #ifdef SFEATURE_HDCP_SUPPORT
  2691. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  2692. #endif
  2693. int ret;
  2694. #ifdef MHL_2X_3D
  2695. struct cbus_data *cbus_cmd;
  2696. bool feature_3d = false;
  2697. #endif
  2698. mutex_lock(&sii8240->lock);
  2699. if (sii8240->avi_work == true) {
  2700. sii8240->avi_work = false;
  2701. switch (sii8240->avi_cmd) {
  2702. case HPD_HIGH_EVENT:
  2703. pr_info("***HPD high\n");
  2704. /*We will read minimum devcap information*/
  2705. sii8240_queue_devcap_read_locked(sii8240,
  2706. MHL_DEVCAP_MHL_VERSION);
  2707. sii8240_queue_devcap_read_locked(sii8240,
  2708. MHL_DEVCAP_VID_LINK_MODE);
  2709. if (sii8240->cbus_ready) {
  2710. pr_info("sii8240: DCAP_READY and read devcap\n");
  2711. if (sii8240_queue_cbus_cmd_locked(sii8240, READ_DEVCAP,
  2712. MHL_DEVCAP_RESERVED, 0) < 0)
  2713. pr_info("sii8240: MHL_RESERVED read fail\n");
  2714. if (sii8240_queue_cbus_cmd_locked(sii8240, READ_DEVCAP,
  2715. MHL_DEVCAP_ADOPTER_ID_H, 0) < 0)
  2716. pr_info("sii8240: ADOPTER_ID_H read fail\n");
  2717. if (sii8240_queue_cbus_cmd_locked(sii8240, READ_DEVCAP,
  2718. MHL_DEVCAP_ADOPTER_ID_L, 0) < 0)
  2719. pr_info("sii8240: ADOPTER_ID_L read fail\n");
  2720. if (sii8240_queue_cbus_cmd_locked(sii8240, READ_DEVCAP,
  2721. MHL_DEVCAP_DEV_CAT, 0) < 0)
  2722. pr_info("sii8240: DEVCAP_DEV_CAT read fail\n");
  2723. }
  2724. if (!sii8240->hpd_status) {
  2725. pr_err("[ERROR] sii8240: hpd_status false\n");
  2726. goto exit;
  2727. }
  2728. pr_info("sii8240: HPD high - MHL ver=0x%x, linkmode = 0x%x\n",
  2729. sii8240->regs.peer_devcap[MHL_DEVCAP_MHL_VERSION],
  2730. sii8240->regs.peer_devcap[MHL_DEVCAP_VID_LINK_MODE]);
  2731. ret = sii8240_read_edid(sii8240);
  2732. if (unlikely(ret < 0)) {
  2733. pr_err("[ERROR] sii8240: edid read failed\n");
  2734. goto exit;
  2735. }
  2736. if (sii8240->pdata->hdmi_mhl_ops) {
  2737. struct msm_hdmi_mhl_ops *hdmi_mhl_ops = sii8240->pdata->hdmi_mhl_ops;
  2738. hdmi_mhl_ops->set_upstream_hpd(sii8240->pdata->hdmi_pdev, 1);
  2739. }
  2740. if (((sii8240->regs.peer_devcap[MHL_DEVCAP_MHL_VERSION] & 0xF0) >= 0x20)
  2741. && (sii8240->regs.peer_devcap[MHL_DEVCAP_VID_LINK_MODE] &
  2742. (MHL_DEV_VID_LINK_SUPP_PPIXEL |
  2743. MHL_DEV_VID_LINK_SUPPYCBCR422)) &&
  2744. sii8240->hdmi_sink == true) {
  2745. pr_info("CEA_NEW_AVI MHL RX Ver.2.x\n");
  2746. #ifdef MHL_2X_3D
  2747. feature_3d = true;
  2748. /*Request 3D interrupt to sink device.
  2749. * To do msc command*/
  2750. cbus_cmd = kzalloc(sizeof(struct cbus_data),
  2751. GFP_KERNEL);
  2752. if (!cbus_cmd) {
  2753. pr_err("[ERROR] sii8240: failed to allocate cbus data\n");
  2754. goto exit;
  2755. }
  2756. cbus_cmd->cmd = SET_INT;
  2757. cbus_cmd->offset = CBUS_MHL_INTR_REG_0;
  2758. cbus_cmd->data = MHL_INT_3D_REQ;
  2759. list_add_tail(&cbus_cmd->list,
  2760. &sii8240->cbus_data_list);
  2761. queue_work(sii8240->cbus_cmd_wqs, &sii8240->cbus_work);
  2762. #endif
  2763. } else {
  2764. /* TODO: This case MHL 1.0*/
  2765. pr_info("CEA_NEW_AVI MHL RX Ver.1.x, Pixel 60\n");
  2766. }
  2767. if (sii8240->hdmi_sink) {
  2768. sii8240->regs.intr_masks.intr7_mask_value =
  2769. BIT_INTR7_CEA_NO_AVI|BIT_INTR7_CEA_NO_VSI;
  2770. ret = mhl_write_byte_reg(tmds, 0x7D,
  2771. sii8240->regs.intr_masks.intr7_mask_value);
  2772. if (unlikely(ret < 0)) {
  2773. pr_err("[ERROR] : %s():%d failed !\n",
  2774. __func__, __LINE__);
  2775. goto exit;
  2776. }
  2777. sii8240->regs.intr_masks.intr8_mask_value =
  2778. BIT_INTR8_CEA_NEW_AVI|BIT_INTR8_CEA_NEW_VSI;
  2779. ret = mhl_write_byte_reg(tmds, 0x7E,
  2780. sii8240->regs.intr_masks.intr8_mask_value);
  2781. if (unlikely(ret < 0)) {
  2782. pr_err("[ERROR] : %s():%d failed !\n",
  2783. __func__, __LINE__);
  2784. goto exit;
  2785. }
  2786. sii8240->regs.intr_masks.intr5_mask_value =
  2787. BIT_INTR5_CKDT_CHANGE | BIT_INTR5_SCDT_CHANGE;
  2788. ret = mhl_write_byte_reg(tmds, 0x78,
  2789. sii8240->regs.intr_masks.intr5_mask_value);
  2790. if (unlikely(ret < 0)) {
  2791. pr_err("[ERROR]: %s():%d failed !\n",
  2792. __func__, __LINE__);
  2793. goto exit;
  2794. }
  2795. }
  2796. /*make HPD be high*/
  2797. ret = mhl_modify_reg(tmds, UPSTRM_HPD_CTRL_REG,
  2798. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_MASK |
  2799. BIT_HPD_CTRL_HPD_OUT_OVR_EN_MASK,
  2800. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_ON |
  2801. BIT_HPD_CTRL_HPD_OUT_OVR_EN_ON);
  2802. if (unlikely(ret < 0)) {
  2803. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2804. __func__, __LINE__);
  2805. goto exit;
  2806. }
  2807. if (sii8240->hdmi_sink == false) {
  2808. #ifdef SFEATURE_HDCP_SUPPORT
  2809. sii8240->regs.intr_masks.intr_tpi_mask_value =
  2810. BIT_TPI_INTR_ST0_HDCP_AUTH_STATUS_CHANGE_EVENT |
  2811. BIT_TPI_INTR_ST0_HDCP_VPRIME_VALUE_READY_EVENT |
  2812. BIT_TPI_INTR_ST0_HDCP_SECURITY_CHANGE_EVENT |
  2813. BIT_TPI_INTR_ST0_BKSV_DONE |
  2814. BIT_TPI_INTR_ST0_BKSV_ERR;
  2815. ret = mhl_write_byte_reg(tpi, 0x3C,
  2816. sii8240->regs.intr_masks.intr_tpi_mask_value);
  2817. if (unlikely(ret < 0)) {
  2818. pr_err("[ERROR] sii8240: %s():%d failed\n",
  2819. __func__, __LINE__);
  2820. goto exit;
  2821. }
  2822. #endif
  2823. ret = set_hdmi_mode(sii8240, false);
  2824. if (unlikely(ret < 0)) {
  2825. pr_err("[ERROR] sii8240: %s():%d failed\n",
  2826. __func__, __LINE__);
  2827. goto exit;
  2828. }
  2829. ret = tmds_control(sii8240, true);
  2830. if (unlikely(ret < 0)) {
  2831. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  2832. __func__, __LINE__);
  2833. goto exit;
  2834. }
  2835. }
  2836. break;
  2837. case CEA_NEW_AVI:
  2838. /*HDMI does not read EDID yet*/
  2839. pr_info("sii8240: %s():%d CEA_NEW_AVI MHL RX Ver.2.x\n",
  2840. __func__, __LINE__);
  2841. #ifdef SFEATURE_HDCP_SUPPORT
  2842. sii8240->regs.intr_masks.intr_tpi_mask_value =
  2843. BIT_TPI_INTR_ST0_HDCP_AUTH_STATUS_CHANGE_EVENT |
  2844. BIT_TPI_INTR_ST0_HDCP_VPRIME_VALUE_READY_EVENT |
  2845. BIT_TPI_INTR_ST0_HDCP_SECURITY_CHANGE_EVENT |
  2846. BIT_TPI_INTR_ST0_BKSV_DONE |
  2847. BIT_TPI_INTR_ST0_BKSV_ERR;
  2848. ret = mhl_write_byte_reg(tpi, 0x3C,
  2849. sii8240->regs.intr_masks.intr_tpi_mask_value);
  2850. if (unlikely(ret < 0)) {
  2851. pr_err("[ERROR] sii8240: %s():%d mhl_write_byte_reg\n",
  2852. __func__, __LINE__);
  2853. goto exit;
  2854. }
  2855. #endif
  2856. /*hdmi sink but avi => hdmi mode*/
  2857. ret = set_hdmi_mode(sii8240, true);
  2858. if (unlikely(ret < 0)) {
  2859. pr_err("[ERROR] sii8240: %s():%d set_hdmi_mode\n",
  2860. __func__, __LINE__);
  2861. goto exit;
  2862. }
  2863. if (((sii8240->regs.peer_devcap[MHL_DEVCAP_MHL_VERSION]
  2864. & 0xF0) >= 0x20) &&
  2865. (sii8240->regs.peer_devcap[MHL_DEVCAP_VID_LINK_MODE] &
  2866. MHL_DEV_VID_LINK_SUPP_PPIXEL) &&
  2867. (sii8240->regs.peer_devcap[MHL_DEVCAP_VID_LINK_MODE] &
  2868. MHL_DEV_VID_LINK_SUPPYCBCR422)) {
  2869. ret = sii8240_packed_pixel_avi_info_locked(sii8240);
  2870. if (unlikely(ret < 0)) {
  2871. pr_err("[ERROR] sii8240: %s():%d failed!\n",
  2872. __func__, __LINE__);
  2873. goto exit;
  2874. }
  2875. } else {
  2876. ret = sii8240_bypass_avi_info_locked(sii8240);
  2877. if (unlikely(ret < 0)) {
  2878. pr_err("[ERROR] sii8240: %s():%d failed!\n",
  2879. __func__, __LINE__);
  2880. goto exit;
  2881. }
  2882. }
  2883. ret = tmds_control(sii8240, true);
  2884. if (unlikely(ret < 0)) {
  2885. pr_err("[ERROR] sii8240: %s():%d failed!\n",
  2886. __func__, __LINE__);
  2887. goto exit;
  2888. }
  2889. break;
  2890. default:
  2891. pr_info("default cmd\n");
  2892. break;
  2893. }
  2894. sii8240->avi_work = false;
  2895. }
  2896. sii8240->avi_cmd = AVI_CMD_NONE;
  2897. exit:
  2898. mutex_unlock(&sii8240->lock);
  2899. }
  2900. static void sii8240_detection_restart(struct work_struct *work)
  2901. {
  2902. struct sii8240_data *sii8240 = container_of(work, struct sii8240_data,
  2903. redetect_work);
  2904. mutex_lock(&sii8240->lock);
  2905. pr_info("sii8240: detection restarted\n");
  2906. if (sii8240->pdata->hdmi_mhl_ops) {
  2907. struct msm_hdmi_mhl_ops *hdmi_mhl_ops = sii8240->pdata->hdmi_mhl_ops;
  2908. hdmi_mhl_ops->set_upstream_hpd(sii8240->pdata->hdmi_pdev, 0);
  2909. }
  2910. if (sii8240->mhl_connected == false) {
  2911. pr_err("[ERROR] sii8240 : already powered off\n");
  2912. goto err_exit;
  2913. }
  2914. sii8240->state = STATE_DISCONNECTED;
  2915. sii8240->rgnd = RGND_UNKNOWN;
  2916. sii8240->ap_hdcp_success = false;
  2917. sii8240->cbus_ready = 0;
  2918. mhl_hpd_control_low(sii8240);
  2919. sii8240->pdata->hw_reset();
  2920. if (sii8240_init_regs(sii8240) < 0) {
  2921. pr_err("[ERROR] sii8240: redetection failed\n");
  2922. goto err_exit;
  2923. }
  2924. if (sii8240_set_mhl_timing(sii8240) < 0) {
  2925. pr_err("[ERROR] sii8240: set mhl timing failed\n");
  2926. goto err_exit;
  2927. }
  2928. if (switch_to_d3(sii8240) < 0) {
  2929. pr_err("[ERROR] sii8240: switch to d3 error\n");
  2930. goto err_exit;
  2931. }
  2932. goto exit;
  2933. err_exit:
  2934. if (sii8240->mhl_connected == true) {
  2935. pr_info("still mhl cable connected!!\n");
  2936. queue_work(sii8240->mhl_detection_workqueue,
  2937. &sii8240->redetect_work);
  2938. }
  2939. exit:
  2940. mutex_unlock(&sii8240->lock);
  2941. }
  2942. static void sii8240_power_down_process(struct sii8240_data *sii8240)
  2943. {
  2944. pr_info("power_down_process\n");
  2945. sii8240_power_down(sii8240);
  2946. if (sii8240->mhl_connected == true) {
  2947. pr_info("still mhl cable connected!!\n");
  2948. sii8240->pdata->power(1);
  2949. sii8240->cbus_abort = false;
  2950. sii8240->hdmi_sink = false;
  2951. queue_work(sii8240->mhl_detection_workqueue,
  2952. &sii8240->redetect_work);
  2953. }
  2954. }
  2955. static int sii8240_mhl_onoff(unsigned long event)
  2956. {
  2957. int ret;
  2958. struct sii8240_data *sii8240 = dev_get_drvdata(sii8240_mhldev);
  2959. int handled = MHL_CON_UNHANDLED;
  2960. #ifdef CONFIG_MUIC_SUPPORT_MULTIMEDIA_DOCK
  2961. pr_info("sii8240_mhl_onoff mmdock debug_log event = %lu\n", event);
  2962. if (event == 2) {
  2963. pr_info("sii8240: mmdock connection\n");
  2964. sii8240->pdata->is_multimediadock = true;
  2965. event = 1;
  2966. }
  2967. #endif
  2968. if (event == sii8240->muic_state) {
  2969. pr_info("sii8240 : Same muic event, Ignored!\n");
  2970. return MHL_CON_UNHANDLED;
  2971. }
  2972. if (sii8240->pdata->int_gpio_config)
  2973. sii8240->pdata->int_gpio_config(event);
  2974. if (event) {
  2975. pr_info("sii8240:detection started\n");
  2976. __pm_stay_awake(&sii8240->mhl_ws);
  2977. sii8240->mhl_connected = true;
  2978. sii8240->muic_state = MHL_ATTACHED;
  2979. sii8240->cbus_ready = 0;
  2980. } else {
  2981. pr_info("sii8240:disconnection\n");
  2982. /* Charging stop when MHL detach */
  2983. if (sii8240->pdata->charger_mhl_cb)
  2984. sii8240->pdata->charger_mhl_cb(false, -1);
  2985. sii8240->mhl_connected = false;
  2986. sii8240->muic_state = MHL_DETACHED;
  2987. __pm_relax(&sii8240->mhl_ws);
  2988. mutex_lock(&sii8240->lock);
  2989. #ifdef CONFIG_MUIC_SUPPORT_MULTIMEDIA_DOCK
  2990. sii8240->pdata->is_multimediadock = false;
  2991. #endif
  2992. if (sii8240->pdata->hdmi_mhl_ops) {
  2993. struct msm_hdmi_mhl_ops *hdmi_mhl_ops = sii8240->pdata->hdmi_mhl_ops;
  2994. hdmi_mhl_ops->set_upstream_hpd(sii8240->pdata->hdmi_pdev, 0);
  2995. }
  2996. goto power_down;
  2997. }
  2998. pr_info("lock M--->%d\n", __LINE__);
  2999. mutex_lock(&sii8240->lock);
  3000. /* Reset flags,state of mhl */
  3001. sii8240->state = STATE_DISCONNECTED;
  3002. sii8240->rgnd = RGND_UNKNOWN;
  3003. sii8240->cbus_abort = false;
  3004. sii8240->ap_hdcp_success = false;
  3005. /* Set the board configuration so the SiI8240 has access to the
  3006. * external connector
  3007. */
  3008. if (sii8240->pdata->power) {
  3009. sii8240->pdata->power(1);
  3010. msleep(20);
  3011. }
  3012. if (sii8240->pdata->hw_reset)
  3013. sii8240->pdata->hw_reset();
  3014. ret = sii8240_init_regs(sii8240);
  3015. if (unlikely(ret < 0)) {
  3016. pr_err("[ERROR] %s() - sii8240_init_regs error\n",
  3017. __func__);
  3018. goto unhandled;
  3019. }
  3020. sii8240->hdmi_sink = false;
  3021. ret = sii8240_set_mhl_timing(sii8240);
  3022. if (unlikely(ret < 0)) {
  3023. pr_err("[ERROR] sii8240: set mhl timing failed\n");
  3024. goto unhandled;
  3025. }
  3026. ret = switch_to_d3(sii8240);
  3027. if (unlikely(ret < 0)) {
  3028. pr_err("[ERROR]sii8240: switch_to_d3 !\n");
  3029. goto unhandled;
  3030. }
  3031. mutex_unlock(&sii8240->lock);
  3032. pr_info("sii8240: detection_callback return !\n");
  3033. return MHL_CON_HANDLED;
  3034. unhandled:
  3035. pr_info("sii8240: Detection failed and additional information about sii8240");
  3036. if (sii8240->state == STATE_DISCONNECTED)
  3037. pr_cont(" (timeout)");
  3038. else if (sii8240->state == STATE_CBUS_UNSTABLE)
  3039. pr_cont(" (cbus unstable)");
  3040. else if (sii8240->state == STATE_NON_MHL_DETECTED)
  3041. pr_cont(" (Non-MHL device(USB?))");
  3042. pr_cont("\n");
  3043. power_down:
  3044. mutex_unlock(&sii8240->lock);
  3045. if (sii8240->mhl_event_switch.state == 1) {
  3046. pr_info("sii8240:MHL switch event sent : 0\n");
  3047. switch_set_state(&sii8240->mhl_event_switch, 0);
  3048. }
  3049. sii8240_power_down_process(sii8240);
  3050. return handled;
  3051. }
  3052. #ifdef CONFIG_EXTCON
  3053. static void sii8240_extcon_work(struct work_struct *work)
  3054. {
  3055. struct sec_mhl_cable *cable =
  3056. container_of(work, struct sec_mhl_cable, work);
  3057. sii8240_mhl_onoff(cable->cable_state);
  3058. }
  3059. static int sii8240_extcon_notifier(struct notifier_block *self,
  3060. unsigned long event, void *ptr)
  3061. {
  3062. struct sii8240_data *sii8240;
  3063. struct sec_mhl_cable *cable =
  3064. container_of(self, struct sec_mhl_cable, nb);
  3065. if (sii8240_mhldev == NULL) {
  3066. pr_info("%s: sii8240_mhldev is NULL\n", __func__);
  3067. return NOTIFY_DONE;
  3068. }
  3069. sii8240 = dev_get_drvdata(sii8240_mhldev);
  3070. pr_info("%s: '%s' is %s\n", extcon_cable_name[cable->cable_type],
  3071. __func__, event ? "attached" : "detached");
  3072. if (cable->cable_type == EXTCON_MHL) {
  3073. cable->cable_state = event;
  3074. sii8240->pdata->is_smartdock = false;
  3075. schedule_work(&cable->work);
  3076. } else if (cable->cable_type == EXTCON_MHL_VB) {
  3077. /*Here, just notify vbus status to mhl driver.*/
  3078. } else if (cable->cable_type == EXTCON_SMARTDOCK) {
  3079. cable->cable_state = event;
  3080. sii8240->pdata->is_smartdock = true;
  3081. schedule_work(&cable->work);
  3082. }
  3083. return NOTIFY_DONE;
  3084. }
  3085. #else
  3086. static int sii8240_detection_callback(struct notifier_block *this,
  3087. unsigned long event, void *ptr)
  3088. {
  3089. return sii8240_mhl_onoff(event);
  3090. }
  3091. #endif
  3092. static int sii8240_discovery_irq_handler(struct sii8240_data *sii8240, u8 intr)
  3093. {
  3094. u8 rgnd;
  3095. int ret = 0;
  3096. struct i2c_client *disc = sii8240->pdata->disc_client;
  3097. pr_info("sii8240_discovery_irq_handler : 0x%X\n", intr);
  3098. if (intr & RGND_RDY_INT) {
  3099. ret = mhl_read_byte_reg(disc, DISC_RGND_REG, &rgnd);
  3100. if (unlikely(ret < 0)) {
  3101. pr_err("[ERROR] sii8240: RGND read error: %d\n", ret);
  3102. return ret;
  3103. }
  3104. pr_info("DISC_RGND_REG = 0x%x\n", rgnd);
  3105. switch (rgnd & RGND_INTP_MASK) {
  3106. case RGND_INTP_OPEN:
  3107. pr_info("sii8240: RGND Open\n");
  3108. sii8240->rgnd = RGND_OPEN;
  3109. sii8240->state = STATE_MHL_USB_CONNECTED;
  3110. break;
  3111. case RGND_INTP_1K:
  3112. pr_info("sii8240: RGND 1K\n");
  3113. sii8240->rgnd = RGND_1K;
  3114. sii8240->state = STATE_MHL_CONNECTED;
  3115. break;
  3116. case RGND_INTP_2K:
  3117. pr_info("sii8240: RGND 2K\n");
  3118. sii8240->rgnd = RGND_2K;
  3119. break;
  3120. case RGND_INTP_SHORT:
  3121. pr_info("sii8240: RGND Short\n");
  3122. break;
  3123. };
  3124. } else if (intr & CBUS_UNSTABLE_INT) {
  3125. pr_err("[ERROR] sii8240: CBUS unstable\n");
  3126. sii8240->state = STATE_CBUS_UNSTABLE;
  3127. }
  3128. return ret;
  3129. }
  3130. static int sii8240_msc_irq_handler(struct sii8240_data *sii8240, u8 intr)
  3131. {
  3132. int ret;
  3133. u8 hpd;
  3134. u8 temp;
  3135. u8 cbus_intr[4], cbus_status[4];
  3136. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  3137. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  3138. struct cbus_data *data;
  3139. ret = mhl_read_block_reg(cbus, CBUS_MHL_STATUS_OFFSET_0, 4,
  3140. cbus_status);
  3141. if (unlikely(ret < 0)) {
  3142. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3143. __func__, __LINE__);
  3144. goto err_exit;
  3145. }
  3146. ret = mhl_read_block_reg(cbus, CBUS_MHL_INTR_REG_0, 4, cbus_intr);
  3147. if (unlikely(ret < 0)) {
  3148. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3149. __func__, __LINE__);
  3150. goto err_exit;
  3151. }
  3152. if (intr & MSC_CMD_DONE) {
  3153. pr_info("sii8240: MSC Command done.ACK Received (intr: 0x%02x)\n", intr);
  3154. complete(&sii8240->cbus_complete);
  3155. }
  3156. if (intr & MSC_HPD_RCVD) {
  3157. pr_info("sii8240: Downstream HPD Changed (intr: 0x%02x)\n", intr);
  3158. ret = mhl_read_byte_reg(cbus, CBUS_CONN_STATUS_REG, &hpd);
  3159. if (unlikely(ret < 0)) {
  3160. pr_err("[ERROR] %s() mhl_read_byte_reg : CBUS_CONN_STATUS_REG\n",
  3161. __func__);
  3162. goto err_exit;
  3163. }
  3164. ret = mhl_read_byte_reg(tmds, UPSTRM_HPD_CTRL_REG, &temp);
  3165. if (unlikely(ret < 0)) {
  3166. pr_err("[ERROR] %s() mhl_read_byte_reg : CBUS_CONN_STATUS_REG\n",
  3167. __func__);
  3168. goto err_exit;
  3169. }
  3170. if (DOWNSTREAM_HPD_MASK & hpd) {
  3171. pr_info("sii8240: SET_HPD received\n");
  3172. if (temp & HPD_OVERRIDE_EN) {
  3173. /* TODO:If HPD is overriden,//enable HPD_OUT bit
  3174. in upstream register */
  3175. if (sii8240->hpd_status && platform_hdmi_hpd_status()) {
  3176. pr_err("[ERROR] sii8240: hpd_status already true\n");
  3177. goto err_exit;
  3178. }
  3179. sii8240->hpd_status = true;
  3180. sii8240->avi_cmd = HPD_HIGH_EVENT;
  3181. sii8240->avi_work = true;
  3182. queue_work(sii8240->avi_cmd_wqs,
  3183. &sii8240->avi_control_work);
  3184. /*Initiate sii8240's information variables*/
  3185. memset(&sii8240->current_aviInfoFrame,
  3186. 0x00, INFO_BUFFER);
  3187. memset(&sii8240->output_avi_data,
  3188. 0x00, SIZE_AVI_INFOFRAME);
  3189. memset(&sii8240->vendorSpecificInfoFrame,
  3190. 0x00, INFO_BUFFER);
  3191. }
  3192. } else {
  3193. pr_info("sii8240: CLR_HPD received\n");
  3194. if (temp & HPD_OVERRIDE_EN) {
  3195. /* TODO:If HPD is overriden,clear HPD_OUT bit
  3196. upstream register */
  3197. if (sii8240->pdata->hdmi_mhl_ops) {
  3198. struct msm_hdmi_mhl_ops *hdmi_mhl_ops = sii8240->pdata->hdmi_mhl_ops;
  3199. hdmi_mhl_ops->set_upstream_hpd(sii8240->pdata->hdmi_pdev, 0);
  3200. }
  3201. sii8240->hpd_status = false;
  3202. sii8240->tmds_enable = false;
  3203. sii8240->ap_hdcp_success = false;
  3204. sii8240->cbus_ready = 0;
  3205. ret = mhl_modify_reg(tmds, UPSTRM_HPD_CTRL_REG,
  3206. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_MASK|
  3207. BIT_HPD_CTRL_HPD_OUT_OVR_EN_MASK,
  3208. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_OFF|
  3209. BIT_HPD_CTRL_HPD_OUT_OVR_EN_ON);
  3210. if (unlikely(ret < 0)) {
  3211. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3212. __func__, __LINE__);
  3213. goto err_exit;
  3214. }
  3215. /*Disable interrupt*/
  3216. sii8240->regs.intr_masks.intr7_mask_value = 0;
  3217. sii8240->regs.intr_masks.intr8_mask_value = 0;
  3218. ret = mhl_write_byte_reg(tmds, 0x7D,
  3219. sii8240->regs.intr_masks.intr7_mask_value);
  3220. if (unlikely(ret < 0)) {
  3221. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3222. __func__, __LINE__);
  3223. goto err_exit;
  3224. }
  3225. ret = mhl_write_byte_reg(tmds, 0x7E,
  3226. sii8240->regs.intr_masks.intr8_mask_value);
  3227. if (unlikely(ret < 0)) {
  3228. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3229. __func__, __LINE__);
  3230. goto err_exit;
  3231. }
  3232. ret = set_mute_mode(sii8240, true);
  3233. if (unlikely(ret < 0)) {
  3234. pr_err("[ERROR] %s() set_mute_mode fail %d\n",
  3235. __func__, __LINE__);
  3236. goto err_exit;
  3237. }
  3238. ret = tmds_control(sii8240, false);
  3239. if (unlikely(ret < 0)) {
  3240. pr_err("[ERROR] %s() tmds_control\n",
  3241. __func__);
  3242. goto err_exit;
  3243. }
  3244. }
  3245. if (sii8240->mhl_event_switch.state == 1) {
  3246. pr_info("sii8240: MHL switch event sent :0\n");
  3247. switch_set_state(&sii8240->mhl_event_switch, 0);
  3248. }
  3249. }
  3250. }
  3251. if (intr & MSC_WRITE_STAT_RCVD) {
  3252. bool path_en_changed = false;
  3253. pr_info("sii8240: WRITE_STAT received\n");
  3254. sii8240->cbus_ready = cbus_status[0] & MHL_STATUS_DCAP_READY;
  3255. if (sii8240->cbus_ready)
  3256. pr_info("sii8240: DCAP_READY intr\n");
  3257. if (!(sii8240->regs.link_mode & MHL_STATUS_PATH_ENABLED) &&
  3258. (MHL_STATUS_PATH_ENABLED & cbus_status[1])) {
  3259. /* PATH_EN{SOURCE} = 0 and PATH_EN{SINK}= 1 */
  3260. sii8240->regs.link_mode |= MHL_STATUS_PATH_ENABLED;
  3261. path_en_changed = true;
  3262. } else if ((sii8240->regs.link_mode & MHL_STATUS_PATH_ENABLED)
  3263. && !(MHL_STATUS_PATH_ENABLED & cbus_status[1])) {
  3264. /* PATH_EN{SOURCE} = 1 and PATH_EN{SINK}= 0 */
  3265. sii8240->regs.link_mode &= ~MHL_STATUS_PATH_ENABLED;
  3266. path_en_changed = true;
  3267. ret = tmds_control(sii8240, false);
  3268. if (unlikely(ret < 0)) {
  3269. pr_err("[ERROR] %s() tmds_control\n",
  3270. __func__);
  3271. goto err_exit;
  3272. }
  3273. }
  3274. if (path_en_changed)
  3275. sii8240_queue_cbus_cmd_locked(sii8240, WRITE_STAT,
  3276. CBUS_MHL_STATUS_OFFSET_1,
  3277. sii8240->regs.link_mode);
  3278. }
  3279. if (intr & MSC_MSG_RCVD) {
  3280. pr_info("sii8240: MSC_MSG received\n");
  3281. data = kzalloc(sizeof(struct cbus_data), GFP_KERNEL);
  3282. if (!data) {
  3283. pr_err("[ERROR] sii8240: failed to allocate cbus data\n");
  3284. ret = -ENOMEM;
  3285. goto err_exit;
  3286. }
  3287. data->cmd = MSC_MSG;
  3288. ret = mhl_read_byte_reg(cbus, MSC_MSG_RCVD_DATA1_REG, &data->offset);
  3289. if (unlikely(ret < 0)) {
  3290. pr_err("[ERROR] %s() mhl_read_byte_reg : MSC_MSG_RCVD_DATA1_REG\n",
  3291. __func__);
  3292. goto err_exit;
  3293. }
  3294. mhl_read_byte_reg(cbus, MSC_MSG_RCVD_DATA2_REG, &data->data);
  3295. if (unlikely(ret < 0)) {
  3296. pr_err("[ERROR] %s() mhl_read_byte_reg : MSC_MSG_RCVD_DATA2_REG\n",
  3297. __func__);
  3298. goto err_exit;
  3299. }
  3300. list_add_tail(&data->list, &sii8240->cbus_data_list);
  3301. queue_work(sii8240->cbus_cmd_wqs, &sii8240->cbus_work);
  3302. }
  3303. if (intr & MSC_WRITE_BURST_RCVD)
  3304. pr_info("sii8240: WRITE_BURST received\n");
  3305. if (intr & MSC_SET_INT_RCVD) {
  3306. pr_info("sii8240: SET_INT received\n");
  3307. if (cbus_intr[0] & MHL_INT_DCAP_CHG) {
  3308. pr_info("sii8240: device capability changed\n");
  3309. if (sii8240_queue_cbus_cmd_locked(sii8240, READ_DEVCAP,
  3310. MHL_DEVCAP_MHL_VERSION, 0) < 0)
  3311. pr_info("sii8240: MHL_VERSION read fail\n");
  3312. if (sii8240_queue_cbus_cmd_locked(sii8240, READ_DEVCAP,
  3313. MHL_DEVCAP_ADOPTER_ID_H, 0) < 0)
  3314. pr_info("sii8240: MHL_ADOPTER_ID_H read fail\n");
  3315. if (sii8240_queue_cbus_cmd_locked(sii8240, READ_DEVCAP,
  3316. MHL_DEVCAP_ADOPTER_ID_L, 0) < 0)
  3317. pr_info("sii8240: MHL_ADOPTER_ID_L read fail\n");
  3318. if (sii8240_queue_cbus_cmd_locked(sii8240, READ_DEVCAP,
  3319. MHL_DEVCAP_RESERVED, 0) < 0)
  3320. pr_info("sii8240: MHL_RESERVED read fail\n");
  3321. if (sii8240_queue_cbus_cmd_locked(sii8240, READ_DEVCAP,
  3322. MHL_DEVCAP_DEV_CAT, 0) < 0)
  3323. pr_info("sii8240: DEVCAP_DEV_CAT read fail\n");
  3324. if (sii8240_queue_cbus_cmd_locked(sii8240, READ_DEVCAP,
  3325. MHL_DEVCAP_FEATURE_FLAG, 0) < 0)
  3326. pr_info("sii8240: FEATURE_FLAG read fail\n");
  3327. if (sii8240_queue_cbus_cmd_locked(sii8240, READ_DEVCAP,
  3328. MHL_DEVCAP_VID_LINK_MODE, 0) < 0)
  3329. pr_info("sii8240: VID_LINK_MODE read fail\n");
  3330. }
  3331. if (cbus_intr[0] & MHL_INT_DSCR_CHG) {
  3332. pr_info("sii8240: scratchpad register change done\n");
  3333. ret = sii8240_get_write_burst(sii8240);
  3334. if (unlikely(ret < 0)) {
  3335. pr_err("[ERROR] %s() sii8240_get_write_burst\n", __func__);
  3336. goto err_exit;
  3337. }
  3338. }
  3339. if (cbus_intr[0] & MHL_INT_REQ_WRT) {
  3340. pr_info("sii8240: request-to-write received\n");
  3341. data = kzalloc(sizeof(struct cbus_data), GFP_KERNEL);
  3342. if (!data) {
  3343. pr_err("[ERROR] sii8240: failed to allocate cbus data\n");
  3344. ret = -ENOMEM;
  3345. goto err_exit;
  3346. }
  3347. data->cmd = SET_INT;
  3348. data->offset = CBUS_MHL_INTR_REG_0;
  3349. data->data = MHL_INT_GRT_WRT;
  3350. list_add_tail(&data->list, &sii8240->cbus_data_list);
  3351. queue_work(sii8240->cbus_cmd_wqs, &sii8240->cbus_work);
  3352. }
  3353. if (cbus_intr[0] & MHL_INT_GRT_WRT)
  3354. pr_info("sii8240: grant-to-write received\n");
  3355. if (cbus_intr[1] & MHL_INT_EDID_CHG) {
  3356. sii8240_toggle_hpd(cbus);
  3357. /*Initiate sii8240's information variables*/
  3358. sii8240->hpd_status = false;
  3359. memset(&sii8240->current_aviInfoFrame,
  3360. 0x00, INFO_BUFFER);
  3361. memset(&sii8240->output_avi_data,
  3362. 0x00, SIZE_AVI_INFOFRAME);
  3363. memset(&sii8240->vendorSpecificInfoFrame,
  3364. 0x00, INFO_BUFFER);
  3365. /*Disable interrupt*/
  3366. sii8240->regs.intr_masks.intr7_mask_value = 0;
  3367. sii8240->regs.intr_masks.intr8_mask_value = 0;
  3368. ret = mhl_write_byte_reg(tmds, 0x7D,
  3369. sii8240->regs.intr_masks.intr7_mask_value);
  3370. if (unlikely(ret < 0)) {
  3371. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3372. __func__, __LINE__);
  3373. goto err_exit;
  3374. }
  3375. ret = mhl_write_byte_reg(tmds, 0x7E,
  3376. sii8240->regs.intr_masks.intr8_mask_value);
  3377. if (unlikely(ret < 0)) {
  3378. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3379. __func__, __LINE__);
  3380. goto err_exit;
  3381. }
  3382. ret = set_mute_mode(sii8240, true);
  3383. if (unlikely(ret < 0)) {
  3384. pr_err("[ERROR] %s() set_mute_mode fail %d\n",
  3385. __func__, __LINE__);
  3386. goto err_exit;
  3387. }
  3388. ret = tmds_control(sii8240, false);
  3389. if (unlikely(ret < 0)) {
  3390. pr_err("[ERROR] %s() tmds_control\n",
  3391. __func__);
  3392. goto err_exit;
  3393. }
  3394. /*After HPD toggle, Need to setup again*/
  3395. sii8240->hpd_status = true;
  3396. sii8240->avi_cmd = HPD_HIGH_EVENT;
  3397. sii8240->avi_work = true;
  3398. queue_work(sii8240->avi_cmd_wqs,
  3399. &sii8240->avi_control_work);
  3400. /*Wake up avi control thread*/
  3401. }
  3402. }
  3403. if (intr & MSC_MSG_NACK_RCVD)
  3404. pr_info(KERN_ERR "NACK received\n");
  3405. err_exit:
  3406. return ret;
  3407. }
  3408. /*Need to check*/
  3409. static int sii8240_msc_error_irq_handler(struct sii8240_data *sii8240, u8 intr)
  3410. {
  3411. int ret = 0;
  3412. u8 error;
  3413. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  3414. if (intr == 0)
  3415. return ret;
  3416. if (intr & SEND_ERROR_INT) {
  3417. ret = mhl_read_byte_reg(cbus, MSC_SEND_ERROR_REG, &error);
  3418. if (unlikely(ret < 0)) {
  3419. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3420. __func__, __LINE__);
  3421. goto err_exit;
  3422. }
  3423. if (error & CMD_ABORT) {
  3424. pr_warn("[WARN] sii8240: [sender] Command Aborted\n");
  3425. sii8240->cbus_abort = true;
  3426. }
  3427. if (error & CMD_UNDEF_OPCODE)
  3428. pr_warn("[WARN] sii8240: [sender] Undefined Opcode\n");
  3429. if (error & CMD_TIMEOUT)
  3430. pr_warn("[WARN] sii8240: [sender] Timeout\n");
  3431. if (error & CMD_RCVD_PROT_ERR)
  3432. pr_warn("[WARN] sii8240: [sender] Protocol Error\n");
  3433. if (error & CMD_MAX_FAIL)
  3434. pr_warn("[WARN] sii8240:[sender]Failed MAX retries\n");
  3435. }
  3436. if (intr & RECD_ERROR_INT) {
  3437. ret = mhl_read_byte_reg(cbus, MSC_RECVD_ERROR_REG, &error);
  3438. if (unlikely(ret < 0)) {
  3439. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3440. __func__, __LINE__);
  3441. goto err_exit;
  3442. }
  3443. if (error & CMD_ABORT) {
  3444. pr_warn("[WARN] sii8240: [receiver] Command Aborted\n");
  3445. sii8240->cbus_abort = true;
  3446. }
  3447. if (error & CMD_UNDEF_OPCODE)
  3448. pr_warn("[WARN] sii8240: [receiver] Undefined Opcode\n");
  3449. if (error & CMD_TIMEOUT)
  3450. pr_warn("[WARN] sii8240: [reciever] Timeout\n");
  3451. if (error & CMD_RCVD_PROT_ERR)
  3452. pr_warn("[WARN]sii8240: [reciever] Protocol Error\n");
  3453. if (error & CMD_MAX_FAIL)
  3454. pr_warn("[WARN] sii8240:[reciever]Command Failed After MAX\n");
  3455. }
  3456. if (intr & RECD_DDC_ABORT_INT) {
  3457. /* TODO: We used to terminate connection after
  3458. * DDC_ABORT had been received.Need more details on how to
  3459. * handle this interrupt with MHL 1.2 specs. */
  3460. pr_warn("[WARN] sii8240: DDC_ABORT received\n");
  3461. }
  3462. err_exit:
  3463. return ret;
  3464. }
  3465. static int sii8240_rx_connected(struct sii8240_data *sii8240,
  3466. u8 int1, u8 cbus_con_st)
  3467. {
  3468. int ret = 0;
  3469. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  3470. struct i2c_client *disc = sii8240->pdata->disc_client;
  3471. struct cbus_data *cbus_cmd;
  3472. sii8240->cbus_connected = (cbus_con_st & 0x01);
  3473. if ((int1 & BIT_INTR4_MHL_EST) && (sii8240->cbus_connected)) {
  3474. sii8240->state = STATE_MHL_DISCOVERY_SUCCESS;
  3475. ret = mhl_hpd_control_low(sii8240);
  3476. if (unlikely(ret < 0))
  3477. pr_warn("[WARN]sii8240: %s():%d failed !\n",
  3478. __func__, __LINE__);
  3479. /*Must be set to 1.*/
  3480. ret = mhl_write_byte_reg(hdmi, MHLTX_TERM_CTRL_REG,
  3481. BIT_MHLTX_CTL1_DISC_OVRIDE_ON);
  3482. if (unlikely(ret < 0)) {
  3483. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3484. __func__, __LINE__);
  3485. return ret;
  3486. }
  3487. /*Enable discovery*/
  3488. pr_info("sii8240:Enable discovery\n");
  3489. ret = mhl_modify_reg(disc, 0x10, 0x01, 0x01);
  3490. if (unlikely(ret < 0)) {
  3491. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3492. __func__, __LINE__);
  3493. return ret;
  3494. }
  3495. memset(&sii8240->regs.intr_masks, 0,
  3496. sizeof(sii8240->regs.intr_masks));
  3497. sii8240->regs.intr_masks.intr1_mask_value =
  3498. BIT_INTR1_HPD_CHG;
  3499. sii8240->regs.intr_masks.intr4_mask_value =
  3500. (BIT_INTR4_CBUS_LKOUT | BIT_INTR4_CBUS_DISCONNECT);
  3501. sii8240->regs.intr_masks.intr_cbus0_mask_value =
  3502. (BIT_CBUS_MSC_MT_DONE |
  3503. BIT_CBUS_HPD_RCVD |
  3504. BIT_CBUS_MSC_MR_WRITE_STAT |
  3505. BIT_CBUS_MSC_MR_MSC_MSG |
  3506. BIT_CBUS_MSC_MR_WRITE_BURST |
  3507. BIT_CBUS_MSC_MR_SET_INT |
  3508. BIT_CBUS_MSC_MT_DONE_NACK);
  3509. sii8240->regs.intr_masks.intr_cbus1_mask_value =
  3510. (BIT_CBUS_DDC_ABRT | BIT_CBUS_CEC_ABRT | BIT_CBUS_CMD_ABORT);
  3511. ret = sii8240_set_interrupt(sii8240);
  3512. if (unlikely(ret < 0)) {
  3513. pr_err("[ERROR] %s() sii8240_set_interrupt\n", __func__);
  3514. return ret;
  3515. }
  3516. /*CBUS command*/
  3517. cbus_cmd = kzalloc(sizeof(struct cbus_data), GFP_KERNEL);
  3518. if (!cbus_cmd) {
  3519. pr_err("[ERROR] sii8240: failed to allocate cbus data\n");
  3520. return -ENOMEM;
  3521. }
  3522. cbus_cmd->cmd = WRITE_STAT;
  3523. cbus_cmd->offset = CBUS_MHL_STATUS_OFFSET_0;
  3524. cbus_cmd->data = MHL_STATUS_DCAP_READY;
  3525. list_add_tail(&cbus_cmd->list, &sii8240->cbus_data_list);
  3526. pr_debug("schedule_work: cbus_work\n");
  3527. queue_work(sii8240->cbus_cmd_wqs, &sii8240->cbus_work);
  3528. } else if (int1 & BIT_INTR4_NON_MHL_EST) {
  3529. pr_info("sii8240: discovery failed\n");
  3530. sii8240->state = STATE_MHL_DISCOVERY_FAIL;
  3531. } else if (sii8240->cbus_connected) {
  3532. sii8240->state = STATE_MHL_DISCOVERY_ON;
  3533. memset(&sii8240->regs.intr_masks, 0,
  3534. sizeof(sii8240->regs.intr_masks));
  3535. sii8240->regs.intr_masks.intr4_mask_value =
  3536. (BIT_INTR4_MHL_EST|BIT_INTR4_NON_MHL_EST);
  3537. sii8240->regs.intr_masks.intr_cbus1_mask_value =
  3538. (BIT_CBUS_DDC_ABRT | BIT_CBUS_CEC_ABRT |
  3539. BIT_CBUS_CMD_ABORT);
  3540. ret = sii8240_set_interrupt(sii8240);
  3541. if (unlikely(ret < 0)) {
  3542. pr_err("[ERROR] %s() sii8240_set_interrupt\n", __func__);
  3543. return ret;
  3544. }
  3545. }
  3546. return ret;
  3547. }
  3548. static int sii8240_cbus_irq(struct sii8240_data *sii8240)
  3549. {
  3550. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  3551. int ret;
  3552. u8 cbus_con_st = 0, msc_intr = 0,
  3553. msc_intr_en = 0, msc_err_intr = 0, msc_err_en = 0;
  3554. ret = mhl_read_byte_reg(cbus, CBUS_CONN_STATUS_REG, &cbus_con_st);
  3555. if (unlikely(ret < 0)) {
  3556. pr_err("[ERROR] sii8240: %s, %d\n", __func__, __LINE__);
  3557. return ret;
  3558. }
  3559. ret = mhl_read_byte_reg(cbus, CBUS_MSC_INTR_REG, &msc_intr);
  3560. if (unlikely(ret < 0)) {
  3561. pr_err("[ERROR] sii8240: %s, %d\n", __func__, __LINE__);
  3562. return ret;
  3563. }
  3564. ret = mhl_read_byte_reg(cbus, CBUS_MSC_INTR_ENABLE_REG, &msc_intr_en);
  3565. if (unlikely(ret < 0)) {
  3566. pr_err("[ERROR] sii8240: %s, %d\n", __func__, __LINE__);
  3567. return ret;
  3568. }
  3569. ret = mhl_read_byte_reg(cbus, CBUS_MSC_ERROR_INTR_REG, &msc_err_intr);
  3570. if (unlikely(ret < 0)) {
  3571. pr_err("[ERROR] sii8240: %s, %d\n", __func__, __LINE__);
  3572. return ret;
  3573. }
  3574. ret = mhl_read_byte_reg(cbus, CBUS_MSC_ERROR_INTR_ENABLE_REG,
  3575. &msc_err_en);
  3576. if (unlikely(ret < 0)) {
  3577. pr_err("[ERROR] sii8240: %s, %d\n", __func__, __LINE__);
  3578. return ret;
  3579. }
  3580. if (msc_err_intr) {
  3581. ret = mhl_write_byte_reg(cbus, CBUS_MSC_ERROR_INTR_REG, msc_err_intr);
  3582. if (unlikely(ret < 0)) {
  3583. pr_err("[ERROR] sii8240: %s, %d\n", __func__, __LINE__);
  3584. return ret;
  3585. }
  3586. }
  3587. if (msc_intr) {
  3588. ret = mhl_write_byte_reg(cbus, CBUS_MSC_INTR_REG, msc_intr);
  3589. if (unlikely(ret < 0)) {
  3590. pr_err("[ERROR] sii8240: %s, %d\n", __func__, __LINE__);
  3591. return ret;
  3592. }
  3593. }
  3594. /*Handling of Cbus error*/
  3595. ret = sii8240_msc_error_irq_handler(sii8240, msc_err_intr);
  3596. if (unlikely(ret < 0)) {
  3597. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  3598. __func__, __LINE__);
  3599. return ret;
  3600. }
  3601. ret = sii8240_msc_irq_handler(sii8240, msc_intr);
  3602. if (unlikely(ret < 0)) {
  3603. pr_err("[ERROR]sii8240: %s():%d failed !\n",
  3604. __func__, __LINE__);
  3605. return ret;
  3606. }
  3607. return ret;
  3608. }
  3609. #ifdef SFEATURE_UNSTABLE_SOURCE_WA
  3610. static void sii8240_avi_check_work(struct work_struct *work)
  3611. {
  3612. struct sii8240_data *sii8240 = container_of(work, struct sii8240_data,
  3613. avi_check_work);
  3614. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  3615. int ret;
  3616. u8 checksum = 0;
  3617. pr_info("Sii8240: AVIF getting problem??\n");
  3618. ret = sii8240_get_avi_info(sii8240);
  3619. if (unlikely(ret < 0)) {
  3620. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3621. __func__, __LINE__);
  3622. return;
  3623. }
  3624. if ((sii8240->aviInfoFrame[0] != 0x82) ||
  3625. (sii8240->aviInfoFrame[1] != 0x02) ||
  3626. (sii8240->aviInfoFrame[2] != 0x0D)) {
  3627. pr_info("Sii8240: NO AVIF.:%d\n", __LINE__);
  3628. ret = mhl_modify_reg(tpi, 0x1A,
  3629. TMDS_OUTPUT_CONTROL_MASK,
  3630. TMDS_OUTPUT_CONTROL_ACTIVE);
  3631. if (unlikely(ret < 0)) {
  3632. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3633. __func__, __LINE__);
  3634. return;
  3635. }
  3636. ret = mhl_modify_reg(tpi, 0x1A,
  3637. TMDS_OUTPUT_CONTROL_MASK,
  3638. TMDS_OUTPUT_CONTROL_POWER_DOWN);
  3639. if (unlikely(ret < 0)) {
  3640. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3641. __func__, __LINE__);
  3642. return;
  3643. }
  3644. return;
  3645. }
  3646. if (sii8240_check_avi_info(sii8240)) {
  3647. pr_info("sii8240: AVI change! %d\n", __LINE__);
  3648. checksum = sii8240_check_avi_info_checksum
  3649. (sii8240, sii8240->aviInfoFrame);
  3650. if (checksum) {
  3651. pr_err("[ERROR] sii8240: %s():%d checksum error!\n",
  3652. __func__, __LINE__);
  3653. return;
  3654. }
  3655. memcpy(&sii8240->current_aviInfoFrame,
  3656. &sii8240->aviInfoFrame, INFO_BUFFER);
  3657. pr_info("Sii8240: avi change and tmds off\n");
  3658. ret = tmds_control(sii8240, false);
  3659. if (unlikely(ret < 0)) {
  3660. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3661. __func__, __LINE__);
  3662. return;
  3663. }
  3664. sii8240->avi_cmd = CEA_NEW_AVI;
  3665. sii8240->avi_work = true;
  3666. queue_work(sii8240->avi_cmd_wqs,
  3667. &sii8240->avi_control_work);
  3668. } else
  3669. pr_info("sii8240: %s():%d NO AVI change!!\n",
  3670. __func__, __LINE__);
  3671. }
  3672. static void sii8240_avif_check_callback(unsigned long data)
  3673. {
  3674. struct sii8240_data *sii8240 = (struct sii8240_data *) data;
  3675. if (((sii8240->aviInfoFrame[0] == 0x82) &&
  3676. (sii8240->aviInfoFrame[1] == 0x02) &&
  3677. (sii8240->aviInfoFrame[2] == 0x0D)) ||
  3678. (sii8240->hdmi_sink == false)) {
  3679. pr_info("Sii8240: %s() return AVIF callback\n", __func__);
  3680. } else
  3681. queue_work(sii8240->avi_cmd_wqs, &sii8240->avi_check_work);
  3682. }
  3683. static int sii8240_check_ckdt_change(struct sii8240_data *sii8240)
  3684. {
  3685. int ret = 0;
  3686. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  3687. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  3688. if (sii8240->r281 == 0) {
  3689. pr_info("Sii8240: %s():%d (r281 == 0)\n", __func__, __LINE__);
  3690. ret = mhl_read_byte_reg(hdmi, 0x81, &sii8240->r281);
  3691. if (unlikely(ret < 0)) {
  3692. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3693. __func__, __LINE__);
  3694. return ret;
  3695. }
  3696. }
  3697. pr_info("Sii8240: %s():%d r281 data: %02x\n",
  3698. __func__, __LINE__, sii8240->r281);
  3699. ret = mhl_write_byte_reg(hdmi, 0x81, (sii8240->r281 & (~0x3F)));
  3700. if (unlikely(ret < 0)) {
  3701. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3702. __func__, __LINE__);
  3703. return ret;
  3704. }
  3705. if (sii8240->r281 & 0x3F) {
  3706. /* there is default value...*/
  3707. pr_info("Sii8240: there is default value.\n");
  3708. } else {
  3709. sii8240->r281 = 0xFF;
  3710. pr_info("Sii8240: there is non default value.\n");
  3711. }
  3712. ret = mhl_modify_reg(tmds, 0x80, BIT_TMDS_CCTRL_TMDS_OE,
  3713. BIT_TMDS_CCTRL_TMDS_OE);
  3714. if (unlikely(ret < 0)) {
  3715. pr_err("[ERROR] sii8240: %s():%d failed !\n",
  3716. __func__, __LINE__);
  3717. return ret;
  3718. }
  3719. return ret;
  3720. }
  3721. static int sii8240_check_scdt_reg(struct sii8240_data *sii8240)
  3722. {
  3723. int ret = 0;
  3724. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  3725. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  3726. if (sii8240->r281 != 0) {
  3727. pr_info("Sii8240: r281 == 0x%02x\n", sii8240->r281);
  3728. ret = mhl_modify_reg(tmds, 0x80, BIT_TMDS_CCTRL_TMDS_OE, 0x0);
  3729. if (unlikely(ret < 0)) {
  3730. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3731. __func__, __LINE__);
  3732. return ret;
  3733. }
  3734. if (sii8240->r281 == 0xFF)
  3735. sii8240->r281 = 0;
  3736. ret = mhl_write_byte_reg(hdmi, 0x81, sii8240->r281);
  3737. if (unlikely(ret < 0)) {
  3738. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3739. __func__, __LINE__);
  3740. return ret;
  3741. }
  3742. sii8240->r281 = 0;
  3743. }
  3744. mod_timer(&sii8240->avi_check_timer, jiffies + msecs_to_jiffies(200));
  3745. return ret;
  3746. }
  3747. #endif
  3748. static int sii8240_audio_video_intr_control(struct sii8240_data *sii8240)
  3749. {
  3750. int ret;
  3751. u8 upstatus, ceainfo;
  3752. u8 checksum = 0;
  3753. #ifdef SFEATURE_HDCP_SUPPORT
  3754. u8 value;
  3755. struct i2c_client *tpi = sii8240->pdata->tpi_client;
  3756. #endif
  3757. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  3758. pr_info("sii8240_audio_video_intr_control\n");
  3759. #ifdef SFEATURE_HDCP_SUPPORT
  3760. /*TO do*/
  3761. ret = mhl_read_byte_reg(tpi, HDCP_INTR , &value);
  3762. if (unlikely(ret < 0)) {
  3763. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3764. __func__, __LINE__);
  3765. return ret;
  3766. }
  3767. ret = mhl_write_byte_reg(tpi, HDCP_INTR , value);
  3768. if (unlikely(ret < 0)) {
  3769. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3770. __func__, __LINE__);
  3771. return ret;
  3772. }
  3773. if (value && sii8240->hpd_status && sii8240->tmds_enable) {
  3774. ret = sii8240_hdcp_control(sii8240, value);
  3775. if (unlikely(ret < 0)) {
  3776. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3777. __func__, __LINE__);
  3778. return ret;
  3779. }
  3780. }
  3781. #endif
  3782. ret = mhl_read_byte_reg(tmds, US_INTR, &upstatus);
  3783. if (unlikely(ret < 0)) {
  3784. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3785. __func__, __LINE__);
  3786. return ret;
  3787. }
  3788. ret = mhl_read_byte_reg(tmds, 0x7C, &ceainfo);
  3789. if (unlikely(ret < 0)) {
  3790. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3791. __func__, __LINE__);
  3792. return ret;
  3793. }
  3794. if (upstatus) {
  3795. ret = mhl_write_byte_reg(tmds, US_INTR, upstatus);
  3796. if (unlikely(ret < 0)) {
  3797. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3798. __func__, __LINE__);
  3799. return ret;
  3800. }
  3801. }
  3802. if (ceainfo) {
  3803. ret = mhl_write_byte_reg(tmds, 0x7C, ceainfo);
  3804. if (unlikely(ret < 0)) {
  3805. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3806. __func__, __LINE__);
  3807. return ret;
  3808. }
  3809. }
  3810. if ((sii8240->regs.intr_masks.intr7_mask_value & BIT_INTR7_CEA_NO_AVI)
  3811. && (upstatus & BIT_INTR7_CEA_NO_AVI))
  3812. pr_info("sii8240: NO_AVI_INFORMATION\n");
  3813. if (upstatus & BIT_INTR7_CEA_NO_VSI) {
  3814. pr_info("sii8240: BIT_INTR7_CEA_NO_VSI\n");
  3815. #ifdef MHL_2X_3D
  3816. sii8240->input_3d_format = NON_3D_VIDEO;
  3817. ret = mhl_modify_reg(tmds, 0x51, BIT_VID_OVRRD_3DCONV_EN_MASK,
  3818. BIT_VID_OVRRD_3DCONV_EN_NORMAL);
  3819. if (unlikely(ret < 0)) {
  3820. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3821. __func__, __LINE__);
  3822. return ret;
  3823. }
  3824. #endif
  3825. }
  3826. if (upstatus & BIT_INTR7_CP_NEW_CP)
  3827. pr_info("sii8240: BIT_INTR7_CP_NEW_CP\n");
  3828. if (upstatus & BIT_INTR7_CP_SET_MUTE) {
  3829. pr_info("sii8240: BIT_INTR7_CP_SET_MUTE\n");
  3830. ret = set_mute_mode(sii8240, true);
  3831. if (unlikely(ret < 0)) {
  3832. pr_err("[ERROR] sii8240: get avi info error\n");
  3833. return ret;
  3834. }
  3835. }
  3836. if (upstatus & BIT_INTR7_CP_CLR_MUTE) {
  3837. pr_info("sii8240: BIT_INTR7_CP_CLR_MUTE\n");
  3838. ret = set_mute_mode(sii8240, false);
  3839. if (unlikely(ret < 0)) {
  3840. pr_err("[ERROR] sii8240: get avi info error\n");
  3841. return ret;
  3842. }
  3843. }
  3844. #ifdef MHL_2X_3D
  3845. /*VSI 3D*/
  3846. if ((ceainfo & BIT_INTR8_CEA_NEW_VSI) &&
  3847. (sii8240->hpd_status == true)) {
  3848. ret = sii8240_get_vsi_info(sii8240);
  3849. if (ret) {
  3850. pr_err("[ERROR] sii8240: %s():%d sii8240_get_vsi_info\n",
  3851. __func__, __LINE__);
  3852. return ret;
  3853. }
  3854. ret = sii8240_check_avi_info_checksum(sii8240,
  3855. sii8240->vendorSpecificInfoFrame);
  3856. if (ret) {
  3857. pr_err("[ERROR] vendor specific checksum failing\n");
  3858. return ret;
  3859. }
  3860. print_hex_dump(KERN_ERR, "vsi = ",
  3861. DUMP_PREFIX_NONE, 16, 1,
  3862. sii8240->vendorSpecificInfoFrame, 16, false);
  3863. if ((sii8240->vendorSpecificInfoFrame[7] & 0xE0) == 0x40) {
  3864. if ((sii8240->vendorSpecificInfoFrame[8]
  3865. & 0xF0) == 0x00) {
  3866. /*frame packing 3D*/
  3867. pr_info("sii8240: frame packing 3D\n");
  3868. sii8240->input_3d_format = FRAME_PACKING_3D;
  3869. ret = mhl_modify_reg(tmds, 0x51,
  3870. BIT_VID_OVRRD_3DCONV_EN_MASK,
  3871. BIT_VID_OVRRD_3DCONV_EN_FRAME_PACK);
  3872. if (unlikely(ret < 0)) {
  3873. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3874. __func__, __LINE__);
  3875. return ret;
  3876. }
  3877. } else {
  3878. /*non frame packing 3D*/
  3879. pr_info("sii8240:non frame packing 3D\n");
  3880. sii8240->input_3d_format = NON_FRAME_PACKING_3D;
  3881. ret = mhl_modify_reg(tmds, 0x51,
  3882. BIT_VID_OVRRD_3DCONV_EN_MASK,
  3883. BIT_VID_OVRRD_3DCONV_EN_NORMAL);
  3884. }
  3885. if (unlikely(ret < 0)) {
  3886. pr_err("[ERROR] sii8240: %s():%d failed\n",
  3887. __func__, __LINE__);
  3888. return ret;
  3889. }
  3890. }
  3891. }
  3892. #endif
  3893. /*AVI InfoFrame*/
  3894. if ((ceainfo & BIT_INTR8_CEA_NEW_AVI) &&
  3895. (sii8240->hpd_status == true)) {
  3896. pr_info("sii8240 : BIT_INTR8_CEA_NEW_AVI\n");
  3897. ret = sii8240_get_avi_info(sii8240);
  3898. if (unlikely(ret < 0)) {
  3899. pr_info("sii8240 : get avi info error\n");
  3900. return ret;
  3901. }
  3902. if (sii8240_check_avi_info(sii8240)) {
  3903. pr_info("sii8240: %s():%d AVI change!\n",
  3904. __func__, __LINE__);
  3905. checksum = sii8240_check_avi_info_checksum
  3906. (sii8240, sii8240->aviInfoFrame);
  3907. if (checksum) {
  3908. pr_info("sii8240: %s():%d checksum error\n",
  3909. __func__, __LINE__);
  3910. return -EINVAL;
  3911. }
  3912. memcpy(&sii8240->current_aviInfoFrame,
  3913. &sii8240->aviInfoFrame, INFO_BUFFER);
  3914. tmds_control(sii8240, false);
  3915. sii8240->avi_cmd = CEA_NEW_AVI;
  3916. sii8240->avi_work = true;
  3917. queue_work(sii8240->avi_cmd_wqs, &sii8240->avi_control_work);
  3918. } else
  3919. pr_info("sii8240: no AVIF\n");
  3920. }
  3921. return 0;
  3922. }
  3923. static irqreturn_t sii8240_irq_thread(int irq, void *data)
  3924. {
  3925. struct sii8240_data *sii8240 = data;
  3926. struct i2c_client *disc = sii8240->pdata->disc_client;
  3927. struct i2c_client *cbus = sii8240->pdata->cbus_client;
  3928. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  3929. struct i2c_client *hdmi = sii8240->pdata->hdmi_client;
  3930. u8 intr1 = 0, intr1_en, int1_status, int2_status, cbus_con_st;
  3931. u8 value;
  3932. u8 cbus1, cbus2, cbus3, cbus4;
  3933. int ret;
  3934. bool clock_stable = false;
  3935. mutex_lock(&sii8240->lock);
  3936. if (sii8240->state == STATE_DISCONNECTED) {
  3937. pr_info("sii8240: mhl is disconnected, so return irq\n");
  3938. mutex_unlock(&sii8240->lock);
  3939. return IRQ_HANDLED;
  3940. }
  3941. ret = mhl_read_byte_reg(disc, DISC_INTR_REG, &intr1);
  3942. if (unlikely(ret < 0)) {
  3943. pr_err("[ERROR] %s() mhl_read_byte_reg : DISC_INTR_REG\n", __func__);
  3944. goto err_exit2;
  3945. }
  3946. ret = mhl_read_byte_reg(disc, DISC_INTR_ENABLE_REG, &intr1_en);
  3947. if (unlikely(ret < 0)) {
  3948. pr_err("[ERROR] %s() mhl_read_byte_reg : DISC_INTR_ENABLE_REG\n", __func__);
  3949. goto err_exit2;
  3950. }
  3951. ret = mhl_read_byte_reg(cbus, CBUS_CONN_STATUS_REG, &cbus_con_st);
  3952. if (unlikely(ret < 0)) {
  3953. pr_err("[ERROR] %s() mhl_read_byte_reg : CBUS_CONN_STATUS_REG\n", __func__);
  3954. goto err_exit2;
  3955. }
  3956. ret = mhl_read_byte_reg(tmds, 0x71, &int1_status);
  3957. if (unlikely(ret < 0)) {
  3958. pr_err("[ERROR] %s() mhl_read_byte_reg : 0x71\n", __func__);
  3959. goto err_exit2;
  3960. }
  3961. ret = mhl_read_byte_reg(tmds, 0x74, &int2_status);
  3962. if (unlikely(ret < 0)) {
  3963. pr_err("[ERROR] %s() mhl_read_byte_reg : 0x74\n", __func__);
  3964. goto err_exit2;
  3965. }
  3966. /*Cbus link interrupt*/
  3967. ret = mhl_read_byte_reg(cbus, 0x20, &cbus1);
  3968. if (unlikely(ret < 0)) {
  3969. pr_err("[ERROR] %s() mhl_read_byte_reg : 0x20\n", __func__);
  3970. goto err_exit2;
  3971. }
  3972. ret = mhl_read_byte_reg(cbus, 0x21, &cbus2);
  3973. if (unlikely(ret < 0)) {
  3974. pr_err("[ERROR] %s() mhl_read_byte_reg : 0x21\n", __func__);
  3975. goto err_exit2;
  3976. }
  3977. ret = mhl_read_byte_reg(cbus, 0x22, &cbus3);
  3978. if (unlikely(ret < 0)) {
  3979. pr_err("[ERROR] %s() mhl_read_byte_reg : 0x22\n", __func__);
  3980. goto err_exit2;
  3981. }
  3982. ret = mhl_read_byte_reg(cbus, 0x23, &cbus4);
  3983. if (unlikely(ret < 0)) {
  3984. pr_err("[ERROR] %s() mhl_read_byte_reg : 0x23\n", __func__);
  3985. goto err_exit2;
  3986. }
  3987. switch (sii8240->state) {
  3988. case STATE_MHL_READY_RGND_DETECT:
  3989. pr_info(KERN_INFO "sii8240:MHL_READY_RGND_DETECT\n");
  3990. /* interrupts related to discovery & connection */
  3991. if (intr1) {
  3992. pr_info("sii8240: discovery irq %02x/%02x\n",
  3993. intr1, intr1_en);
  3994. ret = sii8240_discovery_irq_handler(sii8240, intr1);
  3995. if (unlikely(ret < 0)) {
  3996. pr_err("[ERROR] %s() sii8240_discovery_irq_handler\n", __func__);
  3997. goto err_exit;
  3998. }
  3999. }
  4000. if (sii8240->state == STATE_MHL_CONNECTED) {
  4001. if (sii8240->pdata->charger_mhl_cb)
  4002. sii8240->pdata->charger_mhl_cb(true, 0x03);
  4003. ret = sii8240_init_regs(sii8240);
  4004. if (unlikely(ret < 0)) {
  4005. pr_err("[ERROR] %s() sii8240_init_regs\n", __func__);
  4006. goto err_exit;
  4007. }
  4008. memset(&sii8240->regs.intr_masks,
  4009. 0x0, sizeof(sii8240->regs.intr_masks));
  4010. sii8240->regs.intr_masks.intr4_mask_value =
  4011. (BIT_INTR4_MHL_EST|BIT_INTR4_NON_MHL_EST);
  4012. ret = sii8240_set_interrupt(sii8240);
  4013. if (unlikely(ret < 0)) {
  4014. pr_err("[ERROR] %s() sii8240_set_interrupt\n", __func__);
  4015. goto err_exit;
  4016. }
  4017. } else if (intr1 & (RGND_RDY_INT | CBUS_UNSTABLE_INT)) {
  4018. pr_info("sii8240: rgnd 1k not detected\n");
  4019. if (sii8240->irq_enabled) {
  4020. disable_irq_nosync(sii8240->irq);
  4021. sii8240->irq_enabled = false;
  4022. pr_info("sii8240: interrupt disabled\n");
  4023. }
  4024. /* If there is VBUS, charging start */
  4025. if (sii8240->pdata->vbus_present)
  4026. if (sii8240->pdata->vbus_present()) {
  4027. if (sii8240->pdata->charger_mhl_cb)
  4028. sii8240->pdata->charger_mhl_cb(false, 0x03);
  4029. }
  4030. queue_work(sii8240->mhl_detection_workqueue,
  4031. &sii8240->redetect_work);
  4032. }
  4033. break;
  4034. case STATE_MHL_CONNECTED:
  4035. pr_info("sii8240:MHL_RX_CONNECTED\n");
  4036. ret = sii8240_rx_connected(sii8240, intr1, cbus_con_st);
  4037. if (unlikely(ret < 0)) {
  4038. pr_err("[ERROR] %s() sii8240_rx_connected\n", __func__);
  4039. goto err_exit;
  4040. }
  4041. if (sii8240->state == STATE_MHL_DISCOVERY_FAIL) {
  4042. /*changing of status information*/
  4043. if (sii8240->irq_enabled) {
  4044. disable_irq_nosync(sii8240->irq);
  4045. sii8240->irq_enabled = false;
  4046. pr_info("sii8240: interrupt disabled\n");
  4047. }
  4048. /* CTS 3.3.5.2 */
  4049. /* OTG should turn off when discovery fail */
  4050. if(sii8240->pdata->charging_type== POWER_SUPPLY_TYPE_OTG)
  4051. if (sii8240->pdata->charger_mhl_cb)
  4052. sii8240->pdata->charger_mhl_cb(false, -1);
  4053. queue_work(sii8240->mhl_detection_workqueue,
  4054. &sii8240->redetect_work);
  4055. }
  4056. break;
  4057. case STATE_MHL_DISCOVERY_SUCCESS:
  4058. pr_debug(KERN_INFO "sii8240:MHL_DISCOVERY_SUCCESS\n");
  4059. /*checking of cbus locking out*/
  4060. if (intr1 & BIT_INTR4_CBUS_LKOUT) {
  4061. force_usb_id_switch_open(sii8240);
  4062. release_usb_id_switch_open(sii8240);
  4063. break;
  4064. }
  4065. /*checking of cbus disconnection*/
  4066. if (intr1 & BIT_INTR4_CBUS_DISCONNECT) {
  4067. pr_info("sii8240 : cbus_disconnected\n");
  4068. /* CTS 3.3.22.3 */
  4069. /* If cbus disconnected, OTG should also be stoped */
  4070. if(sii8240->pdata->charging_type== POWER_SUPPLY_TYPE_OTG)
  4071. if (sii8240->pdata->charger_mhl_cb)
  4072. sii8240->pdata->charger_mhl_cb(false, -1);
  4073. ret = mhl_write_byte_reg(hdmi, 0x80, 0xD0);
  4074. if (unlikely(ret < 0)) {
  4075. pr_err("[ERROR] sii8240: %s():%d failed\n",
  4076. __func__, __LINE__);
  4077. goto err_exit;
  4078. }
  4079. pr_info("sii8240: CBUS DISCONNECTED !!\n");
  4080. if (sii8240->irq_enabled) {
  4081. disable_irq_nosync(sii8240->irq);
  4082. sii8240->irq_enabled = false;
  4083. pr_info("sii8240: interrupt disabled\n");
  4084. }
  4085. queue_work(sii8240->mhl_detection_workqueue,
  4086. &sii8240->redetect_work);
  4087. break;
  4088. }
  4089. if (int2_status == 0x00) {
  4090. sii8240->regs.intr_masks.intr1_mask_value =
  4091. (BIT_INTR1_HPD_CHG);
  4092. ret = mhl_write_byte_reg(tmds, 0x75,
  4093. sii8240->regs.intr_masks.intr1_mask_value);
  4094. if (unlikely(ret < 0)) {
  4095. pr_err("[ERROR] sii8240: %s():%d failed\n",
  4096. __func__, __LINE__);
  4097. goto err_exit;
  4098. }
  4099. }
  4100. /*checking HPD event high/low*/
  4101. if (int1_status & BIT_INTR1_HPD_CHG) {
  4102. ret = mhl_read_byte_reg
  4103. (tmds, MHL_TX_SYSSTAT_REG, &value);
  4104. if (unlikely(ret < 0)) {
  4105. pr_err("[ERROR] sii8240: %s():%d failed\n",
  4106. __func__, __LINE__);
  4107. goto err_exit;
  4108. }
  4109. memset(&sii8240->current_aviInfoFrame,
  4110. 0x00, INFO_BUFFER);
  4111. memset(&sii8240->output_avi_data,
  4112. 0x00, SIZE_AVI_INFOFRAME);
  4113. #ifdef MHL_2X_3D
  4114. memset(&sii8240->vendorSpecificInfoFrame,
  4115. 0x00, INFO_BUFFER);
  4116. sii8240->input_3d_format = NON_3D_VIDEO;
  4117. ret = mhl_modify_reg(tmds, 0x51,
  4118. BIT_VID_OVRRD_3DCONV_EN_MASK,
  4119. BIT_VID_OVRRD_3DCONV_EN_NORMAL);
  4120. if (unlikely(ret < 0)) {
  4121. pr_err("[ERROR] sii8240: %s():%d failed\n",
  4122. __func__, __LINE__);
  4123. goto err_exit;
  4124. }
  4125. #endif
  4126. if (value & 0x02) {
  4127. pr_info("HPD event high\n");
  4128. if (sii8240->hpd_status == false) {
  4129. sii8240->hpd_status = true;
  4130. sii8240->avi_cmd = HPD_HIGH_EVENT;
  4131. sii8240->avi_work = true;
  4132. queue_work(sii8240->avi_cmd_wqs,
  4133. &sii8240->avi_control_work);
  4134. }
  4135. } else {
  4136. pr_info("Sii8240:HPD event low\n");
  4137. if (sii8240->hpd_status) {
  4138. if (sii8240->pdata->hdmi_mhl_ops) {
  4139. struct msm_hdmi_mhl_ops *hdmi_mhl_ops = sii8240->pdata->hdmi_mhl_ops;
  4140. hdmi_mhl_ops->set_upstream_hpd(sii8240->pdata->hdmi_pdev, 0);
  4141. }
  4142. sii8240->hpd_status = false;
  4143. tmds_control(sii8240, false);
  4144. ret = mhl_modify_reg(tmds,
  4145. UPSTRM_HPD_CTRL_REG,
  4146. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_MASK |
  4147. BIT_HPD_CTRL_HPD_OUT_OVR_EN_MASK,
  4148. BIT_HPD_CTRL_HPD_OUT_OVR_VAL_OFF |
  4149. BIT_HPD_CTRL_HPD_OUT_OVR_EN_ON);
  4150. if (unlikely(ret < 0)) {
  4151. pr_err("[ERROR] sii8240: %s():%d failed\n",
  4152. __func__, __LINE__);
  4153. goto err_exit;
  4154. }
  4155. sii8240->regs.intr_masks.intr5_mask_value = 0x00;
  4156. ret = mhl_write_byte_reg(tmds, 0x78, 0x00);
  4157. if (unlikely(ret < 0)) {
  4158. pr_err("[ERROR] sii8240: %s():%d failed\n",
  4159. __func__, __LINE__);
  4160. goto err_exit;
  4161. }
  4162. ret = mhl_modify_reg(hdmi, 0xA1,
  4163. BIT_REG_RX_HDMI_CTRL0_hdmi_mode_overwrite_MASK,
  4164. BIT_REG_RX_HDMI_CTRL0_hdmi_mode_overwrite_HW_CTRL);
  4165. if (unlikely(ret < 0)) {
  4166. pr_err("[ERROR] sii8240: %s():%d failed\n",
  4167. __func__, __LINE__);
  4168. goto err_exit;
  4169. }
  4170. }
  4171. }
  4172. }
  4173. /*Upstream TMDS interrupt register*/
  4174. if (int2_status & BIT_INTR5_CKDT_CHANGE) {
  4175. pr_info("sii8240: CKDT:"\
  4176. "Upstream TMDS interrupt register\n");
  4177. #ifdef SFEATURE_UNSTABLE_SOURCE_WA
  4178. if (sii8240->hdmi_sink)
  4179. sii8240_check_ckdt_change(sii8240);
  4180. #endif
  4181. ret = mhl_read_byte_reg(hdmi, 0xA0, &value);
  4182. if (unlikely(ret < 0)) {
  4183. pr_err("[ERROR] %s() mhl_read_byte_reg : 0xA0\n", __func__);
  4184. goto err_exit;
  4185. }
  4186. if (value & BIT_TMDS_CSTAT_P3_PDO_MASK) {
  4187. pr_info("sii8240: CKDT: stable\n");
  4188. #ifdef SII8240_CHECK_MONITOR
  4189. sii8240->ckdt_stable = true;
  4190. #endif
  4191. } else {
  4192. pr_info("sii8240: CKDT: not stable\n");
  4193. #ifdef SII8240_CHECK_MONITOR
  4194. sii8240->ckdt_stable = false;
  4195. #endif
  4196. }
  4197. clock_stable = true;
  4198. }
  4199. if (int2_status & BIT_INTR5_SCDT_CHANGE) {
  4200. pr_info("sii8240: BIT_INTR5_SCDT_CHANGE\n");
  4201. ret = mhl_read_byte_reg(hdmi, 0xA0, &value);
  4202. if (unlikely(ret < 0)) {
  4203. pr_err("[ERROR] %s() mhl_read_byte_reg : 0xA0\n", __func__);
  4204. goto err_exit;
  4205. }
  4206. if (BIT_TMDS_CSTAT_P3_SCDT & value) {
  4207. pr_info("BIT_TMDS_CSTAT_P3_SCDT\n");
  4208. memset(&sii8240->aviInfoFrame,
  4209. 0x00, INFO_BUFFER);
  4210. #ifdef SFEATURE_UNSTABLE_SOURCE_WA
  4211. if (sii8240->hdmi_sink)
  4212. sii8240_check_scdt_reg(sii8240);
  4213. #endif
  4214. } else
  4215. pr_info("disable_encryption\n");
  4216. }
  4217. if (int2_status & BIT_INTR5_RPWR5V_CHG) {
  4218. pr_info("sii8240: BIT_INTR5_RPWR5V_CHG\n");
  4219. ret = mhl_read_byte_reg(tmds, 0x81, &value);
  4220. if (unlikely(ret < 0)) {
  4221. pr_err("[ERROR] %s() mhl_read_byte_reg : 0x81\n", __func__);
  4222. goto err_exit;
  4223. }
  4224. if (value & BIT_TMDS_CSTAT_RPWR5V_STATUS)
  4225. pr_info("sii8240: TMDS_CSTAT_RPWR5V_STATUS\n");
  4226. }
  4227. ret = sii8240_cbus_irq(sii8240);
  4228. if (unlikely(ret < 0)) {
  4229. pr_err("[ERROR] sii8240_cbus_irq failed\n");
  4230. goto err_exit;
  4231. }
  4232. ret = sii8240_audio_video_intr_control(sii8240);
  4233. if (unlikely(ret < 0)) {
  4234. pr_err("[ERROR] audio_video_intr_control failed\n");
  4235. goto err_exit;
  4236. }
  4237. break;
  4238. default:
  4239. break;
  4240. }
  4241. err_exit:
  4242. /* Clear interrupts */
  4243. ret = mhl_write_byte_reg(disc, DISC_INTR_REG, intr1);
  4244. if (unlikely(ret < 0)) {
  4245. pr_err("[ERROR] %s() mhl_write_byte_reg : DISC_INTR_REG\n", __func__);
  4246. goto err_exit2;
  4247. }
  4248. ret = mhl_write_byte_reg(tmds, 0x71, int1_status);
  4249. if (unlikely(ret < 0)) {
  4250. pr_err("[ERROR] %s() mhl_write_byte_reg : 0x71\n", __func__);
  4251. goto err_exit2;
  4252. }
  4253. ret = mhl_write_byte_reg(tmds, 0x74, int2_status);
  4254. if (unlikely(ret < 0)) {
  4255. pr_err("[ERROR] %s() mhl_write_byte_reg : 0x74\n", __func__);
  4256. goto err_exit2;
  4257. }
  4258. ret = mhl_write_byte_reg(cbus, 0x20, cbus1);
  4259. if (unlikely(ret < 0)) {
  4260. pr_err("[ERROR] %s() mhl_write_byte_reg : 0x20\n", __func__);
  4261. goto err_exit2;
  4262. }
  4263. ret = mhl_write_byte_reg(cbus, 0x21, cbus2);
  4264. if (unlikely(ret < 0)) {
  4265. pr_err("[ERROR] %s() mhl_write_byte_reg : 0x21\n", __func__);
  4266. goto err_exit2;
  4267. }
  4268. ret = mhl_write_byte_reg(cbus, 0x22, cbus3);
  4269. if (unlikely(ret < 0)) {
  4270. pr_err("[ERROR] %s() mhl_write_byte_reg : 0x22\n", __func__);
  4271. goto err_exit2;
  4272. }
  4273. ret = mhl_write_byte_reg(cbus, 0x23, cbus4);
  4274. if (unlikely(ret < 0)) {
  4275. pr_err("[ERROR] %s() mhl_write_byte_reg : 0x23\n", __func__);
  4276. goto err_exit2;
  4277. }
  4278. err_exit2:
  4279. mutex_unlock(&sii8240->lock);
  4280. wake_up(&sii8240->wq);
  4281. pr_info("sii8240: IRQ_HANDLED\n");
  4282. return IRQ_HANDLED;
  4283. }
  4284. static int sii8240_mhl_tx_suspend(struct device *dev)
  4285. {
  4286. struct sii8240_data *sii8240 = dev_get_drvdata(dev);
  4287. if (sii8240 != NULL) {
  4288. pr_info("%s()\n", __func__);
  4289. /*set config_gpio for mhl*/
  4290. if (likely(sii8240->pdata->gpio_cfg))
  4291. sii8240->pdata->gpio_cfg(MHL_SUSPEND_STATE);
  4292. else
  4293. pr_err("[ERROR] %s() gpio_cfg is NULL\n", __func__);
  4294. }
  4295. return 0;
  4296. }
  4297. static int sii8240_mhl_tx_resume(struct device *dev)
  4298. {
  4299. struct sii8240_data *sii8240 = dev_get_drvdata(dev);
  4300. if (sii8240 != NULL) {
  4301. pr_info("%s()\n", __func__);
  4302. /*set config_gpio for mhl*/
  4303. if (likely(sii8240->pdata->gpio_cfg))
  4304. sii8240->pdata->gpio_cfg(MHL_RESUME_STATE);
  4305. else
  4306. pr_err("[ERROR] %s() gpio_cfg is NULL\n", __func__);
  4307. }
  4308. return 0;
  4309. }
  4310. static const struct dev_pm_ops sii8240_pm_ops = {
  4311. .suspend = sii8240_mhl_tx_suspend,
  4312. .resume = sii8240_mhl_tx_resume,
  4313. };
  4314. #if defined (CONFIG_MACH_HLTEDCM)
  4315. /*
  4316. This is only for H-DCM HW REV0.9 and REV1.0.
  4317. In those schematics the FELICA I2C pull up voltage source are connected to V_MHL
  4318. which is different voltage source from previous HW revision.
  4319. This means whenever the FELICA is working the V_MHL is controlled by FELICA driver
  4320. and this is why the duplicated extern function is declared and utilized here
  4321. even this is kind of prohibited way to make a code.
  4322. This has no harmful factor on the other models. This is only for H-DCM HW REV0.9/1.0.
  4323. */
  4324. void of_sii8240_hw_poweron(bool enable)
  4325. {
  4326. if (g_sii8240 && g_sii8240->pdata && g_sii8240->pdata->power)
  4327. g_sii8240->pdata->power(enable);
  4328. else
  4329. pr_err("[ERROR] %s: some pointer is not initialized (either pdata or pdata->power)\n" , __func__);
  4330. }
  4331. #endif
  4332. #ifdef CONFIG_EXTCON
  4333. static int __init sii8240_init_cable_notify(void)
  4334. {
  4335. struct sec_mhl_cable *cable;
  4336. int i;
  4337. int ret = 0;
  4338. pr_info("%s register extcon notifier for usb and ta\n", __func__);
  4339. for (i = 0; i < ARRAY_SIZE(support_cable_list); i++) {
  4340. cable = &support_cable_list[i];
  4341. INIT_WORK(&cable->work, sii8240_extcon_work);
  4342. cable->nb.notifier_call = sii8240_extcon_notifier;
  4343. ret = extcon_register_interest(&cable->extcon_nb,
  4344. EXTCON_DEV_NAME,
  4345. extcon_cable_name[cable->cable_type],
  4346. &cable->nb);
  4347. if (ret)
  4348. pr_err("%s: fail to register extcon notifier(%s, %d)\n",
  4349. __func__, extcon_cable_name[cable->cable_type],
  4350. ret);
  4351. cable->edev = cable->extcon_nb.edev;
  4352. if (!cable->edev)
  4353. pr_err("%s: fail to get extcon device\n", __func__);
  4354. }
  4355. return 0;
  4356. }
  4357. device_initcall_sync(sii8240_init_cable_notify);
  4358. #else
  4359. static BLOCKING_NOTIFIER_HEAD(acc_mhl_notifier);
  4360. void of_sii8240_muic_mhl_notify(int event)
  4361. {
  4362. pr_info("%s Attached: %d\n", __func__, event);
  4363. blocking_notifier_call_chain(&acc_mhl_notifier, event, NULL);
  4364. }
  4365. #endif
  4366. static ssize_t sii8240_rda_mhl_version(struct device *dev,
  4367. struct device_attribute *attr,
  4368. char *buf)
  4369. {
  4370. ssize_t ret = 0;
  4371. struct sii8240_data *sii8240 = dev_get_drvdata(sii8240_mhldev);
  4372. if (((sii8240->regs.peer_devcap[MHL_DEVCAP_MHL_VERSION] & 0xF0) >= 0x20)
  4373. && (sii8240->regs.peer_devcap[MHL_DEVCAP_VID_LINK_MODE] &
  4374. (MHL_DEV_VID_LINK_SUPP_PPIXEL |
  4375. MHL_DEV_VID_LINK_SUPPYCBCR422))) {
  4376. ret = snprintf(buf, PAGE_SIZE, "%d\n", 2);
  4377. } else
  4378. ret = snprintf(buf, PAGE_SIZE, "%d\n", 1);
  4379. return ret;
  4380. }
  4381. static DEVICE_ATTR(mhl_version, 0644, sii8240_rda_mhl_version, NULL);
  4382. static ssize_t sii8240_hdcp_status(struct class *dev,
  4383. struct class_attribute *attr, char *buf)
  4384. {
  4385. int size;
  4386. size = snprintf(buf, 10,"%d", g_monitor_cmd.a);
  4387. return size;
  4388. }
  4389. static CLASS_ATTR(hdcp_status, 0444,
  4390. sii8240_hdcp_status, NULL);
  4391. #if CONFIG_MHL_SWING_LEVEL
  4392. static ssize_t sii8240_swing_test_show(struct class *dev,
  4393. struct class_attribute *attr, char *buf)
  4394. {
  4395. struct sii8240_data *sii8240 = dev_get_drvdata(sii8240_mhldev);
  4396. u32 clk = (sii8240->pdata->swing_level >> 3) & 0x07;
  4397. u32 data = sii8240->pdata->swing_level & 0x07;
  4398. return sprintf(buf, "mhl_show_value:0x%02x(%d%d:Clk=%d,Data=%d)\n"
  4399. , sii8240->pdata->swing_level, clk, data, clk, data);
  4400. }
  4401. static ssize_t sii8240_swing_test_store(struct class *dev,
  4402. struct class_attribute *attr,
  4403. const char *buf, size_t size)
  4404. {
  4405. struct sii8240_data *sii8240 = dev_get_drvdata(sii8240_mhldev);
  4406. if (buf[0] >= '0' && buf[0] <= '7' &&
  4407. buf[1] >= '0' && buf[1] <= '7')
  4408. sii8240->pdata->swing_level = ((buf[0] - '0') << 3) |
  4409. (buf[1] - '0');
  4410. else
  4411. sii8240->pdata->swing_level = 0x34; /*Clk=6 and Data=4*/
  4412. return size;
  4413. }
  4414. static CLASS_ATTR(swing, 0664,
  4415. sii8240_swing_test_show, sii8240_swing_test_store);
  4416. extern int hdmi_forced_resolution;
  4417. static ssize_t sii8240_timing_test_show(struct class *dev,
  4418. struct class_attribute *attr, char *buf)
  4419. {
  4420. return sprintf(buf, "%d\n", hdmi_forced_resolution);
  4421. }
  4422. static ssize_t sii8240_timing_test_store(struct class *dev,
  4423. struct class_attribute *attr,
  4424. const char *buf, size_t size)
  4425. {
  4426. int timing, ret;
  4427. ret = kstrtouint(buf, 10, &timing);
  4428. if (unlikely(ret < 0))
  4429. return size;
  4430. if (timing >= 0 && timing <= 44)
  4431. hdmi_forced_resolution = timing;
  4432. else
  4433. hdmi_forced_resolution = -1;
  4434. return size;
  4435. }
  4436. static CLASS_ATTR(timing, 0664,
  4437. sii8240_timing_test_show, sii8240_timing_test_store);
  4438. #endif
  4439. /* for factory test process */
  4440. #ifdef CONFIG_SS_FACTORY
  4441. #define SII_ID 0x82
  4442. static ssize_t sii8240_test_show(struct class *dev,
  4443. struct class_attribute *attr,
  4444. char *buf)
  4445. {
  4446. struct sii8240_data *sii8240 = dev_get_drvdata(sii8240_mhldev);
  4447. struct i2c_client *tmds = sii8240->pdata->tmds_client;
  4448. int size;
  4449. u8 sii_id = 0;
  4450. sii8240->pdata->power(1);
  4451. msleep(20);
  4452. sii8240->pdata->hw_reset();
  4453. mhl_read_byte_reg(tmds, 0x03, &sii_id);
  4454. pr_info("sii8240: check mhl : %X\n", sii_id);
  4455. sii8240->pdata->power(0);
  4456. size = snprintf(buf, 10, "%d\n", sii_id == SII_ID ? 1 : 0);
  4457. return size;
  4458. }
  4459. static CLASS_ATTR(test_result, 0664, sii8240_test_show, NULL);
  4460. #endif
  4461. static int __devinit sii8240_tmds_i2c_probe(struct i2c_client *client,
  4462. const struct i2c_device_id *id)
  4463. {
  4464. int ret;
  4465. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  4466. struct sii8240_data *sii8240;
  4467. struct kobject *uevent_mhl;
  4468. struct device *mhl_dev;
  4469. dev_info(&client->dev, "success client_addr 0x%X\n", client->addr);
  4470. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  4471. return -EIO;
  4472. /* going to use block read/write, so check for this too */
  4473. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
  4474. return -EIO;
  4475. sii8240 = kzalloc(sizeof(struct sii8240_data), GFP_KERNEL);
  4476. if (!sii8240) {
  4477. dev_err(&client->dev, "failed to allocate driver data\n");
  4478. return -ENOMEM;
  4479. }
  4480. sii8240->pdata = client->dev.platform_data;
  4481. if (!sii8240->pdata) {
  4482. dev_err(&client->dev, "failed to find platform data\n");
  4483. ret = -EINVAL;
  4484. goto err_exit0;
  4485. }
  4486. sii8240->pdata->tmds_client = client;
  4487. i2c_set_clientdata(client, sii8240);
  4488. mutex_init(&sii8240->lock);
  4489. mutex_init(&sii8240->msc_lock);
  4490. mutex_init(&sii8240->cbus_lock);
  4491. mutex_init(&sii8240->input_lock);
  4492. init_waitqueue_head(&sii8240->wq);
  4493. sii8240->cbus_cmd_wqs = create_workqueue("sii8240-cmdwq");
  4494. if (sii8240->cbus_cmd_wqs == NULL) {
  4495. ret = -ENXIO;
  4496. dev_err(&client->dev, "failed to create cbus_cmd_wqs\n");
  4497. goto err_exit0;
  4498. }
  4499. sii8240->avi_cmd_wqs = create_workqueue("sii8240-aviwq");
  4500. if (sii8240->avi_cmd_wqs == NULL) {
  4501. ret = -ENXIO;
  4502. dev_err(&client->dev, "failed to create avi_cmd_wqs\n");
  4503. goto err_exit0;
  4504. }
  4505. sii8240->mhl_detection_workqueue = create_workqueue("mhl_detection_wq");
  4506. if (!(sii8240->mhl_detection_workqueue)) {
  4507. printk(KERN_ERR
  4508. "[ERROR] %s() workqueue create fail\n", __func__);
  4509. ret = -ENOMEM;
  4510. goto err_exit0;
  4511. }
  4512. sii8240->mhl_link_monitor_wq = create_workqueue("mhl_link_monitor_wq");
  4513. if (!(sii8240->mhl_link_monitor_wq)) {
  4514. printk(KERN_ERR
  4515. "[ERROR] %s() workqueue create fail\n", __func__);
  4516. ret = -ENOMEM;
  4517. goto err_exit0;
  4518. }
  4519. /*workqueue for CBUS*/
  4520. INIT_WORK(&sii8240->cbus_work, sii8240_msc_event);
  4521. INIT_LIST_HEAD(&sii8240->cbus_data_list);
  4522. INIT_WORK(&sii8240->redetect_work, sii8240_detection_restart);
  4523. INIT_WORK(&sii8240->avi_control_work, sii8240_avi_control_thread);
  4524. #ifdef SII8240_CHECK_MONITOR
  4525. INIT_WORK(&sii8240->mhl_link_monitor_work, sii8240_link_monitor_work);
  4526. #endif
  4527. #ifdef SFEATURE_UNSTABLE_SOURCE_WA
  4528. INIT_WORK(&sii8240->avi_check_work, sii8240_avi_check_work);
  4529. #endif
  4530. #ifdef SFEATURE_UNSTABLE_SOURCE_WA
  4531. setup_timer(&sii8240->avi_check_timer, sii8240_avif_check_callback,
  4532. (unsigned long)sii8240);
  4533. #endif
  4534. #ifdef SII8240_CHECK_MONITOR
  4535. setup_timer(&sii8240->mhl_timer, sii8240_link_monitor_timer, (unsigned long)sii8240);
  4536. #endif
  4537. dev_info(&client->dev, "sii8240 irq : %d\n", client->irq);
  4538. sii8240->irq = client->irq;
  4539. sii8240_register_input_device(sii8240);
  4540. sii8240_mhldev = &client->dev;
  4541. g_sii8240 = sii8240;
  4542. ret = request_threaded_irq(client->irq, NULL, sii8240_irq_thread,
  4543. IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
  4544. "sii8240", sii8240);
  4545. if (unlikely(ret < 0)) {
  4546. printk(KERN_ERR "[MHL]request irq Q failing\n");
  4547. goto err_exit0;
  4548. }
  4549. disable_irq(client->irq);
  4550. sii8240->irq_enabled = false;
  4551. wakeup_source_init(&sii8240->mhl_ws, "mhl_ws");
  4552. if (sii8240->pdata->hdmi_mhl_ops) {
  4553. struct msm_hdmi_mhl_ops *hdmi_mhl_ops = sii8240->pdata->hdmi_mhl_ops;
  4554. hdmi_mhl_ops->set_mhl_max_pclk(sii8240->pdata->hdmi_pdev, 150000);
  4555. }
  4556. #ifndef CONFIG_EXTCON
  4557. sii8240->mhl_nb.notifier_call = sii8240_detection_callback;
  4558. acc_register_notifier(&sii8240->mhl_nb);
  4559. #endif
  4560. sii8240->mhl_event_switch.name = "mhl_event_switch";
  4561. switch_dev_register(&sii8240->mhl_event_switch);
  4562. #ifdef SFEATURE_HDCP_SUPPORT
  4563. sii8240->mhl_ddc_bypass = mhl_ddc_bypass;
  4564. #endif
  4565. sec_mhl = class_create(THIS_MODULE, "mhl");
  4566. if (IS_ERR(sec_mhl)) {
  4567. pr_err("[ERROR] Failed to create class(mhl)!\n");
  4568. ret = PTR_ERR(sec_mhl);
  4569. goto err_exit0;
  4570. }
  4571. mhl_dev = device_create(sec_mhl, NULL, MKDEV(MHL_MAJOR, 0),
  4572. NULL, "mhl_dev");
  4573. if (IS_ERR(mhl_dev)) {
  4574. pr_err("[ERROR] Failed to create device(mhl_dev)!\n");
  4575. ret = PTR_ERR(mhl_dev);
  4576. goto err_mhl_dev;
  4577. }
  4578. ret = device_create_file(mhl_dev,
  4579. (const struct device_attribute *)&dev_attr_mhl_version.attr);
  4580. if (ret) {
  4581. pr_err("[ERROR] Failed to create device file in sysfs entries(%s)!\n",
  4582. dev_attr_mhl_version.attr.name);
  4583. goto err_create_file_1;
  4584. }
  4585. #ifdef CONFIG_SS_FACTORY
  4586. ret = class_create_file(sec_mhl, &class_attr_test_result);
  4587. if (ret) {
  4588. pr_err("[ERROR] Failed to create device file in sysfs entries!\n");
  4589. goto err_create_file_2;
  4590. }
  4591. #endif
  4592. #if CONFIG_MHL_SWING_LEVEL
  4593. ret = class_create_file(sec_mhl, &class_attr_swing);
  4594. if (ret) {
  4595. pr_err("[ERROR] failed to create swing sysfs file\n");
  4596. goto err_create_file_3;
  4597. }
  4598. ret = class_create_file(sec_mhl, &class_attr_timing);
  4599. if (ret) {
  4600. pr_err("[ERROR] failed to create timing sysfs file\n");
  4601. goto err_create_file_4;
  4602. }
  4603. #endif
  4604. ret = class_create_file(sec_mhl, &class_attr_hdcp_status);
  4605. if (ret) {
  4606. pr_err("[ERROR] failed to create hdcp_status sysfs file\n");
  4607. goto err_create_file_5;
  4608. }
  4609. uevent_mhl = &(mhl_dev->kobj);
  4610. return 0;
  4611. err_create_file_5:
  4612. #if CONFIG_MHL_SWING_LEVEL
  4613. class_remove_file(sec_mhl, &class_attr_timing);
  4614. err_create_file_4:
  4615. class_remove_file(sec_mhl, &class_attr_swing);
  4616. err_create_file_3:
  4617. #endif
  4618. #ifdef CONFIG_SS_FACTORY
  4619. class_remove_file(sec_mhl, &class_attr_test_result);
  4620. err_create_file_2:
  4621. #endif
  4622. class_remove_file(sec_mhl,
  4623. (const struct class_attribute *)&dev_attr_mhl_version.attr);
  4624. err_create_file_1:
  4625. device_destroy(sec_mhl, MKDEV(MHL_MAJOR, 0));
  4626. err_mhl_dev:
  4627. class_destroy(sec_mhl);
  4628. err_exit0:
  4629. kfree(sii8240);
  4630. return ret;
  4631. }
  4632. static int __devinit sii8240_hdmi_i2c_probe(struct i2c_client *client,
  4633. const struct i2c_device_id *id)
  4634. {
  4635. struct sii8240_platform_data *pdata = client->dev.platform_data;
  4636. pdata->hdmi_client = client;
  4637. dev_info(&client->dev, "success client_addr 0x%X\n", client->addr);
  4638. return 0;
  4639. }
  4640. static int __devinit sii8240_disc_i2c_probe(struct i2c_client *client,
  4641. const struct i2c_device_id *id)
  4642. {
  4643. struct sii8240_platform_data *pdata = client->dev.platform_data;
  4644. pdata->disc_client = client;
  4645. dev_info(&client->dev, "success client_addr 0x%X\n", client->addr);
  4646. return 0;
  4647. }
  4648. static int __devinit sii8240_tpi_i2c_probe(struct i2c_client *client,
  4649. const struct i2c_device_id *id)
  4650. {
  4651. struct sii8240_platform_data *pdata = client->dev.platform_data;
  4652. pdata->tpi_client = client;
  4653. dev_info(&client->dev, "success client_addr 0x%X\n", client->addr);
  4654. return 0;
  4655. }
  4656. static int __devinit sii8240_cbus_i2c_probe(struct i2c_client *client,
  4657. const struct i2c_device_id *id)
  4658. {
  4659. struct sii8240_platform_data *pdata = client->dev.platform_data;
  4660. pdata->cbus_client = client;
  4661. dev_info(&client->dev, "success client_addr 0x%X\n", client->addr);
  4662. return 0;
  4663. }
  4664. #ifdef CONFIG_OF
  4665. static int __devinit of_sii8240_probe_dt(struct i2c_client *client,
  4666. const struct i2c_device_id *id)
  4667. {
  4668. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  4669. const struct i2c_device_id *id_table = client->driver->id_table;
  4670. struct sii8240_platform_data *pdata = NULL;
  4671. u32 client_id = -1;
  4672. if (!client->dev.of_node) {
  4673. dev_err(&client->dev, "sii8240: Client node not-found\n");
  4674. return -1;
  4675. }
  4676. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  4677. return -EIO;
  4678. /* going to use block read/write, so check for this too */
  4679. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
  4680. return -EIO;
  4681. if (of_property_read_u32(client->dev.of_node, "sii8240,client_id", &client_id))
  4682. dev_err(&client->dev, "Wrong Client_id# %d", client_id);
  4683. if (0 == client_id) {
  4684. pdata = platform_init_data(client);
  4685. client->dev.platform_data = pdata;
  4686. sii8240_tmds_i2c_probe(client, id_table);
  4687. } else if (g_sii8240) {
  4688. client->dev.platform_data = g_sii8240->pdata;
  4689. if (1 == client_id)
  4690. sii8240_hdmi_i2c_probe(client, id_table);
  4691. else if (2 == client_id)
  4692. sii8240_disc_i2c_probe(client, id_table);
  4693. else if (3 == client_id)
  4694. sii8240_tpi_i2c_probe(client, id_table);
  4695. else if (4 == client_id)
  4696. sii8240_cbus_i2c_probe(client, id_table);
  4697. }
  4698. return 0;
  4699. }
  4700. #endif
  4701. static int __devexit sii8240_tmds_remove(struct i2c_client *client)
  4702. {
  4703. return 0;
  4704. }
  4705. static int __devexit sii8240_hdmi_remove(struct i2c_client *client)
  4706. {
  4707. return 0;
  4708. }
  4709. static int __devexit sii8240_disc_remove(struct i2c_client *client)
  4710. {
  4711. return 0;
  4712. }
  4713. static int __devexit sii8240_tpi_remove(struct i2c_client *client)
  4714. {
  4715. return 0;
  4716. }
  4717. static int __devexit sii8240_cbus_remove(struct i2c_client *client)
  4718. {
  4719. return 0;
  4720. }
  4721. static const struct i2c_device_id sii8240_tmds_id[] = {
  4722. {"sii8240_tmds", 0},
  4723. {}
  4724. };
  4725. static const struct i2c_device_id sii8240_hdmi_id[] = {
  4726. {"sii8240_hdmi", 0},
  4727. {}
  4728. };
  4729. static const struct i2c_device_id sii8240_disc_id[] = {
  4730. {"sii8240_disc", 0},
  4731. {}
  4732. };
  4733. static const struct i2c_device_id sii8240_tpi_id[] = {
  4734. {"sii8240_tpi", 0},
  4735. {}
  4736. };
  4737. static const struct i2c_device_id sii8240_cbus_id[] = {
  4738. {"sii8240_cbus", 0},
  4739. {}
  4740. };
  4741. MODULE_DEVICE_TABLE(i2c, sii8240_tmds_id);
  4742. MODULE_DEVICE_TABLE(i2c, sii8240_hdmi_id);
  4743. MODULE_DEVICE_TABLE(i2c, sii8240_disc_id);
  4744. MODULE_DEVICE_TABLE(i2c, sii8240_tpi_id);
  4745. MODULE_DEVICE_TABLE(i2c, sii8240_cbus_id);
  4746. #ifdef CONFIG_OF
  4747. static struct of_device_id sii8240_dt_ids[] = {
  4748. { .compatible = "sii8240,tmds",},
  4749. { .compatible = "sii8240,hdmi",},
  4750. { .compatible = "sii8240,disc",},
  4751. { .compatible = "sii8240,tpi",},
  4752. { .compatible = "sii8240,cbus",},
  4753. {}
  4754. };
  4755. MODULE_DEVICE_TABLE(of, sii8240_dt_ids);
  4756. static const struct i2c_device_id sii8240_id[] = {
  4757. {"sii8240_mhlv2", 0},
  4758. {}
  4759. };
  4760. MODULE_DEVICE_TABLE(i2c, sii8240_id);
  4761. static struct i2c_driver sii8240_i2c_driver = {
  4762. .driver = {
  4763. .owner = THIS_MODULE,
  4764. .name = "sii8240_mhlv2dt",
  4765. .of_match_table = of_match_ptr(sii8240_dt_ids),
  4766. .pm = &sii8240_pm_ops,
  4767. },
  4768. .id_table = sii8240_id,
  4769. .probe = of_sii8240_probe_dt,
  4770. };
  4771. #else
  4772. static struct i2c_driver sii8240_tmds_i2c_driver = {
  4773. .driver = {
  4774. .owner = THIS_MODULE,
  4775. .name = "sii8240_tmds",
  4776. .pm = &sii8240_pm_ops,
  4777. },
  4778. .id_table = sii8240_tmds_id,
  4779. .probe = sii8240_tmds_i2c_probe,
  4780. .remove = __devexit_p(sii8240_tmds_remove),
  4781. };
  4782. static struct i2c_driver sii8240_hdmi_i2c_driver = {
  4783. .driver = {
  4784. .owner = THIS_MODULE,
  4785. .name = "sii8240_hdmi",
  4786. },
  4787. .id_table = sii8240_hdmi_id,
  4788. .probe = sii8240_hdmi_i2c_probe,
  4789. .remove = __devexit_p(sii8240_hdmi_remove),
  4790. };
  4791. static struct i2c_driver sii8240_disc_i2c_driver = {
  4792. .driver = {
  4793. .owner = THIS_MODULE,
  4794. .name = "sii8240_disc",
  4795. },
  4796. .id_table = sii8240_disc_id,
  4797. .probe = sii8240_disc_i2c_probe,
  4798. .remove = __devexit_p(sii8240_disc_remove),
  4799. };
  4800. static struct i2c_driver sii8240_tpi_i2c_driver = {
  4801. .driver = {
  4802. .owner = THIS_MODULE,
  4803. .name = "sii8240_tpi",
  4804. },
  4805. .id_table = sii8240_tpi_id,
  4806. .probe = sii8240_tpi_i2c_probe,
  4807. .remove = __devexit_p(sii8240_tpi_remove),
  4808. };
  4809. static struct i2c_driver sii8240_cbus_i2c_driver = {
  4810. .driver = {
  4811. .owner = THIS_MODULE,
  4812. .name = "sii8240_cbus",
  4813. },
  4814. .id_table = sii8240_cbus_id,
  4815. .probe = sii8240_cbus_i2c_probe,
  4816. .remove = __devexit_p(sii8240_cbus_remove),
  4817. };
  4818. #endif
  4819. static int __init sii8240_init(void)
  4820. {
  4821. int ret;
  4822. pr_info("%s sii8240: check mhl\n", __func__);
  4823. #ifdef CONFIG_OF
  4824. ret = i2c_add_driver(&sii8240_i2c_driver);
  4825. if (ret < 0) {
  4826. pr_err("[ERROR] sii8240: mhl_v2 i2c driver init failed");
  4827. return ret;
  4828. }
  4829. #else
  4830. ret = i2c_add_driver(&sii8240_tmds_i2c_driver);
  4831. if (unlikely(ret < 0)) {
  4832. pr_err("[ERROR] sii8240: tmds i2c driver init failed");
  4833. goto err_tmds;
  4834. }
  4835. ret = i2c_add_driver(&sii8240_hdmi_i2c_driver);
  4836. if (unlikely(ret < 0)) {
  4837. pr_err("[ERROR] sii8240: hdmi i2c driver init failed");
  4838. goto err_hdmi;
  4839. }
  4840. ret = i2c_add_driver(&sii8240_disc_i2c_driver);
  4841. if (unlikely(ret < 0)) {
  4842. pr_err("[ERROR] sii8240: disc i2c driver init failed");
  4843. goto err_disc;
  4844. }
  4845. ret = i2c_add_driver(&sii8240_tpi_i2c_driver);
  4846. if (unlikely(ret < 0)) {
  4847. pr_err("[ERROR] sii8240: tpi i2c driver init failed");
  4848. goto err_tpi;
  4849. }
  4850. ret = i2c_add_driver(&sii8240_cbus_i2c_driver);
  4851. if (unlikely(ret < 0)) {
  4852. pr_err("[ERROR] sii8240: cbus i2c driver init failed");
  4853. goto err_cbus;
  4854. }
  4855. #endif
  4856. return 0;
  4857. #ifndef CONFIG_OF
  4858. err_cbus:
  4859. i2c_del_driver(&sii8240_cbus_i2c_driver);
  4860. err_tpi:
  4861. i2c_del_driver(&sii8240_tpi_i2c_driver);
  4862. err_disc:
  4863. i2c_del_driver(&sii8240_disc_i2c_driver);
  4864. err_hdmi:
  4865. i2c_del_driver(&sii8240_hdmi_i2c_driver);
  4866. err_tmds:
  4867. i2c_del_driver(&sii8240_tmds_i2c_driver);
  4868. #endif
  4869. #ifdef CONFIG_OF
  4870. i2c_del_driver(&sii8240_i2c_driver);
  4871. #endif
  4872. return ret;
  4873. }
  4874. static void __exit sii8240_exit(void)
  4875. {
  4876. #ifdef CONFIG_OF
  4877. i2c_del_driver(&sii8240_i2c_driver);
  4878. #else
  4879. i2c_del_driver(&sii8240_cbus_i2c_driver);
  4880. i2c_del_driver(&sii8240_tpi_i2c_driver);
  4881. i2c_del_driver(&sii8240_disc_i2c_driver);
  4882. i2c_del_driver(&sii8240_hdmi_i2c_driver);
  4883. i2c_del_driver(&sii8240_tmds_i2c_driver);
  4884. #endif
  4885. }
  4886. module_init(sii8240_init);
  4887. module_exit(sii8240_exit);
  4888. MODULE_DESCRIPTION("Silicon Image MHL-8240 Transmitter driver");
  4889. MODULE_AUTHOR("Sangmi Park <sm0327.park@samsung.com>");
  4890. MODULE_LICENSE("GPL");