mdp4_overlay_atv.c 5.3 KB

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  1. /* Copyright (c) 2010, 2012 The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/sched.h>
  16. #include <linux/time.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/hrtimer.h>
  20. #include <linux/delay.h>
  21. #include <linux/io.h>
  22. #include <linux/semaphore.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/fb.h>
  25. #include <asm/system.h>
  26. #include <asm/mach-types.h>
  27. #include <mach/hardware.h>
  28. #include "mdp.h"
  29. #include "msm_fb.h"
  30. #include "mdp4.h"
  31. static struct mdp4_overlay_pipe *atv_pipe;
  32. int mdp4_atv_on(struct platform_device *pdev)
  33. {
  34. uint8 *buf;
  35. unsigned int buf_offset;
  36. int bpp, ptype;
  37. struct fb_info *fbi;
  38. struct fb_var_screeninfo *var;
  39. struct msm_fb_data_type *mfd;
  40. struct mdp4_overlay_pipe *pipe;
  41. int ret;
  42. mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
  43. if (!mfd)
  44. return -ENODEV;
  45. if (mfd->key != MFD_KEY)
  46. return -EINVAL;
  47. fbi = mfd->fbi;
  48. var = &fbi->var;
  49. bpp = fbi->var.bits_per_pixel / 8;
  50. buf = (uint8 *) fbi->fix.smem_start;
  51. buf_offset = calc_fb_offset(mfd, fbi, bpp);
  52. if (atv_pipe == NULL) {
  53. ptype = mdp4_overlay_format2type(mfd->fb_imgType);
  54. pipe = mdp4_overlay_pipe_alloc(ptype, MDP4_MIXER1);
  55. if (pipe == NULL)
  56. return -EBUSY;
  57. pipe->pipe_used++;
  58. pipe->mixer_stage = MDP4_MIXER_STAGE_BASE;
  59. pipe->mixer_num = MDP4_MIXER1;
  60. pipe->src_format = mfd->fb_imgType;
  61. mdp4_overlay_panel_mode(pipe->mixer_num, MDP4_PANEL_ATV);
  62. mdp4_overlay_format2pipe(pipe);
  63. atv_pipe = pipe; /* keep it */
  64. } else {
  65. pipe = atv_pipe;
  66. }
  67. printk(KERN_INFO "mdp4_atv_overlay: pipe=%x ndx=%d\n",
  68. (int)pipe, pipe->pipe_ndx);
  69. /* MDP cmd block enable */
  70. mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
  71. /* Turn the next panel on, get correct resolution
  72. before configuring overlay pipe */
  73. ret = panel_next_on(pdev);
  74. pr_info("%s: fbi->var.yres: %d | fbi->var.xres: %d",
  75. __func__, fbi->var.yres, fbi->var.xres);
  76. /* MDP4 Config */
  77. pipe->src_height = fbi->var.yres;
  78. pipe->src_width = fbi->var.xres;
  79. pipe->src_h = fbi->var.yres;
  80. pipe->src_w = fbi->var.xres;
  81. pipe->src_y = 0;
  82. pipe->src_x = 0;
  83. if (mfd->map_buffer) {
  84. pipe->srcp0_addr = (unsigned int)mfd->map_buffer->iova[0] + \
  85. buf_offset;
  86. pr_debug("start 0x%lx srcp0_addr 0x%x\n", mfd->
  87. map_buffer->iova[0], pipe->srcp0_addr);
  88. } else {
  89. pipe->srcp0_addr = (uint32)(buf + buf_offset);
  90. }
  91. pipe->srcp0_ystride = fbi->fix.line_length;
  92. mdp4_overlay_dmae_xy(pipe); /* dma_e */
  93. mdp4_overlay_dmae_cfg(mfd, 1);
  94. mdp4_overlay_rgb_setup(pipe);
  95. mdp4_overlayproc_cfg(pipe);
  96. mdp4_overlay_reg_flush(pipe, 1);
  97. mdp4_mixer_stage_up(pipe, 0);
  98. mdp4_mixer_stage_commit(pipe->mixer_num);
  99. if (ret == 0)
  100. mdp_pipe_ctrl(MDP_OVERLAY1_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
  101. /* MDP cmd block disable */
  102. mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
  103. return ret;
  104. }
  105. int mdp4_atv_off(struct platform_device *pdev)
  106. {
  107. int ret = 0;
  108. mdp_pipe_ctrl(MDP_OVERLAY1_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
  109. ret = panel_next_off(pdev);
  110. /* delay to make sure the last frame finishes */
  111. msleep(100);
  112. /* dis-engage rgb2 from mixer1 */
  113. if (atv_pipe) {
  114. mdp4_mixer_stage_down(atv_pipe, 1);
  115. mdp4_iommu_unmap(atv_pipe);
  116. }
  117. return ret;
  118. }
  119. /*
  120. * mdp4_overlay1_done_atv: called from isr
  121. */
  122. void mdp4_overlay1_done_atv()
  123. {
  124. complete(&atv_pipe->comp);
  125. }
  126. void mdp4_atv_overlay(struct msm_fb_data_type *mfd)
  127. {
  128. struct fb_info *fbi = mfd->fbi;
  129. uint8 *buf;
  130. unsigned int buf_offset;
  131. int bpp;
  132. unsigned long flag;
  133. struct mdp4_overlay_pipe *pipe;
  134. if (!mfd->panel_power_on)
  135. return;
  136. /* no need to power on cmd block since it's lcdc mode */
  137. bpp = fbi->var.bits_per_pixel / 8;
  138. buf = (uint8 *) fbi->fix.smem_start;
  139. buf_offset = calc_fb_offset(mfd, fbi, bpp);
  140. mutex_lock(&mfd->dma->ov_mutex);
  141. pipe = atv_pipe;
  142. if (mfd->map_buffer) {
  143. pipe->srcp0_addr = (unsigned int)mfd->map_buffer->iova[0] + \
  144. buf_offset;
  145. pr_debug("start 0x%lx srcp0_addr 0x%x\n", mfd->
  146. map_buffer->iova[0], pipe->srcp0_addr);
  147. } else {
  148. pipe->srcp0_addr = (uint32)(buf + buf_offset);
  149. }
  150. mdp_update_pm(mfd, vsync_ctrl_db[0].vsync_time);
  151. mdp4_overlay_mdp_perf_req(pipe, mfd);
  152. mdp4_overlay_mdp_perf_upd(mfd, 1);
  153. mdp4_overlay_rgb_setup(pipe);
  154. mdp4_overlay_reg_flush(pipe, 0);
  155. mdp4_mixer_stage_up(pipe, 0);
  156. mdp4_mixer_stage_commit(pipe->mixer_num);
  157. printk(KERN_INFO "mdp4_atv_overlay: pipe=%x ndx=%d\n",
  158. (int)pipe, pipe->pipe_ndx);
  159. /* enable irq */
  160. spin_lock_irqsave(&mdp_spin_lock, flag);
  161. mdp_enable_irq(MDP_OVERLAY1_TERM);
  162. INIT_COMPLETION(atv_pipe->comp);
  163. mfd->dma->waiting = TRUE;
  164. outp32(MDP_INTR_CLEAR, INTR_OVERLAY1_DONE);
  165. mdp_intr_mask |= INTR_OVERLAY1_DONE;
  166. outp32(MDP_INTR_ENABLE, mdp_intr_mask);
  167. spin_unlock_irqrestore(&mdp_spin_lock, flag);
  168. wait_for_completion_killable(&atv_pipe->comp);
  169. mdp_disable_irq(MDP_OVERLAY1_TERM);
  170. mdp4_overlay_mdp_perf_upd(mfd, 0);
  171. mdp4_stat.kickoff_atv++;
  172. mutex_unlock(&mfd->dma->ov_mutex);
  173. }