lcdc_toshiba_wvga_pt.c 12 KB

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  1. /* Copyright (c) 2009-2010, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #include <linux/delay.h>
  14. #include <linux/module.h>
  15. #ifdef CONFIG_SPI_QSD
  16. #include <linux/spi/spi.h>
  17. #endif
  18. #include <mach/gpio.h>
  19. #include <mach/pmic.h>
  20. #include "msm_fb.h"
  21. #ifdef CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM
  22. #include "mddihosti.h"
  23. #endif
  24. #ifdef CONFIG_SPI_QSD
  25. #define LCDC_TOSHIBA_SPI_DEVICE_NAME "lcdc_toshiba_ltm030dd40"
  26. static struct spi_device *lcdc_toshiba_spi_client;
  27. #else
  28. static int spi_cs;
  29. static int spi_sclk;
  30. static int spi_mosi;
  31. static int spi_miso;
  32. #endif
  33. struct toshiba_state_type{
  34. boolean disp_initialized;
  35. boolean display_on;
  36. boolean disp_powered_up;
  37. };
  38. static struct toshiba_state_type toshiba_state = { 0 };
  39. static struct msm_panel_common_pdata *lcdc_toshiba_pdata;
  40. #ifndef CONFIG_SPI_QSD
  41. static void toshiba_spi_write_byte(char dc, uint8 data)
  42. {
  43. uint32 bit;
  44. int bnum;
  45. gpio_set_value(spi_sclk, 0); /* clk low */
  46. /* dc: 0 for command, 1 for parameter */
  47. gpio_set_value(spi_mosi, dc);
  48. udelay(1); /* at least 20 ns */
  49. gpio_set_value(spi_sclk, 1); /* clk high */
  50. udelay(1); /* at least 20 ns */
  51. bnum = 8; /* 8 data bits */
  52. bit = 0x80;
  53. while (bnum) {
  54. gpio_set_value(spi_sclk, 0); /* clk low */
  55. if (data & bit)
  56. gpio_set_value(spi_mosi, 1);
  57. else
  58. gpio_set_value(spi_mosi, 0);
  59. udelay(1);
  60. gpio_set_value(spi_sclk, 1); /* clk high */
  61. udelay(1);
  62. bit >>= 1;
  63. bnum--;
  64. }
  65. }
  66. #endif
  67. static int toshiba_spi_write(char cmd, uint32 data, int num)
  68. {
  69. char *bp;
  70. #ifdef CONFIG_SPI_QSD
  71. char tx_buf[4];
  72. int rc, i;
  73. struct spi_message m;
  74. struct spi_transfer t;
  75. uint32 final_data = 0;
  76. if (!lcdc_toshiba_spi_client) {
  77. printk(KERN_ERR "%s lcdc_toshiba_spi_client is NULL\n",
  78. __func__);
  79. return -EINVAL;
  80. }
  81. memset(&t, 0, sizeof t);
  82. t.tx_buf = tx_buf;
  83. spi_setup(lcdc_toshiba_spi_client);
  84. spi_message_init(&m);
  85. spi_message_add_tail(&t, &m);
  86. /* command byte first */
  87. final_data |= cmd << 23;
  88. t.len = num + 2;
  89. if (t.len < 4)
  90. t.bits_per_word = 8 * t.len;
  91. /* followed by parameter bytes */
  92. if (num) {
  93. bp = (char *)&data;;
  94. bp += (num - 1);
  95. i = 1;
  96. while (num) {
  97. final_data |= 1 << (((4 - i) << 3) - i - 1);
  98. final_data |= *bp << (((4 - i - 1) << 3) - i - 1);
  99. num--;
  100. bp--;
  101. i++;
  102. }
  103. }
  104. bp = (char *)&final_data;
  105. for (i = 0; i < t.len; i++)
  106. tx_buf[i] = bp[3 - i];
  107. t.rx_buf = NULL;
  108. rc = spi_sync(lcdc_toshiba_spi_client, &m);
  109. if (rc)
  110. printk(KERN_ERR "spi_sync _write failed %d\n", rc);
  111. return rc;
  112. #else
  113. gpio_set_value(spi_cs, 1); /* cs high */
  114. /* command byte first */
  115. toshiba_spi_write_byte(0, cmd);
  116. /* followed by parameter bytes */
  117. if (num) {
  118. bp = (char *)&data;;
  119. bp += (num - 1);
  120. while (num) {
  121. toshiba_spi_write_byte(1, *bp);
  122. num--;
  123. bp--;
  124. }
  125. }
  126. gpio_set_value(spi_cs, 0); /* cs low */
  127. udelay(1);
  128. return 0;
  129. #endif
  130. }
  131. static int toshiba_spi_read_bytes(char cmd, uint32 *data, int num)
  132. {
  133. #ifdef CONFIG_SPI_QSD
  134. char tx_buf[5];
  135. char rx_buf[5];
  136. int rc;
  137. struct spi_message m;
  138. struct spi_transfer t;
  139. if (!lcdc_toshiba_spi_client) {
  140. printk(KERN_ERR "%s lcdc_toshiba_spi_client is NULL\n",
  141. __func__);
  142. return -EINVAL;
  143. }
  144. memset(&t, 0, sizeof t);
  145. t.tx_buf = tx_buf;
  146. t.rx_buf = rx_buf;
  147. spi_setup(lcdc_toshiba_spi_client);
  148. spi_message_init(&m);
  149. spi_message_add_tail(&t, &m);
  150. /* command byte first */
  151. tx_buf[0] = 0 | ((cmd >> 1) & 0x7f);
  152. tx_buf[1] = (cmd & 0x01) << 7;
  153. tx_buf[2] = 0;
  154. tx_buf[3] = 0;
  155. tx_buf[4] = 0;
  156. t.len = 5;
  157. rc = spi_sync(lcdc_toshiba_spi_client, &m);
  158. *data = 0;
  159. *data = ((rx_buf[1] & 0x1f) << 19) | (rx_buf[2] << 11) |
  160. (rx_buf[3] << 3) | ((rx_buf[4] & 0xe0) >> 5);
  161. if (rc)
  162. printk(KERN_ERR "spi_sync _read failed %d\n", rc);
  163. return rc;
  164. #else
  165. uint32 dbit, bits;
  166. int bnum;
  167. gpio_set_value(spi_cs, 1); /* cs high */
  168. /* command byte first */
  169. toshiba_spi_write_byte(0, cmd);
  170. if (num > 1) {
  171. /* extra dc bit */
  172. gpio_set_value(spi_sclk, 0); /* clk low */
  173. udelay(1);
  174. dbit = gpio_get_value(spi_miso);/* dc bit */
  175. udelay(1);
  176. gpio_set_value(spi_sclk, 1); /* clk high */
  177. }
  178. /* followed by data bytes */
  179. bnum = num * 8; /* number of bits */
  180. bits = 0;
  181. while (bnum) {
  182. bits <<= 1;
  183. gpio_set_value(spi_sclk, 0); /* clk low */
  184. udelay(1);
  185. dbit = gpio_get_value(spi_miso);
  186. udelay(1);
  187. gpio_set_value(spi_sclk, 1); /* clk high */
  188. bits |= dbit;
  189. bnum--;
  190. }
  191. *data = bits;
  192. udelay(1);
  193. gpio_set_value(spi_cs, 0); /* cs low */
  194. udelay(1);
  195. return 0;
  196. #endif
  197. }
  198. #ifndef CONFIG_SPI_QSD
  199. static void spi_pin_assign(void)
  200. {
  201. /* Setting the Default GPIO's */
  202. spi_sclk = *(lcdc_toshiba_pdata->gpio_num);
  203. spi_cs = *(lcdc_toshiba_pdata->gpio_num + 1);
  204. spi_mosi = *(lcdc_toshiba_pdata->gpio_num + 2);
  205. spi_miso = *(lcdc_toshiba_pdata->gpio_num + 3);
  206. }
  207. #endif
  208. static void toshiba_disp_powerup(void)
  209. {
  210. if (!toshiba_state.disp_powered_up && !toshiba_state.display_on) {
  211. /* Reset the hardware first */
  212. /* Include DAC power up implementation here */
  213. toshiba_state.disp_powered_up = TRUE;
  214. }
  215. }
  216. static void toshiba_disp_on(void)
  217. {
  218. uint32 data;
  219. #ifndef CONFIG_SPI_QSD
  220. gpio_set_value(spi_cs, 0); /* low */
  221. gpio_set_value(spi_sclk, 1); /* high */
  222. gpio_set_value(spi_mosi, 0);
  223. gpio_set_value(spi_miso, 0);
  224. #endif
  225. if (toshiba_state.disp_powered_up && !toshiba_state.display_on) {
  226. toshiba_spi_write(0, 0, 0);
  227. mdelay(7);
  228. toshiba_spi_write(0, 0, 0);
  229. mdelay(7);
  230. toshiba_spi_write(0, 0, 0);
  231. mdelay(7);
  232. toshiba_spi_write(0xba, 0x11, 1);
  233. toshiba_spi_write(0x36, 0x00, 1);
  234. mdelay(1);
  235. toshiba_spi_write(0x3a, 0x60, 1);
  236. toshiba_spi_write(0xb1, 0x5d, 1);
  237. mdelay(1);
  238. toshiba_spi_write(0xb2, 0x33, 1);
  239. toshiba_spi_write(0xb3, 0x22, 1);
  240. mdelay(1);
  241. toshiba_spi_write(0xb4, 0x02, 1);
  242. toshiba_spi_write(0xb5, 0x1e, 1); /* vcs -- adjust brightness */
  243. mdelay(1);
  244. toshiba_spi_write(0xb6, 0x27, 1);
  245. toshiba_spi_write(0xb7, 0x03, 1);
  246. mdelay(1);
  247. toshiba_spi_write(0xb9, 0x24, 1);
  248. toshiba_spi_write(0xbd, 0xa1, 1);
  249. mdelay(1);
  250. toshiba_spi_write(0xbb, 0x00, 1);
  251. toshiba_spi_write(0xbf, 0x01, 1);
  252. mdelay(1);
  253. toshiba_spi_write(0xbe, 0x00, 1);
  254. toshiba_spi_write(0xc0, 0x11, 1);
  255. mdelay(1);
  256. toshiba_spi_write(0xc1, 0x11, 1);
  257. toshiba_spi_write(0xc2, 0x11, 1);
  258. mdelay(1);
  259. toshiba_spi_write(0xc3, 0x3232, 2);
  260. mdelay(1);
  261. toshiba_spi_write(0xc4, 0x3232, 2);
  262. mdelay(1);
  263. toshiba_spi_write(0xc5, 0x3232, 2);
  264. mdelay(1);
  265. toshiba_spi_write(0xc6, 0x3232, 2);
  266. mdelay(1);
  267. toshiba_spi_write(0xc7, 0x6445, 2);
  268. mdelay(1);
  269. toshiba_spi_write(0xc8, 0x44, 1);
  270. toshiba_spi_write(0xc9, 0x52, 1);
  271. mdelay(1);
  272. toshiba_spi_write(0xca, 0x00, 1);
  273. mdelay(1);
  274. toshiba_spi_write(0xec, 0x02a4, 2); /* 0x02a4 */
  275. mdelay(1);
  276. toshiba_spi_write(0xcf, 0x01, 1);
  277. mdelay(1);
  278. toshiba_spi_write(0xd0, 0xc003, 2); /* c003 */
  279. mdelay(1);
  280. toshiba_spi_write(0xd1, 0x01, 1);
  281. mdelay(1);
  282. toshiba_spi_write(0xd2, 0x0028, 2);
  283. mdelay(1);
  284. toshiba_spi_write(0xd3, 0x0028, 2);
  285. mdelay(1);
  286. toshiba_spi_write(0xd4, 0x26a4, 2);
  287. mdelay(1);
  288. toshiba_spi_write(0xd5, 0x20, 1);
  289. mdelay(1);
  290. toshiba_spi_write(0xef, 0x3200, 2);
  291. mdelay(32);
  292. toshiba_spi_write(0xbc, 0x80, 1); /* wvga pass through */
  293. toshiba_spi_write(0x3b, 0x00, 1);
  294. mdelay(1);
  295. toshiba_spi_write(0xb0, 0x16, 1);
  296. mdelay(1);
  297. toshiba_spi_write(0xb8, 0xfff5, 2);
  298. mdelay(1);
  299. toshiba_spi_write(0x11, 0, 0);
  300. mdelay(5);
  301. toshiba_spi_write(0x29, 0, 0);
  302. mdelay(5);
  303. toshiba_state.display_on = TRUE;
  304. }
  305. data = 0;
  306. toshiba_spi_read_bytes(0x04, &data, 3);
  307. printk(KERN_INFO "toshiba_disp_on: id=%x\n", data);
  308. }
  309. static int lcdc_toshiba_panel_on(struct platform_device *pdev)
  310. {
  311. if (!toshiba_state.disp_initialized) {
  312. /* Configure reset GPIO that drives DAC */
  313. if (lcdc_toshiba_pdata->panel_config_gpio)
  314. lcdc_toshiba_pdata->panel_config_gpio(1);
  315. toshiba_disp_powerup();
  316. toshiba_disp_on();
  317. toshiba_state.disp_initialized = TRUE;
  318. }
  319. return 0;
  320. }
  321. static int lcdc_toshiba_panel_off(struct platform_device *pdev)
  322. {
  323. if (toshiba_state.disp_powered_up && toshiba_state.display_on) {
  324. /* Main panel power off (Deep standby in) */
  325. toshiba_spi_write(0x28, 0, 0); /* display off */
  326. mdelay(1);
  327. toshiba_spi_write(0xb8, 0x8002, 2); /* output control */
  328. mdelay(1);
  329. toshiba_spi_write(0x10, 0x00, 1); /* sleep mode in */
  330. mdelay(85); /* wait 85 msec */
  331. toshiba_spi_write(0xb0, 0x00, 1); /* deep standby in */
  332. mdelay(1);
  333. if (lcdc_toshiba_pdata->panel_config_gpio)
  334. lcdc_toshiba_pdata->panel_config_gpio(0);
  335. toshiba_state.display_on = FALSE;
  336. toshiba_state.disp_initialized = FALSE;
  337. }
  338. return 0;
  339. }
  340. static void lcdc_toshiba_set_backlight(struct msm_fb_data_type *mfd)
  341. {
  342. int bl_level;
  343. int ret = -EPERM;
  344. int i = 0;
  345. bl_level = mfd->bl_level;
  346. while (i++ < 3) {
  347. ret = pmic_set_led_intensity(LED_LCD, bl_level);
  348. if (ret == 0)
  349. return;
  350. msleep(10);
  351. }
  352. printk(KERN_WARNING "%s: can't set lcd backlight!\n",
  353. __func__);
  354. }
  355. static int __devinit toshiba_probe(struct platform_device *pdev)
  356. {
  357. if (pdev->id == 0) {
  358. lcdc_toshiba_pdata = pdev->dev.platform_data;
  359. #ifndef CONFIG_SPI_QSD
  360. spi_pin_assign();
  361. #endif
  362. return 0;
  363. }
  364. msm_fb_add_device(pdev);
  365. return 0;
  366. }
  367. #ifdef CONFIG_SPI_QSD
  368. static int __devinit lcdc_toshiba_spi_probe(struct spi_device *spi)
  369. {
  370. lcdc_toshiba_spi_client = spi;
  371. lcdc_toshiba_spi_client->bits_per_word = 32;
  372. return 0;
  373. }
  374. static int __devexit lcdc_toshiba_spi_remove(struct spi_device *spi)
  375. {
  376. lcdc_toshiba_spi_client = NULL;
  377. return 0;
  378. }
  379. static struct spi_driver lcdc_toshiba_spi_driver = {
  380. .driver = {
  381. .name = LCDC_TOSHIBA_SPI_DEVICE_NAME,
  382. .owner = THIS_MODULE,
  383. },
  384. .probe = lcdc_toshiba_spi_probe,
  385. .remove = __devexit_p(lcdc_toshiba_spi_remove),
  386. };
  387. #endif
  388. static struct platform_driver this_driver = {
  389. .probe = toshiba_probe,
  390. .driver = {
  391. .name = "lcdc_toshiba_wvga",
  392. },
  393. };
  394. static struct msm_fb_panel_data toshiba_panel_data = {
  395. .on = lcdc_toshiba_panel_on,
  396. .off = lcdc_toshiba_panel_off,
  397. .set_backlight = lcdc_toshiba_set_backlight,
  398. };
  399. static struct platform_device this_device = {
  400. .name = "lcdc_toshiba_wvga",
  401. .id = 1,
  402. .dev = {
  403. .platform_data = &toshiba_panel_data,
  404. }
  405. };
  406. static int __init lcdc_toshiba_panel_init(void)
  407. {
  408. int ret;
  409. struct msm_panel_info *pinfo;
  410. #ifdef CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM
  411. if (mddi_get_client_id() != 0)
  412. return 0;
  413. ret = msm_fb_detect_client("lcdc_toshiba_wvga_pt");
  414. if (ret)
  415. return 0;
  416. #endif
  417. ret = platform_driver_register(&this_driver);
  418. if (ret)
  419. return ret;
  420. pinfo = &toshiba_panel_data.panel_info;
  421. pinfo->xres = 480;
  422. pinfo->yres = 800;
  423. MSM_FB_SINGLE_MODE_PANEL(pinfo);
  424. pinfo->type = LCDC_PANEL;
  425. pinfo->pdest = DISPLAY_1;
  426. pinfo->wait_cycle = 0;
  427. pinfo->bpp = 18;
  428. pinfo->fb_num = 2;
  429. /* 30Mhz mdp_lcdc_pclk and mdp_lcdc_pad_pcl */
  430. pinfo->clk_rate = 30720000;
  431. pinfo->bl_max = 15;
  432. pinfo->bl_min = 1;
  433. pinfo->lcdc.h_back_porch = 184; /* hsw = 8 + hbp=184 */
  434. pinfo->lcdc.h_front_porch = 4;
  435. pinfo->lcdc.h_pulse_width = 8;
  436. pinfo->lcdc.v_back_porch = 2; /* vsw=1 + vbp = 2 */
  437. pinfo->lcdc.v_front_porch = 3;
  438. pinfo->lcdc.v_pulse_width = 1;
  439. pinfo->lcdc.border_clr = 0; /* blk */
  440. pinfo->lcdc.underflow_clr = 0xff; /* blue */
  441. pinfo->lcdc.hsync_skew = 0;
  442. ret = platform_device_register(&this_device);
  443. if (ret) {
  444. printk(KERN_ERR "%s not able to register the device\n",
  445. __func__);
  446. goto fail_driver;
  447. }
  448. #ifdef CONFIG_SPI_QSD
  449. ret = spi_register_driver(&lcdc_toshiba_spi_driver);
  450. if (ret) {
  451. printk(KERN_ERR "%s not able to register spi\n", __func__);
  452. goto fail_device;
  453. }
  454. #endif
  455. return ret;
  456. #ifdef CONFIG_SPI_QSD
  457. fail_device:
  458. platform_device_unregister(&this_device);
  459. #endif
  460. fail_driver:
  461. platform_driver_unregister(&this_driver);
  462. return ret;
  463. }
  464. device_initcall(lcdc_toshiba_panel_init);