lcdc_nt35582_wvga.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473
  1. /* Copyright (c) 2011, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #define pr_fmt(fmt) "%s: " fmt, __func__
  14. #include <linux/delay.h>
  15. #include <linux/module.h>
  16. #ifdef CONFIG_SPI_QUP
  17. #include <linux/spi/spi.h>
  18. #endif
  19. #include <mach/gpio.h>
  20. #include <mach/pmic.h>
  21. #include "msm_fb.h"
  22. #define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
  23. #define WRITE_FIRST_TRANS 0x20
  24. #define WRITE_SECOND_TRANS 0x00
  25. #define WRITE_THIRD_TRANS 0x40
  26. #define READ_FIRST_TRANS 0x20
  27. #define READ_SECOND_TRANS 0x00
  28. #define READ_THIRD_TRANS 0xC0
  29. #ifdef CONFIG_SPI_QUP
  30. #define LCDC_NT35582_SPI_DEVICE_NAME "lcdc_nt35582_spi"
  31. static struct spi_device *spi_client;
  32. #endif
  33. struct nt35582_state_type {
  34. boolean display_on;
  35. int bl_level;
  36. };
  37. static struct nt35582_state_type nt35582_state = { 0 };
  38. static int gpio_backlight_en;
  39. static struct msm_panel_common_pdata *lcdc_nt35582_pdata;
  40. static int spi_write_2bytes(struct spi_device *spi,
  41. unsigned char reg_high_addr, unsigned char reg_low_addr)
  42. {
  43. char tx_buf[4];
  44. int rc;
  45. struct spi_message m;
  46. struct spi_transfer t;
  47. memset(&t, 0, sizeof t);
  48. t.tx_buf = tx_buf;
  49. spi_setup(spi);
  50. spi_message_init(&m);
  51. spi_message_add_tail(&t, &m);
  52. tx_buf[0] = WRITE_FIRST_TRANS;
  53. tx_buf[1] = reg_high_addr;
  54. tx_buf[2] = WRITE_SECOND_TRANS;
  55. tx_buf[3] = reg_low_addr;
  56. t.rx_buf = NULL;
  57. t.len = 4;
  58. t.bits_per_word = 16;
  59. rc = spi_sync(spi, &m);
  60. if (rc)
  61. pr_err("write spi command failed!\n");
  62. return rc;
  63. }
  64. static int spi_write_3bytes(struct spi_device *spi, unsigned char reg_high_addr,
  65. unsigned char reg_low_addr, unsigned char write_data)
  66. {
  67. char tx_buf[6];
  68. int rc;
  69. struct spi_message m;
  70. struct spi_transfer t;
  71. memset(&t, 0, sizeof t);
  72. t.tx_buf = tx_buf;
  73. spi_setup(spi);
  74. spi_message_init(&m);
  75. spi_message_add_tail(&t, &m);
  76. tx_buf[0] = WRITE_FIRST_TRANS;
  77. tx_buf[1] = reg_high_addr;
  78. tx_buf[2] = WRITE_SECOND_TRANS;
  79. tx_buf[3] = reg_low_addr;
  80. tx_buf[4] = WRITE_THIRD_TRANS;
  81. tx_buf[5] = write_data;
  82. t.rx_buf = NULL;
  83. t.len = 6;
  84. t.bits_per_word = 16;
  85. rc = spi_sync(spi, &m);
  86. if (rc)
  87. pr_err("write spi command failed!\n");
  88. return rc;
  89. }
  90. static int spi_read_bytes(struct spi_device *spi, unsigned char reg_high_addr,
  91. unsigned char reg_low_addr, unsigned char *read_value)
  92. {
  93. char tx_buf[6];
  94. char rx_buf[6];
  95. int rc;
  96. struct spi_message m;
  97. struct spi_transfer t;
  98. memset(&t, 0, sizeof t);
  99. t.tx_buf = tx_buf;
  100. spi_setup(spi);
  101. spi_message_init(&m);
  102. spi_message_add_tail(&t, &m);
  103. tx_buf[0] = READ_FIRST_TRANS;
  104. tx_buf[1] = reg_high_addr;
  105. tx_buf[2] = READ_SECOND_TRANS;
  106. tx_buf[3] = reg_low_addr;
  107. tx_buf[4] = READ_THIRD_TRANS;
  108. tx_buf[5] = 0x00;
  109. t.rx_buf = rx_buf;
  110. t.len = 6;
  111. t.bits_per_word = 16;
  112. rc = spi_sync(spi, &m);
  113. if (rc)
  114. pr_err("write spi command failed!\n");
  115. else
  116. *read_value = rx_buf[5];
  117. return rc;
  118. }
  119. static void nt35582_disp_on(void)
  120. {
  121. uint32 panel_id1 = 0, panel_id2 = 0;
  122. if (!nt35582_state.display_on) {
  123. /* GVDD setting */
  124. spi_write_3bytes(spi_client, 0xC0, 0x00, 0xC0);
  125. spi_write_3bytes(spi_client, 0xC0, 0x01, 0x00);
  126. spi_write_3bytes(spi_client, 0xC0, 0x02, 0xC0);
  127. spi_write_3bytes(spi_client, 0xC0, 0x03, 0x00);
  128. /* Power setting */
  129. spi_write_3bytes(spi_client, 0xC1, 0x00, 0x40);
  130. spi_write_3bytes(spi_client, 0xC2, 0x00, 0x21);
  131. spi_write_3bytes(spi_client, 0xC2, 0x02, 0x02);
  132. /* Gamma setting */
  133. spi_write_3bytes(spi_client, 0xE0, 0x00, 0x0E);
  134. spi_write_3bytes(spi_client, 0xE0, 0x01, 0x54);
  135. spi_write_3bytes(spi_client, 0xE0, 0x02, 0x63);
  136. spi_write_3bytes(spi_client, 0xE0, 0x03, 0x76);
  137. spi_write_3bytes(spi_client, 0xE0, 0x04, 0x1F);
  138. spi_write_3bytes(spi_client, 0xE0, 0x05, 0x31);
  139. spi_write_3bytes(spi_client, 0xE0, 0x06, 0x62);
  140. spi_write_3bytes(spi_client, 0xE0, 0x07, 0x78);
  141. spi_write_3bytes(spi_client, 0xE0, 0x08, 0x1F);
  142. spi_write_3bytes(spi_client, 0xE0, 0x09, 0x25);
  143. spi_write_3bytes(spi_client, 0xE0, 0x0A, 0xB3);
  144. spi_write_3bytes(spi_client, 0xE0, 0x0B, 0x17);
  145. spi_write_3bytes(spi_client, 0xE0, 0x0C, 0x38);
  146. spi_write_3bytes(spi_client, 0xE0, 0x0D, 0x5A);
  147. spi_write_3bytes(spi_client, 0xE0, 0x0E, 0xA2);
  148. spi_write_3bytes(spi_client, 0xE0, 0x0F, 0xA2);
  149. spi_write_3bytes(spi_client, 0xE0, 0x10, 0x24);
  150. spi_write_3bytes(spi_client, 0xE0, 0x11, 0x57);
  151. spi_write_3bytes(spi_client, 0xE1, 0x00, 0x0E);
  152. spi_write_3bytes(spi_client, 0xE1, 0x01, 0x54);
  153. spi_write_3bytes(spi_client, 0xE1, 0x02, 0x63);
  154. spi_write_3bytes(spi_client, 0xE1, 0x03, 0x76);
  155. spi_write_3bytes(spi_client, 0xE1, 0x04, 0x1F);
  156. spi_write_3bytes(spi_client, 0xE1, 0x05, 0x31);
  157. spi_write_3bytes(spi_client, 0xE1, 0x06, 0X62);
  158. spi_write_3bytes(spi_client, 0xE1, 0x07, 0x78);
  159. spi_write_3bytes(spi_client, 0xE1, 0x08, 0x1F);
  160. spi_write_3bytes(spi_client, 0xE1, 0x09, 0x25);
  161. spi_write_3bytes(spi_client, 0xE1, 0x0A, 0xB3);
  162. spi_write_3bytes(spi_client, 0xE1, 0x0B, 0x17);
  163. spi_write_3bytes(spi_client, 0xE1, 0x0C, 0x38);
  164. spi_write_3bytes(spi_client, 0xE1, 0x0D, 0x5A);
  165. spi_write_3bytes(spi_client, 0xE1, 0x0E, 0xA2);
  166. spi_write_3bytes(spi_client, 0xE1, 0x0F, 0xA2);
  167. spi_write_3bytes(spi_client, 0xE1, 0x10, 0x24);
  168. spi_write_3bytes(spi_client, 0xE1, 0x11, 0x57);
  169. spi_write_3bytes(spi_client, 0xE2, 0x00, 0x0E);
  170. spi_write_3bytes(spi_client, 0xE2, 0x01, 0x54);
  171. spi_write_3bytes(spi_client, 0xE2, 0x02, 0x63);
  172. spi_write_3bytes(spi_client, 0xE2, 0x03, 0x76);
  173. spi_write_3bytes(spi_client, 0xE2, 0x04, 0x1F);
  174. spi_write_3bytes(spi_client, 0xE2, 0x05, 0x31);
  175. spi_write_3bytes(spi_client, 0xE2, 0x06, 0x62);
  176. spi_write_3bytes(spi_client, 0xE2, 0x07, 0x78);
  177. spi_write_3bytes(spi_client, 0xE2, 0x08, 0x1F);
  178. spi_write_3bytes(spi_client, 0xE2, 0x09, 0x25);
  179. spi_write_3bytes(spi_client, 0xE2, 0x0A, 0xB3);
  180. spi_write_3bytes(spi_client, 0xE2, 0x0B, 0x17);
  181. spi_write_3bytes(spi_client, 0xE2, 0x0C, 0x38);
  182. spi_write_3bytes(spi_client, 0xE2, 0x0D, 0x5A);
  183. spi_write_3bytes(spi_client, 0xE2, 0x0E, 0xA2);
  184. spi_write_3bytes(spi_client, 0xE2, 0x0F, 0xA2);
  185. spi_write_3bytes(spi_client, 0xE2, 0x10, 0x24);
  186. spi_write_3bytes(spi_client, 0xE2, 0x11, 0x57);
  187. spi_write_3bytes(spi_client, 0xE3, 0x00, 0x0E);
  188. spi_write_3bytes(spi_client, 0xE3, 0x01, 0x54);
  189. spi_write_3bytes(spi_client, 0xE3, 0x02, 0x63);
  190. spi_write_3bytes(spi_client, 0xE3, 0x03, 0x76);
  191. spi_write_3bytes(spi_client, 0xE3, 0x04, 0x1F);
  192. spi_write_3bytes(spi_client, 0xE3, 0x05, 0x31);
  193. spi_write_3bytes(spi_client, 0xE3, 0x06, 0x62);
  194. spi_write_3bytes(spi_client, 0xE3, 0x07, 0x78);
  195. spi_write_3bytes(spi_client, 0xE3, 0x08, 0x1F);
  196. spi_write_3bytes(spi_client, 0xE3, 0x09, 0x25);
  197. spi_write_3bytes(spi_client, 0xE3, 0x0A, 0xB3);
  198. spi_write_3bytes(spi_client, 0xE3, 0x0B, 0x17);
  199. spi_write_3bytes(spi_client, 0xE3, 0x0C, 0x38);
  200. spi_write_3bytes(spi_client, 0xE3, 0x0D, 0x5A);
  201. spi_write_3bytes(spi_client, 0xE3, 0x0E, 0xA2);
  202. spi_write_3bytes(spi_client, 0xE3, 0x0F, 0xA2);
  203. spi_write_3bytes(spi_client, 0xE3, 0x10, 0x24);
  204. spi_write_3bytes(spi_client, 0xE3, 0x11, 0x57);
  205. spi_write_3bytes(spi_client, 0xE4, 0x00, 0x48);
  206. spi_write_3bytes(spi_client, 0xE4, 0x01, 0x6B);
  207. spi_write_3bytes(spi_client, 0xE4, 0x02, 0x84);
  208. spi_write_3bytes(spi_client, 0xE4, 0x03, 0x9B);
  209. spi_write_3bytes(spi_client, 0xE4, 0x04, 0x1F);
  210. spi_write_3bytes(spi_client, 0xE4, 0x05, 0x31);
  211. spi_write_3bytes(spi_client, 0xE4, 0x06, 0x62);
  212. spi_write_3bytes(spi_client, 0xE4, 0x07, 0x78);
  213. spi_write_3bytes(spi_client, 0xE4, 0x08, 0x1F);
  214. spi_write_3bytes(spi_client, 0xE4, 0x09, 0x25);
  215. spi_write_3bytes(spi_client, 0xE4, 0x0A, 0xB3);
  216. spi_write_3bytes(spi_client, 0xE4, 0x0B, 0x17);
  217. spi_write_3bytes(spi_client, 0xE4, 0x0C, 0x38);
  218. spi_write_3bytes(spi_client, 0xE4, 0x0D, 0x5A);
  219. spi_write_3bytes(spi_client, 0xE4, 0x0E, 0xA2);
  220. spi_write_3bytes(spi_client, 0xE4, 0x0F, 0xA2);
  221. spi_write_3bytes(spi_client, 0xE4, 0x10, 0x24);
  222. spi_write_3bytes(spi_client, 0xE4, 0x11, 0x57);
  223. spi_write_3bytes(spi_client, 0xE5, 0x00, 0x48);
  224. spi_write_3bytes(spi_client, 0xE5, 0x01, 0x6B);
  225. spi_write_3bytes(spi_client, 0xE5, 0x02, 0x84);
  226. spi_write_3bytes(spi_client, 0xE5, 0x03, 0x9B);
  227. spi_write_3bytes(spi_client, 0xE5, 0x04, 0x1F);
  228. spi_write_3bytes(spi_client, 0xE5, 0x05, 0x31);
  229. spi_write_3bytes(spi_client, 0xE5, 0x06, 0x62);
  230. spi_write_3bytes(spi_client, 0xE5, 0x07, 0x78);
  231. spi_write_3bytes(spi_client, 0xE5, 0x08, 0x1F);
  232. spi_write_3bytes(spi_client, 0xE5, 0x09, 0x25);
  233. spi_write_3bytes(spi_client, 0xE5, 0x0A, 0xB3);
  234. spi_write_3bytes(spi_client, 0xE5, 0x0B, 0x17);
  235. spi_write_3bytes(spi_client, 0xE5, 0x0C, 0x38);
  236. spi_write_3bytes(spi_client, 0xE5, 0x0D, 0x5A);
  237. spi_write_3bytes(spi_client, 0xE5, 0x0E, 0xA2);
  238. spi_write_3bytes(spi_client, 0xE5, 0x0F, 0xA2);
  239. spi_write_3bytes(spi_client, 0xE5, 0x10, 0x24);
  240. spi_write_3bytes(spi_client, 0xE5, 0x11, 0x57);
  241. /* Data format setting */
  242. spi_write_3bytes(spi_client, 0x3A, 0x00, 0x70);
  243. /* Reverse PCLK signal of LCM to meet Qualcomm's platform */
  244. spi_write_3bytes(spi_client, 0x3B, 0x00, 0x2B);
  245. /* Scan direstion setting */
  246. spi_write_3bytes(spi_client, 0x36, 0x00, 0x00);
  247. /* Sleep out */
  248. spi_write_2bytes(spi_client, 0x11, 0x00);
  249. msleep(120);
  250. /* Display on */
  251. spi_write_2bytes(spi_client, 0x29, 0x00);
  252. pr_info("%s: LCM SPI display on CMD finished...\n", __func__);
  253. msleep(200);
  254. nt35582_state.display_on = TRUE;
  255. }
  256. /* Test to read RDDID. It should be 0x0055h and 0x0082h */
  257. spi_read_bytes(spi_client, 0x10, 0x80, (unsigned char *)&panel_id1);
  258. spi_read_bytes(spi_client, 0x11, 0x80, (unsigned char *)&panel_id2);
  259. pr_info(KERN_INFO "nt35582_disp_on: LCM_ID=[0x%x, 0x%x]\n",
  260. panel_id1, panel_id2);
  261. }
  262. static int lcdc_nt35582_panel_on(struct platform_device *pdev)
  263. {
  264. nt35582_disp_on();
  265. return 0;
  266. }
  267. static int lcdc_nt35582_panel_off(struct platform_device *pdev)
  268. {
  269. nt35582_state.display_on = FALSE;
  270. return 0;
  271. }
  272. static void lcdc_nt35582_set_backlight(struct msm_fb_data_type *mfd)
  273. {
  274. int bl_level;
  275. int i = 0, step = 0;
  276. bl_level = mfd->bl_level;
  277. if (bl_level == nt35582_state.bl_level)
  278. return;
  279. else
  280. nt35582_state.bl_level = bl_level;
  281. if (bl_level == 0) {
  282. gpio_set_value_cansleep(gpio_backlight_en, 0);
  283. return;
  284. }
  285. /* Level:0~31 mapping to step 32~1 */
  286. step = 32 - bl_level;
  287. for (i = 0; i < step; i++) {
  288. gpio_set_value_cansleep(gpio_backlight_en, 0);
  289. ndelay(5);
  290. gpio_set_value_cansleep(gpio_backlight_en, 1);
  291. ndelay(5);
  292. }
  293. }
  294. static int __devinit nt35582_probe(struct platform_device *pdev)
  295. {
  296. if (pdev->id == 0) {
  297. lcdc_nt35582_pdata = pdev->dev.platform_data;
  298. return 0;
  299. }
  300. gpio_backlight_en = *(lcdc_nt35582_pdata->gpio_num);
  301. msm_fb_add_device(pdev);
  302. return 0;
  303. }
  304. #ifdef CONFIG_SPI_QUP
  305. static int __devinit lcdc_nt35582_spi_probe(struct spi_device *spi)
  306. {
  307. spi_client = spi;
  308. spi_client->bits_per_word = 16;
  309. spi_client->chip_select = 0;
  310. spi_client->max_speed_hz = 1100000;
  311. spi_client->mode = SPI_MODE_0;
  312. spi_setup(spi_client);
  313. return 0;
  314. }
  315. static int __devexit lcdc_nt35582_spi_remove(struct spi_device *spi)
  316. {
  317. spi_client = NULL;
  318. return 0;
  319. }
  320. static struct spi_driver lcdc_nt35582_spi_driver = {
  321. .driver = {
  322. .name = LCDC_NT35582_SPI_DEVICE_NAME,
  323. .owner = THIS_MODULE,
  324. },
  325. .probe = lcdc_nt35582_spi_probe,
  326. .remove = __devexit_p(lcdc_nt35582_spi_remove),
  327. };
  328. #endif
  329. static struct platform_driver this_driver = {
  330. .probe = nt35582_probe,
  331. .driver = {
  332. .name = LCDC_NT35582_PANEL_NAME,
  333. },
  334. };
  335. static struct msm_fb_panel_data nt35582_panel_data = {
  336. .on = lcdc_nt35582_panel_on,
  337. .off = lcdc_nt35582_panel_off,
  338. .set_backlight = lcdc_nt35582_set_backlight,
  339. };
  340. static struct platform_device this_device = {
  341. .name = LCDC_NT35582_PANEL_NAME,
  342. .id = 1,
  343. .dev = {
  344. .platform_data = &nt35582_panel_data,
  345. }
  346. };
  347. static int __init lcdc_nt35582_panel_init(void)
  348. {
  349. int ret;
  350. struct msm_panel_info *pinfo;
  351. #ifdef CONFIG_FB_MSM_LCDC_AUTO_DETECT
  352. if (msm_fb_detect_client(LCDC_NT35582_PANEL_NAME)) {
  353. pr_err("detect failed\n");
  354. return 0;
  355. }
  356. #endif
  357. ret = platform_driver_register(&this_driver);
  358. if (ret) {
  359. pr_err("Fails to platform_driver_register...\n");
  360. return ret;
  361. }
  362. pinfo = &nt35582_panel_data.panel_info;
  363. pinfo->xres = 480;
  364. pinfo->yres = 800;
  365. MSM_FB_SINGLE_MODE_PANEL(pinfo);
  366. pinfo->type = LCDC_PANEL;
  367. pinfo->pdest = DISPLAY_1;
  368. pinfo->wait_cycle = 0;
  369. pinfo->bpp = 24;
  370. pinfo->fb_num = 2;
  371. pinfo->clk_rate = 25600000;
  372. pinfo->bl_max = 31;
  373. pinfo->bl_min = 1;
  374. pinfo->lcdc.h_back_porch = 10; /* hsw = 8 + hbp=184 */
  375. pinfo->lcdc.h_front_porch = 10;
  376. pinfo->lcdc.h_pulse_width = 2;
  377. pinfo->lcdc.v_back_porch = 4; /* vsw=1 + vbp = 2 */
  378. pinfo->lcdc.v_front_porch = 10;
  379. pinfo->lcdc.v_pulse_width = 2;
  380. pinfo->lcdc.border_clr = 0; /* blk */
  381. pinfo->lcdc.underflow_clr = 0xff; /* blue */
  382. pinfo->lcdc.hsync_skew = 0;
  383. ret = platform_device_register(&this_device);
  384. if (ret) {
  385. pr_err("not able to register the device\n");
  386. goto fail_driver;
  387. }
  388. #ifdef CONFIG_SPI_QUP
  389. ret = spi_register_driver(&lcdc_nt35582_spi_driver);
  390. if (ret) {
  391. pr_err("not able to register spi\n");
  392. goto fail_device;
  393. }
  394. #endif
  395. return ret;
  396. #ifdef CONFIG_SPI_QUP
  397. fail_device:
  398. platform_device_unregister(&this_device);
  399. #endif
  400. fail_driver:
  401. platform_driver_unregister(&this_driver);
  402. return ret;
  403. }
  404. device_initcall(lcdc_nt35582_panel_init);