adv7520.c 25 KB

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  1. /* Copyright (c) 2010,2012, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/i2c.h>
  13. #include <linux/types.h>
  14. #include <linux/bitops.h>
  15. #include <linux/adv7520.h>
  16. #include <linux/time.h>
  17. #include <linux/completion.h>
  18. #include <linux/wakelock.h>
  19. #include <linux/clk.h>
  20. #include <linux/pm_qos.h>
  21. #include <asm/atomic.h>
  22. #include <mach/cpuidle.h>
  23. #include "msm_fb.h"
  24. #define DEBUG
  25. #define DEV_DBG_PREFIX "HDMI: "
  26. #include "external_common.h"
  27. /* #define PORT_DEBUG */
  28. /* #define TESTING_FORCE_480p */
  29. #define HPD_DUTY_CYCLE 4 /*secs*/
  30. static struct external_common_state_type hdmi_common;
  31. static struct i2c_client *hclient;
  32. static struct clk *tv_enc_clk;
  33. static bool chip_power_on = FALSE; /* For chip power on/off */
  34. static bool enable_5v_on = FALSE;
  35. static bool hpd_power_on = FALSE;
  36. static atomic_t comm_power_on; /* For dtv power on/off (I2C) */
  37. static int suspend_count;
  38. static u8 reg[256]; /* HDMI panel registers */
  39. struct hdmi_data {
  40. struct msm_hdmi_platform_data *pd;
  41. struct work_struct isr_work;
  42. };
  43. static struct hdmi_data *dd;
  44. static struct work_struct hpd_timer_work;
  45. #ifdef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  46. static struct work_struct hdcp_handle_work;
  47. static int hdcp_activating;
  48. static DEFINE_MUTEX(hdcp_state_mutex);
  49. static int has_hdcp_hw_support = true;
  50. #endif
  51. static struct timer_list hpd_timer;
  52. static struct timer_list hpd_duty_timer;
  53. static struct work_struct hpd_duty_work;
  54. static unsigned int monitor_sense;
  55. static boolean hpd_cable_chg_detected;
  56. static struct pm_qos_request pm_qos_req;
  57. /* Change HDMI state */
  58. static void change_hdmi_state(int online)
  59. {
  60. if (!external_common_state)
  61. return;
  62. mutex_lock(&external_common_state_hpd_mutex);
  63. external_common_state->hpd_state = online;
  64. mutex_unlock(&external_common_state_hpd_mutex);
  65. if (!external_common_state->uevent_kobj)
  66. return;
  67. if (online) {
  68. kobject_uevent(external_common_state->uevent_kobj,
  69. KOBJ_ONLINE);
  70. switch_set_state(&external_common_state->sdev, 1);
  71. } else {
  72. kobject_uevent(external_common_state->uevent_kobj,
  73. KOBJ_OFFLINE);
  74. switch_set_state(&external_common_state->sdev, 0);
  75. }
  76. DEV_INFO("adv7520_uevent: %d [suspend# %d]\n", online, suspend_count);
  77. }
  78. /*
  79. * Read a value from a register on ADV7520 device
  80. * If sucessfull returns value read , otherwise error.
  81. */
  82. static u8 adv7520_read_reg(struct i2c_client *client, u8 reg)
  83. {
  84. int err;
  85. struct i2c_msg msg[2];
  86. u8 reg_buf[] = { reg };
  87. u8 data_buf[] = { 0 };
  88. if (!client->adapter)
  89. return -ENODEV;
  90. if (!atomic_read(&comm_power_on)) {
  91. DEV_WARN("%s: WARN: missing GPIO power\n", __func__);
  92. return -ENODEV;
  93. }
  94. msg[0].addr = client->addr;
  95. msg[0].flags = 0;
  96. msg[0].len = 1;
  97. msg[0].buf = reg_buf;
  98. msg[1].addr = client->addr;
  99. msg[1].flags = I2C_M_RD;
  100. msg[1].len = 1;
  101. msg[1].buf = data_buf;
  102. err = i2c_transfer(client->adapter, msg, 2);
  103. if (err < 0) {
  104. DEV_INFO("%s: I2C err: %d\n", __func__, err);
  105. return err;
  106. }
  107. #ifdef PORT_DEBUG
  108. DEV_INFO("HDMI[%02x] [R] %02x\n", reg, data);
  109. #endif
  110. return *data_buf;
  111. }
  112. /*
  113. * Write a value to a register on adv7520 device.
  114. * Returns zero if successful, or non-zero otherwise.
  115. */
  116. static int adv7520_write_reg(struct i2c_client *client, u8 reg, u8 val)
  117. {
  118. int err;
  119. struct i2c_msg msg[1];
  120. unsigned char data[2];
  121. if (!client->adapter)
  122. return -ENODEV;
  123. if (!atomic_read(&comm_power_on)) {
  124. DEV_WARN("%s: WARN: missing GPIO power\n", __func__);
  125. return -ENODEV;
  126. }
  127. msg->addr = client->addr;
  128. msg->flags = 0;
  129. msg->len = 2;
  130. msg->buf = data;
  131. data[0] = reg;
  132. data[1] = val;
  133. err = i2c_transfer(client->adapter, msg, 1);
  134. if (err >= 0)
  135. return 0;
  136. #ifdef PORT_DEBUG
  137. DEV_INFO("HDMI[%02x] [W] %02x [%d]\n", reg, val, err);
  138. #endif
  139. return err;
  140. }
  141. #ifdef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  142. static void adv7520_close_hdcp_link(void)
  143. {
  144. if (!external_common_state->hdcp_active && !hdcp_activating)
  145. return;
  146. DEV_INFO("HDCP: Close link\n");
  147. reg[0xD5] = adv7520_read_reg(hclient, 0xD5);
  148. reg[0xD5] &= 0xFE;
  149. adv7520_write_reg(hclient, 0xD5, (u8)reg[0xD5]);
  150. reg[0x16] = adv7520_read_reg(hclient, 0x16);
  151. reg[0x16] &= 0xFE;
  152. adv7520_write_reg(hclient, 0x16, (u8)reg[0x16]);
  153. /* UnMute Audio */
  154. adv7520_write_reg(hclient, 0x0C, (u8)0x84);
  155. external_common_state->hdcp_active = FALSE;
  156. mutex_lock(&hdcp_state_mutex);
  157. hdcp_activating = FALSE;
  158. mutex_unlock(&hdcp_state_mutex);
  159. }
  160. static void adv7520_comm_power(int on, int show);
  161. static void adv7520_hdcp_enable(struct work_struct *work)
  162. {
  163. DEV_INFO("HDCP: Start reg[0xaf]=%02x (mute audio)\n", reg[0xaf]);
  164. adv7520_comm_power(1, 1);
  165. /* Mute Audio */
  166. adv7520_write_reg(hclient, 0x0C, (u8)0xC3);
  167. msleep(200);
  168. /* Wait for BKSV ready interrupt */
  169. /* Read BKSV's keys from HDTV */
  170. reg[0xBF] = adv7520_read_reg(hclient, 0xBF);
  171. reg[0xC0] = adv7520_read_reg(hclient, 0xC0);
  172. reg[0xC1] = adv7520_read_reg(hclient, 0xC1);
  173. reg[0xC2] = adv7520_read_reg(hclient, 0xC2);
  174. reg[0xc3] = adv7520_read_reg(hclient, 0xC3);
  175. DEV_DBG("HDCP: BKSV={%02x,%02x,%02x,%02x,%02x}\n", reg[0xbf], reg[0xc0],
  176. reg[0xc1], reg[0xc2], reg[0xc3]);
  177. /* Is SINK repeater */
  178. reg[0xBE] = adv7520_read_reg(hclient, 0xBE);
  179. if (~(reg[0xBE] & 0x40)) {
  180. ; /* compare with revocation list */
  181. /* Check 20 1's and 20 zero's */
  182. } else {
  183. /* Don't implement HDCP if sink as a repeater */
  184. adv7520_write_reg(hclient, 0x0C, (u8)0x84);
  185. mutex_lock(&hdcp_state_mutex);
  186. hdcp_activating = FALSE;
  187. mutex_unlock(&hdcp_state_mutex);
  188. DEV_WARN("HDCP: Sink Repeater (%02x), (unmute audio)\n",
  189. reg[0xbe]);
  190. adv7520_comm_power(0, 1);
  191. return;
  192. }
  193. msleep(200);
  194. reg[0xB8] = adv7520_read_reg(hclient, 0xB8);
  195. DEV_INFO("HDCP: Status reg[0xB8] is %02x\n", reg[0xb8]);
  196. if (reg[0xb8] & 0x40) {
  197. /* UnMute Audio */
  198. adv7520_write_reg(hclient, 0x0C, (u8)0x84);
  199. DEV_INFO("HDCP: A/V content Encrypted (unmute audio)\n");
  200. external_common_state->hdcp_active = TRUE;
  201. }
  202. adv7520_comm_power(0, 1);
  203. mutex_lock(&hdcp_state_mutex);
  204. hdcp_activating = FALSE;
  205. mutex_unlock(&hdcp_state_mutex);
  206. }
  207. #endif
  208. static int adv7520_read_edid_block(int block, uint8 *edid_buf)
  209. {
  210. u8 r = 0;
  211. int ret;
  212. struct i2c_msg msg[] = {
  213. { .addr = reg[0x43] >> 1,
  214. .flags = 0,
  215. .len = 1,
  216. .buf = &r },
  217. { .addr = reg[0x43] >> 1,
  218. .flags = I2C_M_RD,
  219. .len = 0x100,
  220. .buf = edid_buf } };
  221. if (block > 0)
  222. return 0;
  223. ret = i2c_transfer(hclient->adapter, msg, 2);
  224. DEV_DBG("EDID block: addr=%02x, ret=%d\n", reg[0x43] >> 1, ret);
  225. return (ret < 2) ? -ENODEV : 0;
  226. }
  227. static void adv7520_read_edid(void)
  228. {
  229. external_common_state->read_edid_block = adv7520_read_edid_block;
  230. if (hdmi_common_read_edid()) {
  231. u8 timeout;
  232. DEV_INFO("%s: retry\n", __func__);
  233. adv7520_write_reg(hclient, 0xc9, 0x13);
  234. msleep(500);
  235. timeout = (adv7520_read_reg(hclient, 0x96) & (1 << 2));
  236. if (timeout) {
  237. hdmi_common_read_edid();
  238. }
  239. }
  240. }
  241. static void adv7520_chip_on(void)
  242. {
  243. if (!chip_power_on) {
  244. /* Get the current register holding the power bit. */
  245. unsigned long reg0xaf = adv7520_read_reg(hclient, 0xaf);
  246. dd->pd->core_power(1, 1);
  247. /* Set the HDMI select bit. */
  248. set_bit(1, &reg0xaf);
  249. DEV_INFO("%s: turn on chip power\n", __func__);
  250. adv7520_write_reg(hclient, 0x41, 0x10);
  251. adv7520_write_reg(hclient, 0xaf, (u8)reg0xaf);
  252. chip_power_on = TRUE;
  253. } else
  254. DEV_INFO("%s: chip already has power\n", __func__);
  255. }
  256. static void adv7520_chip_off(void)
  257. {
  258. if (chip_power_on) {
  259. #ifdef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  260. if (has_hdcp_hw_support)
  261. adv7520_close_hdcp_link();
  262. #endif
  263. DEV_INFO("%s: turn off chip power\n", __func__);
  264. adv7520_write_reg(hclient, 0x41, 0x50);
  265. dd->pd->core_power(0, 1);
  266. chip_power_on = FALSE;
  267. } else
  268. DEV_INFO("%s: chip is already off\n", __func__);
  269. monitor_sense = 0;
  270. hpd_cable_chg_detected = FALSE;
  271. if (enable_5v_on) {
  272. dd->pd->enable_5v(0);
  273. enable_5v_on = FALSE;
  274. }
  275. }
  276. /* Power ON/OFF ADV7520 chip */
  277. static void adv7520_isr_w(struct work_struct *work);
  278. static void adv7520_comm_power(int on, int show)
  279. {
  280. if (!on)
  281. atomic_dec(&comm_power_on);
  282. dd->pd->comm_power(on, 0/*show*/);
  283. if (on)
  284. atomic_inc(&comm_power_on);
  285. }
  286. #ifdef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  287. static void adv7520_start_hdcp(void);
  288. #endif
  289. static int adv7520_power_on(struct platform_device *pdev)
  290. {
  291. struct msm_fb_data_type *mfd = platform_get_drvdata(pdev);
  292. clk_prepare_enable(tv_enc_clk);
  293. external_common_state->dev = &pdev->dev;
  294. if (mfd != NULL) {
  295. DEV_INFO("adv7520_power: ON (%dx%d %d)\n",
  296. mfd->var_xres, mfd->var_yres, mfd->var_pixclock);
  297. hdmi_common_get_video_format_from_drv_data(mfd);
  298. }
  299. adv7520_comm_power(1, 1);
  300. /* Check if HPD is signaled */
  301. if (adv7520_read_reg(hclient, 0x42) & (1 << 6)) {
  302. DEV_INFO("power_on: cable detected\n");
  303. monitor_sense = adv7520_read_reg(hclient, 0xC6);
  304. #ifdef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  305. if (has_hdcp_hw_support) {
  306. if (!hdcp_activating)
  307. adv7520_start_hdcp();
  308. }
  309. #endif
  310. } else
  311. DEV_INFO("power_on: cable NOT detected\n");
  312. adv7520_comm_power(0, 1);
  313. pm_qos_update_request(&pm_qos_req, msm_cpuidle_get_deep_idle_latency());
  314. return 0;
  315. }
  316. static int adv7520_power_off(struct platform_device *pdev)
  317. {
  318. DEV_INFO("power_off\n");
  319. adv7520_comm_power(1, 1);
  320. adv7520_chip_off();
  321. pm_qos_update_request(&pm_qos_req, PM_QOS_DEFAULT_VALUE);
  322. adv7520_comm_power(0, 1);
  323. clk_disable_unprepare(tv_enc_clk);
  324. return 0;
  325. }
  326. /* AV7520 chip specific initialization */
  327. static void adv7520_chip_init(void)
  328. {
  329. /* Initialize the variables used to read/write the ADV7520 chip. */
  330. memset(&reg, 0xff, sizeof(reg));
  331. /* Get the values from the "Fixed Registers That Must Be Set". */
  332. reg[0x98] = adv7520_read_reg(hclient, 0x98);
  333. reg[0x9c] = adv7520_read_reg(hclient, 0x9c);
  334. reg[0x9d] = adv7520_read_reg(hclient, 0x9d);
  335. reg[0xa2] = adv7520_read_reg(hclient, 0xa2);
  336. reg[0xa3] = adv7520_read_reg(hclient, 0xa3);
  337. reg[0xde] = adv7520_read_reg(hclient, 0xde);
  338. /* Get the "HDMI/DVI Selection" register. */
  339. reg[0xaf] = adv7520_read_reg(hclient, 0xaf);
  340. /* Read Packet Memory I2C Address */
  341. reg[0x45] = adv7520_read_reg(hclient, 0x45);
  342. /* Hard coded values provided by ADV7520 data sheet. */
  343. reg[0x98] = 0x03;
  344. reg[0x9c] = 0x38;
  345. reg[0x9d] = 0x61;
  346. reg[0xa2] = 0x94;
  347. reg[0xa3] = 0x94;
  348. reg[0xde] = 0x88;
  349. /* Set the HDMI select bit. */
  350. reg[0xaf] |= 0x16;
  351. /* Set the audio related registers. */
  352. reg[0x01] = 0x00;
  353. reg[0x02] = 0x2d;
  354. reg[0x03] = 0x80;
  355. reg[0x0a] = 0x4d;
  356. reg[0x0b] = 0x0e;
  357. reg[0x0c] = 0x84;
  358. reg[0x0d] = 0x10;
  359. reg[0x12] = 0x00;
  360. reg[0x14] = 0x00;
  361. reg[0x15] = 0x20;
  362. reg[0x44] = 0x79;
  363. reg[0x73] = 0x01;
  364. reg[0x76] = 0x00;
  365. /* Set 720p display related registers */
  366. reg[0x16] = 0x00;
  367. reg[0x18] = 0x46;
  368. reg[0x55] = 0x00;
  369. reg[0x3c] = 0x04;
  370. /* Set Interrupt Mask register for HPD/HDCP */
  371. reg[0x94] = 0xC0;
  372. #ifdef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  373. if (has_hdcp_hw_support)
  374. reg[0x95] = 0xC0;
  375. else
  376. reg[0x95] = 0x00;
  377. #else
  378. reg[0x95] = 0x00;
  379. #endif
  380. adv7520_write_reg(hclient, 0x94, reg[0x94]);
  381. adv7520_write_reg(hclient, 0x95, reg[0x95]);
  382. /* Set Packet Memory I2C Address */
  383. reg[0x45] = 0x74;
  384. /* Set the values from the "Fixed Registers That Must Be Set". */
  385. adv7520_write_reg(hclient, 0x98, reg[0x98]);
  386. adv7520_write_reg(hclient, 0x9c, reg[0x9c]);
  387. adv7520_write_reg(hclient, 0x9d, reg[0x9d]);
  388. adv7520_write_reg(hclient, 0xa2, reg[0xa2]);
  389. adv7520_write_reg(hclient, 0xa3, reg[0xa3]);
  390. adv7520_write_reg(hclient, 0xde, reg[0xde]);
  391. /* Set the "HDMI/DVI Selection" register. */
  392. adv7520_write_reg(hclient, 0xaf, reg[0xaf]);
  393. /* Set EDID Monitor address */
  394. reg[0x43] = 0x7E;
  395. adv7520_write_reg(hclient, 0x43, reg[0x43]);
  396. /* Enable the i2s audio input. */
  397. adv7520_write_reg(hclient, 0x01, reg[0x01]);
  398. adv7520_write_reg(hclient, 0x02, reg[0x02]);
  399. adv7520_write_reg(hclient, 0x03, reg[0x03]);
  400. adv7520_write_reg(hclient, 0x0a, reg[0x0a]);
  401. adv7520_write_reg(hclient, 0x0b, reg[0x0b]);
  402. adv7520_write_reg(hclient, 0x0c, reg[0x0c]);
  403. adv7520_write_reg(hclient, 0x0d, reg[0x0d]);
  404. adv7520_write_reg(hclient, 0x12, reg[0x12]);
  405. adv7520_write_reg(hclient, 0x14, reg[0x14]);
  406. adv7520_write_reg(hclient, 0x15, reg[0x15]);
  407. adv7520_write_reg(hclient, 0x44, reg[0x44]);
  408. adv7520_write_reg(hclient, 0x73, reg[0x73]);
  409. adv7520_write_reg(hclient, 0x76, reg[0x76]);
  410. /* Enable 720p display */
  411. adv7520_write_reg(hclient, 0x16, reg[0x16]);
  412. adv7520_write_reg(hclient, 0x18, reg[0x18]);
  413. adv7520_write_reg(hclient, 0x55, reg[0x55]);
  414. adv7520_write_reg(hclient, 0x3c, reg[0x3c]);
  415. /* Set Packet Memory address to avoid conflict
  416. with Bosch Accelerometer */
  417. adv7520_write_reg(hclient, 0x45, reg[0x45]);
  418. /* Ensure chip is in low-power state */
  419. adv7520_write_reg(hclient, 0x41, 0x50);
  420. }
  421. #ifdef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  422. static void adv7520_start_hdcp(void)
  423. {
  424. mutex_lock(&hdcp_state_mutex);
  425. if (hdcp_activating) {
  426. DEV_WARN("adv7520_timer: HDCP already"
  427. " activating, skipping\n");
  428. mutex_unlock(&hdcp_state_mutex);
  429. return;
  430. }
  431. hdcp_activating = TRUE;
  432. mutex_unlock(&hdcp_state_mutex);
  433. del_timer(&hpd_duty_timer);
  434. adv7520_comm_power(1, 1);
  435. if (!enable_5v_on) {
  436. dd->pd->enable_5v(1);
  437. enable_5v_on = TRUE;
  438. adv7520_chip_on();
  439. }
  440. /* request for HDCP */
  441. reg[0xaf] = adv7520_read_reg(hclient, 0xaf);
  442. reg[0xaf] |= 0x90;
  443. adv7520_write_reg(hclient, 0xaf, reg[0xaf]);
  444. reg[0xaf] = adv7520_read_reg(hclient, 0xaf);
  445. reg[0xba] = adv7520_read_reg(hclient, 0xba);
  446. reg[0xba] |= 0x10;
  447. adv7520_write_reg(hclient, 0xba, reg[0xba]);
  448. reg[0xba] = adv7520_read_reg(hclient, 0xba);
  449. adv7520_comm_power(0, 1);
  450. DEV_INFO("HDCP: reg[0xaf]=0x%02x, reg[0xba]=0x%02x, waiting for BKSV\n",
  451. reg[0xaf], reg[0xba]);
  452. /* will check for HDCP Error or BKSV ready */
  453. mod_timer(&hpd_duty_timer, jiffies + HZ/2);
  454. }
  455. #endif
  456. static void adv7520_hpd_timer_w(struct work_struct *work)
  457. {
  458. if (!external_common_state->hpd_feature_on) {
  459. DEV_INFO("adv7520_timer: skipping, feature off\n");
  460. return;
  461. }
  462. if ((monitor_sense & 0x4) && !external_common_state->hpd_state) {
  463. int timeout;
  464. DEV_DBG("adv7520_timer: Cable Detected\n");
  465. adv7520_comm_power(1, 1);
  466. adv7520_chip_on();
  467. if (hpd_cable_chg_detected) {
  468. hpd_cable_chg_detected = FALSE;
  469. /* Ensure 5V to read EDID */
  470. if (!enable_5v_on) {
  471. dd->pd->enable_5v(1);
  472. enable_5v_on = TRUE;
  473. }
  474. msleep(500);
  475. timeout = (adv7520_read_reg(hclient, 0x96) & (1 << 2));
  476. if (timeout) {
  477. DEV_DBG("adv7520_timer: EDID-Ready..\n");
  478. adv7520_read_edid();
  479. } else
  480. DEV_DBG("adv7520_timer: EDID TIMEOUT (C9=%02x)"
  481. "\n", adv7520_read_reg(hclient, 0xC9));
  482. }
  483. #ifdef TESTING_FORCE_480p
  484. external_common_state->disp_mode_list.num_of_elements = 1;
  485. external_common_state->disp_mode_list.disp_mode_list[0] =
  486. HDMI_VFRMT_720x480p60_16_9;
  487. #endif
  488. adv7520_comm_power(0, 1);
  489. #ifndef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  490. /* HDMI_5V_EN not needed anymore */
  491. if (enable_5v_on) {
  492. DEV_DBG("adv7520_timer: EDID done, no HDCP, 5V not "
  493. "needed anymore\n");
  494. dd->pd->enable_5v(0);
  495. enable_5v_on = FALSE;
  496. }
  497. #endif
  498. change_hdmi_state(1);
  499. } else if (external_common_state->hpd_state) {
  500. adv7520_comm_power(1, 1);
  501. adv7520_chip_off();
  502. adv7520_comm_power(0, 1);
  503. DEV_DBG("adv7520_timer: Cable Removed\n");
  504. change_hdmi_state(0);
  505. }
  506. }
  507. static void adv7520_hpd_timer_f(unsigned long data)
  508. {
  509. schedule_work(&hpd_timer_work);
  510. }
  511. static void adv7520_isr_w(struct work_struct *work)
  512. {
  513. static int state_count;
  514. static u8 last_reg0x96;
  515. u8 reg0xc8;
  516. u8 reg0x96;
  517. #ifdef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  518. static u8 last_reg0x97;
  519. u8 reg0x97 = 0;
  520. #endif
  521. if (!external_common_state->hpd_feature_on) {
  522. DEV_DBG("adv7520_irq: skipping, hpd off\n");
  523. return;
  524. }
  525. adv7520_comm_power(1, 1);
  526. reg0x96 = adv7520_read_reg(hclient, 0x96);
  527. #ifdef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  528. if (has_hdcp_hw_support) {
  529. reg0x97 = adv7520_read_reg(hclient, 0x97);
  530. /* Clearing the Interrupts */
  531. adv7520_write_reg(hclient, 0x97, reg0x97);
  532. }
  533. #endif
  534. /* Clearing the Interrupts */
  535. adv7520_write_reg(hclient, 0x96, reg0x96);
  536. if ((reg0x96 == 0xC0) || (reg0x96 & 0x40)) {
  537. #ifdef DEBUG
  538. unsigned int hpd_state = adv7520_read_reg(hclient, 0x42);
  539. #endif
  540. monitor_sense = adv7520_read_reg(hclient, 0xC6);
  541. DEV_DBG("adv7520_irq: reg[0x42]=%02x && reg[0xC6]=%02x\n",
  542. hpd_state, monitor_sense);
  543. if (!enable_5v_on) {
  544. dd->pd->enable_5v(1);
  545. enable_5v_on = TRUE;
  546. }
  547. if (!hpd_power_on) {
  548. dd->pd->core_power(1, 1);
  549. hpd_power_on = TRUE;
  550. }
  551. /* Timer for catching interrupt debouning */
  552. DEV_DBG("adv7520_irq: Timer in .5sec\n");
  553. hpd_cable_chg_detected = TRUE;
  554. mod_timer(&hpd_timer, jiffies + HZ/2);
  555. }
  556. #ifdef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  557. if (has_hdcp_hw_support) {
  558. if (hdcp_activating) {
  559. /* HDCP controller error Interrupt */
  560. if (reg0x97 & 0x80) {
  561. DEV_ERR("adv7520_irq: HDCP_ERROR\n");
  562. state_count = 0;
  563. adv7520_close_hdcp_link();
  564. /* BKSV Ready interrupts */
  565. } else if (reg0x97 & 0x40) {
  566. DEV_INFO("adv7520_irq: BKSV keys ready, Begin"
  567. " HDCP encryption\n");
  568. state_count = 0;
  569. schedule_work(&hdcp_handle_work);
  570. } else if (++state_count > 2 && (monitor_sense & 0x4)) {
  571. DEV_INFO("adv7520_irq: Still waiting for BKSV,"
  572. "restart HDCP\n");
  573. hdcp_activating = FALSE;
  574. state_count = 0;
  575. adv7520_chip_off();
  576. adv7520_start_hdcp();
  577. }
  578. reg0xc8 = adv7520_read_reg(hclient, 0xc8);
  579. DEV_INFO("adv7520_irq: DDC controller reg[0xC8]=0x%02x,"
  580. "state_count=%d, monitor_sense=%x\n",
  581. reg0xc8, state_count, monitor_sense);
  582. } else if (!external_common_state->hdcp_active
  583. && (monitor_sense & 0x4)) {
  584. DEV_INFO("adv7520_irq: start HDCP with"
  585. " monitor sense\n");
  586. state_count = 0;
  587. adv7520_start_hdcp();
  588. } else
  589. state_count = 0;
  590. if (last_reg0x97 != reg0x97 || last_reg0x96 != reg0x96)
  591. DEV_DBG("adv7520_irq: reg[0x96]=%02x "
  592. "reg[0x97]=%02x: HDCP: %d\n", reg0x96, reg0x97,
  593. external_common_state->hdcp_active);
  594. last_reg0x97 = reg0x97;
  595. } else {
  596. if (last_reg0x96 != reg0x96)
  597. DEV_DBG("adv7520_irq: reg[0x96]=%02x\n", reg0x96);
  598. }
  599. #else
  600. if (last_reg0x96 != reg0x96)
  601. DEV_DBG("adv7520_irq: reg[0x96]=%02x\n", reg0x96);
  602. #endif
  603. last_reg0x96 = reg0x96;
  604. adv7520_comm_power(0, 1);
  605. }
  606. static void adv7520_hpd_duty_work(struct work_struct *work)
  607. {
  608. if (!external_common_state->hpd_feature_on) {
  609. DEV_WARN("%s: hpd feature is off, skipping\n", __func__);
  610. return;
  611. }
  612. dd->pd->core_power(1, 0);
  613. msleep(10);
  614. adv7520_isr_w(NULL);
  615. dd->pd->core_power(0, 0);
  616. }
  617. static void adv7520_hpd_duty_timer_f(unsigned long data)
  618. {
  619. if (!external_common_state->hpd_feature_on) {
  620. DEV_WARN("%s: hpd feature is off, skipping\n", __func__);
  621. return;
  622. }
  623. mod_timer(&hpd_duty_timer, jiffies + HPD_DUTY_CYCLE*HZ);
  624. schedule_work(&hpd_duty_work);
  625. }
  626. static const struct i2c_device_id adv7520_id[] = {
  627. { ADV7520_DRV_NAME , 0},
  628. {}
  629. };
  630. static struct msm_fb_panel_data hdmi_panel_data = {
  631. .on = adv7520_power_on,
  632. .off = adv7520_power_off,
  633. };
  634. static struct platform_device hdmi_device = {
  635. .name = ADV7520_DRV_NAME ,
  636. .id = 2,
  637. .dev = {
  638. .platform_data = &hdmi_panel_data,
  639. }
  640. };
  641. static void adv7520_ensure_init(void)
  642. {
  643. static boolean init_done;
  644. if (!init_done) {
  645. int rc = dd->pd->init_irq();
  646. if (rc) {
  647. DEV_ERR("adv7520_init: init_irq: %d\n", rc);
  648. return;
  649. }
  650. init_done = TRUE;
  651. }
  652. DEV_INFO("adv7520_init: chip init\n");
  653. adv7520_comm_power(1, 1);
  654. adv7520_chip_init();
  655. adv7520_comm_power(0, 1);
  656. }
  657. static int adv7520_hpd_feature(int on)
  658. {
  659. int rc = 0;
  660. if (!on) {
  661. if (enable_5v_on) {
  662. dd->pd->enable_5v(0);
  663. enable_5v_on = FALSE;
  664. }
  665. if (hpd_power_on) {
  666. dd->pd->core_power(0, 1);
  667. hpd_power_on = FALSE;
  668. }
  669. DEV_DBG("adv7520_hpd: %d: stop duty timer\n", on);
  670. del_timer(&hpd_timer);
  671. del_timer(&hpd_duty_timer);
  672. external_common_state->hpd_state = 0;
  673. }
  674. if (on) {
  675. dd->pd->core_power(1, 0);
  676. adv7520_ensure_init();
  677. adv7520_comm_power(1, 1);
  678. monitor_sense = adv7520_read_reg(hclient, 0xC6);
  679. DEV_DBG("adv7520_irq: reg[0xC6]=%02x\n", monitor_sense);
  680. adv7520_comm_power(0, 1);
  681. dd->pd->core_power(0, 0);
  682. if (monitor_sense & 0x4) {
  683. if (!enable_5v_on) {
  684. dd->pd->enable_5v(1);
  685. enable_5v_on = TRUE;
  686. }
  687. if (!hpd_power_on) {
  688. dd->pd->core_power(1, 1);
  689. hpd_power_on = TRUE;
  690. }
  691. hpd_cable_chg_detected = TRUE;
  692. mod_timer(&hpd_timer, jiffies + HZ/2);
  693. }
  694. DEV_DBG("adv7520_hpd: %d start duty timer\n", on);
  695. mod_timer(&hpd_duty_timer, jiffies + HZ/100);
  696. }
  697. DEV_INFO("adv7520_hpd: %d\n", on);
  698. return rc;
  699. }
  700. static int __devinit
  701. adv7520_probe(struct i2c_client *client, const struct i2c_device_id *id)
  702. {
  703. int rc;
  704. struct platform_device *fb_dev;
  705. dd = kzalloc(sizeof *dd, GFP_KERNEL);
  706. if (!dd) {
  707. rc = -ENOMEM;
  708. goto probe_exit;
  709. }
  710. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  711. return -ENODEV;
  712. external_common_state->dev = &client->dev;
  713. /* Init real i2c_client */
  714. hclient = client;
  715. i2c_set_clientdata(client, dd);
  716. dd->pd = client->dev.platform_data;
  717. if (!dd->pd) {
  718. rc = -ENODEV;
  719. goto probe_free;
  720. }
  721. INIT_WORK(&dd->isr_work, adv7520_isr_w);
  722. INIT_WORK(&hpd_timer_work, adv7520_hpd_timer_w);
  723. #ifdef CONFIG_FB_MSM_HDMI_ADV7520_PANEL_HDCP_SUPPORT
  724. if (dd->pd->check_hdcp_hw_support)
  725. has_hdcp_hw_support = dd->pd->check_hdcp_hw_support();
  726. if (has_hdcp_hw_support)
  727. INIT_WORK(&hdcp_handle_work, adv7520_hdcp_enable);
  728. else
  729. DEV_INFO("%s: no hdcp hw support.\n", __func__);
  730. #endif
  731. init_timer(&hpd_timer);
  732. hpd_timer.function = adv7520_hpd_timer_f;
  733. hpd_timer.data = (unsigned long)NULL;
  734. hpd_timer.expires = 0xffffffff;
  735. add_timer(&hpd_timer);
  736. external_common_state->hpd_feature = adv7520_hpd_feature;
  737. DEV_INFO("adv7520_probe: HPD detection on request\n");
  738. init_timer(&hpd_duty_timer);
  739. hpd_duty_timer.function = adv7520_hpd_duty_timer_f;
  740. hpd_duty_timer.data = (unsigned long)NULL;
  741. hpd_duty_timer.expires = 0xffffffff;
  742. add_timer(&hpd_duty_timer);
  743. INIT_WORK(&hpd_duty_work, adv7520_hpd_duty_work);
  744. DEV_INFO("adv7520_probe: HPD detection ON (duty)\n");
  745. fb_dev = msm_fb_add_device(&hdmi_device);
  746. if (fb_dev) {
  747. rc = external_common_state_create(fb_dev);
  748. if (rc)
  749. goto probe_free;
  750. } else
  751. DEV_ERR("adv7520_probe: failed to add fb device\n");
  752. if (hdmi_prim_display)
  753. external_common_state->sdev.name = "hdmi_as_primary";
  754. else
  755. external_common_state->sdev.name = "hdmi";
  756. if (switch_dev_register(&external_common_state->sdev) < 0)
  757. DEV_ERR("Hdmi switch registration failed\n");
  758. return 0;
  759. probe_free:
  760. kfree(dd);
  761. dd = NULL;
  762. probe_exit:
  763. return rc;
  764. }
  765. static int __devexit adv7520_remove(struct i2c_client *client)
  766. {
  767. if (!client->adapter) {
  768. DEV_ERR("%s: No HDMI Device\n", __func__);
  769. return -ENODEV;
  770. }
  771. switch_dev_unregister(&external_common_state->sdev);
  772. pm_qos_remove_request(&pm_qos_req);
  773. kfree(dd);
  774. dd = NULL;
  775. return 0;
  776. }
  777. #ifdef CONFIG_SUSPEND
  778. static int adv7520_i2c_suspend(struct device *dev)
  779. {
  780. DEV_INFO("%s\n", __func__);
  781. ++suspend_count;
  782. if (external_common_state->hpd_feature_on) {
  783. DEV_DBG("%s: stop duty timer\n", __func__);
  784. del_timer(&hpd_duty_timer);
  785. del_timer(&hpd_timer);
  786. }
  787. /* Turn off LDO8 and go into low-power state */
  788. if (chip_power_on) {
  789. DEV_DBG("%s: turn off power\n", __func__);
  790. adv7520_comm_power(1, 1);
  791. adv7520_write_reg(hclient, 0x41, 0x50);
  792. adv7520_comm_power(0, 1);
  793. dd->pd->core_power(0, 1);
  794. }
  795. return 0;
  796. }
  797. static int adv7520_i2c_resume(struct device *dev)
  798. {
  799. DEV_INFO("%s\n", __func__);
  800. /* Turn on LDO8 and go into normal-power state */
  801. if (chip_power_on) {
  802. DEV_DBG("%s: turn on power\n", __func__);
  803. dd->pd->core_power(1, 1);
  804. adv7520_comm_power(1, 1);
  805. adv7520_write_reg(hclient, 0x41, 0x10);
  806. adv7520_comm_power(0, 1);
  807. }
  808. if (external_common_state->hpd_feature_on) {
  809. DEV_DBG("%s: start duty timer\n", __func__);
  810. mod_timer(&hpd_duty_timer, jiffies + HPD_DUTY_CYCLE*HZ);
  811. }
  812. return 0;
  813. }
  814. #else
  815. #define adv7520_i2c_suspend NULL
  816. #define adv7520_i2c_resume NULL
  817. #endif
  818. static const struct dev_pm_ops adv7520_device_pm_ops = {
  819. .suspend = adv7520_i2c_suspend,
  820. .resume = adv7520_i2c_resume,
  821. };
  822. static struct i2c_driver hdmi_i2c_driver = {
  823. .driver = {
  824. .name = ADV7520_DRV_NAME,
  825. .owner = THIS_MODULE,
  826. .pm = &adv7520_device_pm_ops,
  827. },
  828. .probe = adv7520_probe,
  829. .id_table = adv7520_id,
  830. .remove = __devexit_p(adv7520_remove),
  831. };
  832. static int __init adv7520_init(void)
  833. {
  834. int rc;
  835. pr_info("%s\n", __func__);
  836. external_common_state = &hdmi_common;
  837. external_common_state->video_resolution = HDMI_VFRMT_1280x720p60_16_9;
  838. tv_enc_clk = clk_get(NULL, "tv_enc_clk");
  839. if (IS_ERR(tv_enc_clk)) {
  840. printk(KERN_ERR "error: can't get tv_enc_clk!\n");
  841. return IS_ERR(tv_enc_clk);
  842. }
  843. HDMI_SETUP_LUT(640x480p60_4_3); /* 25.20MHz */
  844. HDMI_SETUP_LUT(720x480p60_16_9); /* 27.03MHz */
  845. HDMI_SETUP_LUT(1280x720p60_16_9); /* 74.25MHz */
  846. HDMI_SETUP_LUT(720x576p50_16_9); /* 27.00MHz */
  847. HDMI_SETUP_LUT(1280x720p50_16_9); /* 74.25MHz */
  848. hdmi_common_init_panel_info(&hdmi_panel_data.panel_info);
  849. rc = i2c_add_driver(&hdmi_i2c_driver);
  850. if (rc) {
  851. pr_err("hdmi_init FAILED: i2c_add_driver rc=%d\n", rc);
  852. goto init_exit;
  853. }
  854. if (machine_is_msm7x30_surf() || machine_is_msm8x55_surf()) {
  855. short *hdtv_mux = (short *)ioremap(0x8e000170 , 0x100);
  856. *hdtv_mux++ = 0x020b;
  857. *hdtv_mux = 0x8000;
  858. iounmap(hdtv_mux);
  859. }
  860. pm_qos_add_request(&pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
  861. PM_QOS_DEFAULT_VALUE);
  862. return 0;
  863. init_exit:
  864. if (tv_enc_clk)
  865. clk_put(tv_enc_clk);
  866. return rc;
  867. }
  868. static void __exit adv7520_exit(void)
  869. {
  870. i2c_del_driver(&hdmi_i2c_driver);
  871. }
  872. module_init(adv7520_init);
  873. module_exit(adv7520_exit);
  874. MODULE_LICENSE("GPL v2");
  875. MODULE_VERSION("0.1");
  876. MODULE_AUTHOR("Qualcomm Innovation Center, Inc.");
  877. MODULE_DESCRIPTION("ADV7520 HDMI driver");