bfin_adv7393fb.c 20 KB

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  1. /*
  2. * Frame buffer driver for ADV7393/2 video encoder
  3. *
  4. * Copyright 2006-2009 Analog Devices Inc.
  5. * Licensed under the GPL-2 or late.
  6. */
  7. /*
  8. * TODO: Remove Globals
  9. * TODO: Code Cleanup
  10. */
  11. #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/string.h>
  16. #include <linux/mm.h>
  17. #include <linux/tty.h>
  18. #include <linux/slab.h>
  19. #include <linux/delay.h>
  20. #include <linux/fb.h>
  21. #include <linux/ioport.h>
  22. #include <linux/init.h>
  23. #include <linux/types.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/sched.h>
  26. #include <asm/blackfin.h>
  27. #include <asm/irq.h>
  28. #include <asm/dma.h>
  29. #include <linux/uaccess.h>
  30. #include <linux/gpio.h>
  31. #include <asm/portmux.h>
  32. #include <linux/dma-mapping.h>
  33. #include <linux/proc_fs.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/i2c.h>
  36. #include "bfin_adv7393fb.h"
  37. static int mode = VMODE;
  38. static int mem = VMEM;
  39. static int nocursor = 1;
  40. static const unsigned short ppi_pins[] = {
  41. P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
  42. P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
  43. P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
  44. P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
  45. P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
  46. 0
  47. };
  48. /*
  49. * card parameters
  50. */
  51. static struct bfin_adv7393_fb_par {
  52. /* structure holding blackfin / adv7393 paramters when
  53. screen is blanked */
  54. struct {
  55. u8 Mode; /* ntsc/pal/? */
  56. } vga_state;
  57. atomic_t ref_count;
  58. } bfin_par;
  59. /* --------------------------------------------------------------------- */
  60. static struct fb_var_screeninfo bfin_adv7393_fb_defined = {
  61. .xres = 720,
  62. .yres = 480,
  63. .xres_virtual = 720,
  64. .yres_virtual = 480,
  65. .bits_per_pixel = 16,
  66. .activate = FB_ACTIVATE_TEST,
  67. .height = -1,
  68. .width = -1,
  69. .left_margin = 0,
  70. .right_margin = 0,
  71. .upper_margin = 0,
  72. .lower_margin = 0,
  73. .vmode = FB_VMODE_INTERLACED,
  74. .red = {11, 5, 0},
  75. .green = {5, 6, 0},
  76. .blue = {0, 5, 0},
  77. .transp = {0, 0, 0},
  78. };
  79. static struct fb_fix_screeninfo bfin_adv7393_fb_fix __devinitdata = {
  80. .id = "BFIN ADV7393",
  81. .smem_len = 720 * 480 * 2,
  82. .type = FB_TYPE_PACKED_PIXELS,
  83. .visual = FB_VISUAL_TRUECOLOR,
  84. .xpanstep = 0,
  85. .ypanstep = 0,
  86. .line_length = 720 * 2,
  87. .accel = FB_ACCEL_NONE
  88. };
  89. static struct fb_ops bfin_adv7393_fb_ops = {
  90. .owner = THIS_MODULE,
  91. .fb_open = bfin_adv7393_fb_open,
  92. .fb_release = bfin_adv7393_fb_release,
  93. .fb_check_var = bfin_adv7393_fb_check_var,
  94. .fb_pan_display = bfin_adv7393_fb_pan_display,
  95. .fb_blank = bfin_adv7393_fb_blank,
  96. .fb_fillrect = cfb_fillrect,
  97. .fb_copyarea = cfb_copyarea,
  98. .fb_imageblit = cfb_imageblit,
  99. .fb_cursor = bfin_adv7393_fb_cursor,
  100. .fb_setcolreg = bfin_adv7393_fb_setcolreg,
  101. };
  102. static int dma_desc_list(struct adv7393fb_device *fbdev, u16 arg)
  103. {
  104. if (arg == BUILD) { /* Build */
  105. fbdev->vb1 = l1_data_sram_zalloc(sizeof(struct dmasg));
  106. if (fbdev->vb1 == NULL)
  107. goto error;
  108. fbdev->av1 = l1_data_sram_zalloc(sizeof(struct dmasg));
  109. if (fbdev->av1 == NULL)
  110. goto error;
  111. fbdev->vb2 = l1_data_sram_zalloc(sizeof(struct dmasg));
  112. if (fbdev->vb2 == NULL)
  113. goto error;
  114. fbdev->av2 = l1_data_sram_zalloc(sizeof(struct dmasg));
  115. if (fbdev->av2 == NULL)
  116. goto error;
  117. /* Build linked DMA descriptor list */
  118. fbdev->vb1->next_desc_addr = fbdev->av1;
  119. fbdev->av1->next_desc_addr = fbdev->vb2;
  120. fbdev->vb2->next_desc_addr = fbdev->av2;
  121. fbdev->av2->next_desc_addr = fbdev->vb1;
  122. /* Save list head */
  123. fbdev->descriptor_list_head = fbdev->av2;
  124. /* Vertical Blanking Field 1 */
  125. fbdev->vb1->start_addr = VB_DUMMY_MEMORY_SOURCE;
  126. fbdev->vb1->cfg = DMA_CFG_VAL;
  127. fbdev->vb1->x_count =
  128. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  129. fbdev->vb1->x_modify = 0;
  130. fbdev->vb1->y_count = fbdev->modes[mode].vb1_lines;
  131. fbdev->vb1->y_modify = 0;
  132. /* Active Video Field 1 */
  133. fbdev->av1->start_addr = (unsigned long)fbdev->fb_mem;
  134. fbdev->av1->cfg = DMA_CFG_VAL;
  135. fbdev->av1->x_count =
  136. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  137. fbdev->av1->x_modify = fbdev->modes[mode].bpp / 8;
  138. fbdev->av1->y_count = fbdev->modes[mode].a_lines;
  139. fbdev->av1->y_modify =
  140. (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
  141. 1) * (fbdev->modes[mode].bpp / 8);
  142. /* Vertical Blanking Field 2 */
  143. fbdev->vb2->start_addr = VB_DUMMY_MEMORY_SOURCE;
  144. fbdev->vb2->cfg = DMA_CFG_VAL;
  145. fbdev->vb2->x_count =
  146. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  147. fbdev->vb2->x_modify = 0;
  148. fbdev->vb2->y_count = fbdev->modes[mode].vb2_lines;
  149. fbdev->vb2->y_modify = 0;
  150. /* Active Video Field 2 */
  151. fbdev->av2->start_addr =
  152. (unsigned long)fbdev->fb_mem + fbdev->line_len;
  153. fbdev->av2->cfg = DMA_CFG_VAL;
  154. fbdev->av2->x_count =
  155. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  156. fbdev->av2->x_modify = (fbdev->modes[mode].bpp / 8);
  157. fbdev->av2->y_count = fbdev->modes[mode].a_lines;
  158. fbdev->av2->y_modify =
  159. (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
  160. 1) * (fbdev->modes[mode].bpp / 8);
  161. return 1;
  162. }
  163. error:
  164. l1_data_sram_free(fbdev->vb1);
  165. l1_data_sram_free(fbdev->av1);
  166. l1_data_sram_free(fbdev->vb2);
  167. l1_data_sram_free(fbdev->av2);
  168. return 0;
  169. }
  170. static int bfin_config_dma(struct adv7393fb_device *fbdev)
  171. {
  172. BUG_ON(!(fbdev->fb_mem));
  173. set_dma_x_count(CH_PPI, fbdev->descriptor_list_head->x_count);
  174. set_dma_x_modify(CH_PPI, fbdev->descriptor_list_head->x_modify);
  175. set_dma_y_count(CH_PPI, fbdev->descriptor_list_head->y_count);
  176. set_dma_y_modify(CH_PPI, fbdev->descriptor_list_head->y_modify);
  177. set_dma_start_addr(CH_PPI, fbdev->descriptor_list_head->start_addr);
  178. set_dma_next_desc_addr(CH_PPI,
  179. fbdev->descriptor_list_head->next_desc_addr);
  180. set_dma_config(CH_PPI, fbdev->descriptor_list_head->cfg);
  181. return 1;
  182. }
  183. static void bfin_disable_dma(void)
  184. {
  185. bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() & ~DMAEN);
  186. }
  187. static void bfin_config_ppi(struct adv7393fb_device *fbdev)
  188. {
  189. if (ANOMALY_05000183) {
  190. bfin_write_TIMER2_CONFIG(WDTH_CAP);
  191. bfin_write_TIMER_ENABLE(TIMEN2);
  192. }
  193. bfin_write_PPI_CONTROL(0x381E);
  194. bfin_write_PPI_FRAME(fbdev->modes[mode].tot_lines);
  195. bfin_write_PPI_COUNT(fbdev->modes[mode].xres +
  196. fbdev->modes[mode].boeft_blank - 1);
  197. bfin_write_PPI_DELAY(fbdev->modes[mode].aoeft_blank - 1);
  198. }
  199. static void bfin_enable_ppi(void)
  200. {
  201. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
  202. }
  203. static void bfin_disable_ppi(void)
  204. {
  205. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
  206. }
  207. static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value)
  208. {
  209. return i2c_smbus_write_byte_data(client, reg, value);
  210. }
  211. static inline int adv7393_read(struct i2c_client *client, u8 reg)
  212. {
  213. return i2c_smbus_read_byte_data(client, reg);
  214. }
  215. static int
  216. adv7393_write_block(struct i2c_client *client,
  217. const u8 *data, unsigned int len)
  218. {
  219. int ret = -1;
  220. u8 reg;
  221. while (len >= 2) {
  222. reg = *data++;
  223. ret = adv7393_write(client, reg, *data++);
  224. if (ret < 0)
  225. break;
  226. len -= 2;
  227. }
  228. return ret;
  229. }
  230. static int adv7393_mode(struct i2c_client *client, u16 mode)
  231. {
  232. switch (mode) {
  233. case POWER_ON: /* ADV7393 Sleep mode OFF */
  234. adv7393_write(client, 0x00, 0x1E);
  235. break;
  236. case POWER_DOWN: /* ADV7393 Sleep mode ON */
  237. adv7393_write(client, 0x00, 0x1F);
  238. break;
  239. case BLANK_OFF: /* Pixel Data Valid */
  240. adv7393_write(client, 0x82, 0xCB);
  241. break;
  242. case BLANK_ON: /* Pixel Data Invalid */
  243. adv7393_write(client, 0x82, 0x8B);
  244. break;
  245. default:
  246. return -EINVAL;
  247. break;
  248. }
  249. return 0;
  250. }
  251. static irqreturn_t ppi_irq_error(int irq, void *dev_id)
  252. {
  253. struct adv7393fb_device *fbdev = (struct adv7393fb_device *)dev_id;
  254. u16 status = bfin_read_PPI_STATUS();
  255. pr_debug("%s: PPI Status = 0x%X\n", __func__, status);
  256. if (status) {
  257. bfin_disable_dma(); /* TODO: Check Sequence */
  258. bfin_disable_ppi();
  259. bfin_clear_PPI_STATUS();
  260. bfin_config_dma(fbdev);
  261. bfin_enable_ppi();
  262. }
  263. return IRQ_HANDLED;
  264. }
  265. static int proc_output(char *buf)
  266. {
  267. char *p = buf;
  268. p += sprintf(p,
  269. "Usage:\n"
  270. "echo 0x[REG][Value] > adv7393\n"
  271. "example: echo 0x1234 >adv7393\n"
  272. "writes 0x34 into Register 0x12\n");
  273. return p - buf;
  274. }
  275. static int
  276. adv7393_read_proc(char *page, char **start, off_t off,
  277. int count, int *eof, void *data)
  278. {
  279. int len;
  280. len = proc_output(page);
  281. if (len <= off + count)
  282. *eof = 1;
  283. *start = page + off;
  284. len -= off;
  285. if (len > count)
  286. len = count;
  287. if (len < 0)
  288. len = 0;
  289. return len;
  290. }
  291. static int
  292. adv7393_write_proc(struct file *file, const char __user * buffer,
  293. unsigned long count, void *data)
  294. {
  295. struct adv7393fb_device *fbdev = data;
  296. char line[8];
  297. unsigned int val;
  298. int ret;
  299. ret = copy_from_user(line, buffer, count);
  300. if (ret)
  301. return -EFAULT;
  302. val = simple_strtoul(line, NULL, 0);
  303. adv7393_write(fbdev->client, val >> 8, val & 0xff);
  304. return count;
  305. }
  306. static int __devinit bfin_adv7393_fb_probe(struct i2c_client *client,
  307. const struct i2c_device_id *id)
  308. {
  309. int ret = 0;
  310. struct proc_dir_entry *entry;
  311. int num_modes = ARRAY_SIZE(known_modes);
  312. struct adv7393fb_device *fbdev = NULL;
  313. if (mem > 2) {
  314. dev_err(&client->dev, "mem out of allowed range [1;2]\n");
  315. return -EINVAL;
  316. }
  317. if (mode > num_modes) {
  318. dev_err(&client->dev, "mode %d: not supported", mode);
  319. return -EFAULT;
  320. }
  321. fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL);
  322. if (!fbdev) {
  323. dev_err(&client->dev, "failed to allocate device private record");
  324. return -ENOMEM;
  325. }
  326. i2c_set_clientdata(client, fbdev);
  327. fbdev->modes = known_modes;
  328. fbdev->client = client;
  329. fbdev->fb_len =
  330. mem * fbdev->modes[mode].xres * fbdev->modes[mode].xres *
  331. (fbdev->modes[mode].bpp / 8);
  332. fbdev->line_len =
  333. fbdev->modes[mode].xres * (fbdev->modes[mode].bpp / 8);
  334. /* Workaround "PPI Does Not Start Properly In Specific Mode" */
  335. if (ANOMALY_05000400) {
  336. ret = gpio_request_one(P_IDENT(P_PPI0_FS3), GPIOF_OUT_INIT_LOW,
  337. "PPI0_FS3")
  338. if (ret) {
  339. dev_err(&client->dev, "PPI0_FS3 GPIO request failed\n");
  340. ret = -EBUSY;
  341. goto out_8;
  342. }
  343. }
  344. if (peripheral_request_list(ppi_pins, DRIVER_NAME)) {
  345. dev_err(&client->dev, "requesting PPI peripheral failed\n");
  346. ret = -EFAULT;
  347. goto out_8;
  348. }
  349. fbdev->fb_mem =
  350. dma_alloc_coherent(NULL, fbdev->fb_len, &fbdev->dma_handle,
  351. GFP_KERNEL);
  352. if (NULL == fbdev->fb_mem) {
  353. dev_err(&client->dev, "couldn't allocate dma buffer (%d bytes)\n",
  354. (u32) fbdev->fb_len);
  355. ret = -ENOMEM;
  356. goto out_7;
  357. }
  358. fbdev->info.screen_base = (void *)fbdev->fb_mem;
  359. bfin_adv7393_fb_fix.smem_start = (int)fbdev->fb_mem;
  360. bfin_adv7393_fb_fix.smem_len = fbdev->fb_len;
  361. bfin_adv7393_fb_fix.line_length = fbdev->line_len;
  362. if (mem > 1)
  363. bfin_adv7393_fb_fix.ypanstep = 1;
  364. bfin_adv7393_fb_defined.red.length = 5;
  365. bfin_adv7393_fb_defined.green.length = 6;
  366. bfin_adv7393_fb_defined.blue.length = 5;
  367. bfin_adv7393_fb_defined.xres = fbdev->modes[mode].xres;
  368. bfin_adv7393_fb_defined.yres = fbdev->modes[mode].yres;
  369. bfin_adv7393_fb_defined.xres_virtual = fbdev->modes[mode].xres;
  370. bfin_adv7393_fb_defined.yres_virtual = mem * fbdev->modes[mode].yres;
  371. bfin_adv7393_fb_defined.bits_per_pixel = fbdev->modes[mode].bpp;
  372. fbdev->info.fbops = &bfin_adv7393_fb_ops;
  373. fbdev->info.var = bfin_adv7393_fb_defined;
  374. fbdev->info.fix = bfin_adv7393_fb_fix;
  375. fbdev->info.par = &bfin_par;
  376. fbdev->info.flags = FBINFO_DEFAULT;
  377. fbdev->info.pseudo_palette = kzalloc(sizeof(u32) * 16, GFP_KERNEL);
  378. if (!fbdev->info.pseudo_palette) {
  379. dev_err(&client->dev, "failed to allocate pseudo_palette\n");
  380. ret = -ENOMEM;
  381. goto out_6;
  382. }
  383. if (fb_alloc_cmap(&fbdev->info.cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
  384. dev_err(&client->dev, "failed to allocate colormap (%d entries)\n",
  385. BFIN_LCD_NBR_PALETTE_ENTRIES);
  386. ret = -EFAULT;
  387. goto out_5;
  388. }
  389. if (request_dma(CH_PPI, "BF5xx_PPI_DMA") < 0) {
  390. dev_err(&client->dev, "unable to request PPI DMA\n");
  391. ret = -EFAULT;
  392. goto out_4;
  393. }
  394. if (request_irq(IRQ_PPI_ERROR, ppi_irq_error, 0,
  395. "PPI ERROR", fbdev) < 0) {
  396. dev_err(&client->dev, "unable to request PPI ERROR IRQ\n");
  397. ret = -EFAULT;
  398. goto out_3;
  399. }
  400. fbdev->open = 0;
  401. ret = adv7393_write_block(client, fbdev->modes[mode].adv7393_i2c_initd,
  402. fbdev->modes[mode].adv7393_i2c_initd_len);
  403. if (ret) {
  404. dev_err(&client->dev, "i2c attach: init error\n");
  405. goto out_1;
  406. }
  407. if (register_framebuffer(&fbdev->info) < 0) {
  408. dev_err(&client->dev, "unable to register framebuffer\n");
  409. ret = -EFAULT;
  410. goto out_1;
  411. }
  412. dev_info(&client->dev, "fb%d: %s frame buffer device\n",
  413. fbdev->info.node, fbdev->info.fix.id);
  414. dev_info(&client->dev, "fb memory address : 0x%p\n", fbdev->fb_mem);
  415. entry = create_proc_entry("driver/adv7393", 0, NULL);
  416. if (!entry) {
  417. dev_err(&client->dev, "unable to create /proc entry\n");
  418. ret = -EFAULT;
  419. goto out_0;
  420. }
  421. entry->read_proc = adv7393_read_proc;
  422. entry->write_proc = adv7393_write_proc;
  423. entry->data = fbdev;
  424. return 0;
  425. out_0:
  426. unregister_framebuffer(&fbdev->info);
  427. out_1:
  428. free_irq(IRQ_PPI_ERROR, fbdev);
  429. out_3:
  430. free_dma(CH_PPI);
  431. out_4:
  432. dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem,
  433. fbdev->dma_handle);
  434. out_5:
  435. fb_dealloc_cmap(&fbdev->info.cmap);
  436. out_6:
  437. kfree(fbdev->info.pseudo_palette);
  438. out_7:
  439. peripheral_free_list(ppi_pins);
  440. out_8:
  441. kfree(fbdev);
  442. return ret;
  443. }
  444. static int bfin_adv7393_fb_open(struct fb_info *info, int user)
  445. {
  446. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  447. fbdev->info.screen_base = (void *)fbdev->fb_mem;
  448. if (!fbdev->info.screen_base) {
  449. dev_err(&fbdev->client->dev, "unable to map device\n");
  450. return -ENOMEM;
  451. }
  452. fbdev->open = 1;
  453. dma_desc_list(fbdev, BUILD);
  454. adv7393_mode(fbdev->client, BLANK_OFF);
  455. bfin_config_ppi(fbdev);
  456. bfin_config_dma(fbdev);
  457. bfin_enable_ppi();
  458. return 0;
  459. }
  460. static int bfin_adv7393_fb_release(struct fb_info *info, int user)
  461. {
  462. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  463. adv7393_mode(fbdev->client, BLANK_ON);
  464. bfin_disable_dma();
  465. bfin_disable_ppi();
  466. dma_desc_list(fbdev, DESTRUCT);
  467. fbdev->open = 0;
  468. return 0;
  469. }
  470. static int
  471. bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  472. {
  473. switch (var->bits_per_pixel) {
  474. case 16:/* DIRECTCOLOUR, 64k */
  475. var->red.offset = info->var.red.offset;
  476. var->green.offset = info->var.green.offset;
  477. var->blue.offset = info->var.blue.offset;
  478. var->red.length = info->var.red.length;
  479. var->green.length = info->var.green.length;
  480. var->blue.length = info->var.blue.length;
  481. var->transp.offset = 0;
  482. var->transp.length = 0;
  483. var->transp.msb_right = 0;
  484. var->red.msb_right = 0;
  485. var->green.msb_right = 0;
  486. var->blue.msb_right = 0;
  487. break;
  488. default:
  489. pr_debug("%s: depth not supported: %u BPP\n", __func__,
  490. var->bits_per_pixel);
  491. return -EINVAL;
  492. }
  493. if (info->var.xres != var->xres ||
  494. info->var.yres != var->yres ||
  495. info->var.xres_virtual != var->xres_virtual ||
  496. info->var.yres_virtual != var->yres_virtual) {
  497. pr_debug("%s: Resolution not supported: X%u x Y%u\n",
  498. __func__, var->xres, var->yres);
  499. return -EINVAL;
  500. }
  501. /*
  502. * Memory limit
  503. */
  504. if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
  505. pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
  506. __func__, var->yres_virtual);
  507. return -ENOMEM;
  508. }
  509. return 0;
  510. }
  511. static int
  512. bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
  513. {
  514. int dy;
  515. u32 dmaaddr;
  516. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  517. if (!var || !info)
  518. return -EINVAL;
  519. if (var->xoffset - info->var.xoffset) {
  520. /* No support for X panning for now! */
  521. return -EINVAL;
  522. }
  523. dy = var->yoffset - info->var.yoffset;
  524. if (dy) {
  525. pr_debug("%s: Panning screen of %d lines\n", __func__, dy);
  526. dmaaddr = fbdev->av1->start_addr;
  527. dmaaddr += (info->fix.line_length * dy);
  528. /* TODO: Wait for current frame to finished */
  529. fbdev->av1->start_addr = (unsigned long)dmaaddr;
  530. fbdev->av2->start_addr = (unsigned long)dmaaddr + fbdev->line_len;
  531. }
  532. return 0;
  533. }
  534. /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
  535. static int bfin_adv7393_fb_blank(int blank, struct fb_info *info)
  536. {
  537. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  538. switch (blank) {
  539. case VESA_NO_BLANKING:
  540. /* Turn on panel */
  541. adv7393_mode(fbdev->client, BLANK_OFF);
  542. break;
  543. case VESA_VSYNC_SUSPEND:
  544. case VESA_HSYNC_SUSPEND:
  545. case VESA_POWERDOWN:
  546. /* Turn off panel */
  547. adv7393_mode(fbdev->client, BLANK_ON);
  548. break;
  549. default:
  550. return -EINVAL;
  551. break;
  552. }
  553. return 0;
  554. }
  555. int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
  556. {
  557. if (nocursor)
  558. return 0;
  559. else
  560. return -EINVAL; /* just to force soft_cursor() call */
  561. }
  562. static int bfin_adv7393_fb_setcolreg(u_int regno, u_int red, u_int green,
  563. u_int blue, u_int transp,
  564. struct fb_info *info)
  565. {
  566. if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
  567. return -EINVAL;
  568. if (info->var.grayscale)
  569. /* grayscale = 0.30*R + 0.59*G + 0.11*B */
  570. red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
  571. if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
  572. u32 value;
  573. /* Place color in the pseudopalette */
  574. if (regno > 16)
  575. return -EINVAL;
  576. red >>= (16 - info->var.red.length);
  577. green >>= (16 - info->var.green.length);
  578. blue >>= (16 - info->var.blue.length);
  579. value = (red << info->var.red.offset) |
  580. (green << info->var.green.offset)|
  581. (blue << info->var.blue.offset);
  582. value &= 0xFFFF;
  583. ((u32 *) (info->pseudo_palette))[regno] = value;
  584. }
  585. return 0;
  586. }
  587. static int __devexit bfin_adv7393_fb_remove(struct i2c_client *client)
  588. {
  589. struct adv7393fb_device *fbdev = i2c_get_clientdata(client);
  590. adv7393_mode(client, POWER_DOWN);
  591. if (fbdev->fb_mem)
  592. dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem, fbdev->dma_handle);
  593. free_dma(CH_PPI);
  594. free_irq(IRQ_PPI_ERROR, fbdev);
  595. unregister_framebuffer(&fbdev->info);
  596. remove_proc_entry("driver/adv7393", NULL);
  597. fb_dealloc_cmap(&fbdev->info.cmap);
  598. kfree(fbdev->info.pseudo_palette);
  599. if (ANOMALY_05000400)
  600. gpio_free(P_IDENT(P_PPI0_FS3)); /* FS3 */
  601. peripheral_free_list(ppi_pins);
  602. kfree(fbdev);
  603. return 0;
  604. }
  605. #ifdef CONFIG_PM
  606. static int bfin_adv7393_fb_suspend(struct device *dev)
  607. {
  608. struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
  609. if (fbdev->open) {
  610. bfin_disable_dma();
  611. bfin_disable_ppi();
  612. dma_desc_list(fbdev, DESTRUCT);
  613. }
  614. adv7393_mode(fbdev->client, POWER_DOWN);
  615. return 0;
  616. }
  617. static int bfin_adv7393_fb_resume(struct device *dev)
  618. {
  619. struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
  620. adv7393_mode(fbdev->client, POWER_ON);
  621. if (fbdev->open) {
  622. dma_desc_list(fbdev, BUILD);
  623. bfin_config_ppi(fbdev);
  624. bfin_config_dma(fbdev);
  625. bfin_enable_ppi();
  626. }
  627. return 0;
  628. }
  629. static const struct dev_pm_ops bfin_adv7393_dev_pm_ops = {
  630. .suspend = bfin_adv7393_fb_suspend,
  631. .resume = bfin_adv7393_fb_resume,
  632. };
  633. #endif
  634. static const struct i2c_device_id bfin_adv7393_id[] = {
  635. {DRIVER_NAME, 0},
  636. {}
  637. };
  638. MODULE_DEVICE_TABLE(i2c, bfin_adv7393_id);
  639. static struct i2c_driver bfin_adv7393_fb_driver = {
  640. .driver = {
  641. .name = DRIVER_NAME,
  642. #ifdef CONFIG_PM
  643. .pm = &bfin_adv7393_dev_pm_ops,
  644. #endif
  645. },
  646. .probe = bfin_adv7393_fb_probe,
  647. .remove = __devexit_p(bfin_adv7393_fb_remove),
  648. .id_table = bfin_adv7393_id,
  649. };
  650. static int __init bfin_adv7393_fb_driver_init(void)
  651. {
  652. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  653. request_module("i2c-bfin-twi");
  654. #else
  655. request_module("i2c-gpio");
  656. #endif
  657. return i2c_add_driver(&bfin_adv7393_fb_driver);
  658. }
  659. module_init(bfin_adv7393_fb_driver_init);
  660. static void __exit bfin_adv7393_fb_driver_cleanup(void)
  661. {
  662. i2c_del_driver(&bfin_adv7393_fb_driver);
  663. }
  664. module_exit(bfin_adv7393_fb_driver_cleanup);
  665. MODULE_LICENSE("GPL");
  666. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  667. MODULE_DESCRIPTION("Frame buffer driver for ADV7393/2 Video Encoder");
  668. module_param(mode, int, 0);
  669. MODULE_PARM_DESC(mode,
  670. "Video Mode (0=NTSC,1=PAL,2=NTSC 640x480,3=PAL 640x480,4=NTSC YCbCr input,5=PAL YCbCr input)");
  671. module_param(mem, int, 0);
  672. MODULE_PARM_DESC(mem,
  673. "Size of frame buffer memory 1=Single 2=Double Size (allows y-panning / frame stacking)");
  674. module_param(nocursor, int, 0644);
  675. MODULE_PARM_DESC(nocursor, "cursor enable/disable");