rtc-v3020.c 9.2 KB

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  1. /* drivers/rtc/rtc-v3020.c
  2. *
  3. * Copyright (C) 2006 8D Technologies inc.
  4. * Copyright (C) 2004 Compulab Ltd.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Driver for the V3020 RTC
  11. *
  12. * Changelog:
  13. *
  14. * 10-May-2006: Raphael Assenat <raph@8d.com>
  15. * - Converted to platform driver
  16. * - Use the generic rtc class
  17. *
  18. * ??-???-2004: Someone at Compulab
  19. * - Initial driver creation.
  20. *
  21. */
  22. #include <linux/platform_device.h>
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/rtc.h>
  26. #include <linux/types.h>
  27. #include <linux/bcd.h>
  28. #include <linux/rtc-v3020.h>
  29. #include <linux/delay.h>
  30. #include <linux/gpio.h>
  31. #include <linux/slab.h>
  32. #include <linux/io.h>
  33. #undef DEBUG
  34. struct v3020;
  35. struct v3020_chip_ops {
  36. int (*map_io)(struct v3020 *chip, struct platform_device *pdev,
  37. struct v3020_platform_data *pdata);
  38. void (*unmap_io)(struct v3020 *chip);
  39. unsigned char (*read_bit)(struct v3020 *chip);
  40. void (*write_bit)(struct v3020 *chip, unsigned char bit);
  41. };
  42. #define V3020_CS 0
  43. #define V3020_WR 1
  44. #define V3020_RD 2
  45. #define V3020_IO 3
  46. struct v3020_gpio {
  47. const char *name;
  48. unsigned int gpio;
  49. };
  50. struct v3020 {
  51. /* MMIO access */
  52. void __iomem *ioaddress;
  53. int leftshift;
  54. /* GPIO access */
  55. struct v3020_gpio *gpio;
  56. struct v3020_chip_ops *ops;
  57. struct rtc_device *rtc;
  58. };
  59. static int v3020_mmio_map(struct v3020 *chip, struct platform_device *pdev,
  60. struct v3020_platform_data *pdata)
  61. {
  62. if (pdev->num_resources != 1)
  63. return -EBUSY;
  64. if (pdev->resource[0].flags != IORESOURCE_MEM)
  65. return -EBUSY;
  66. chip->leftshift = pdata->leftshift;
  67. chip->ioaddress = ioremap(pdev->resource[0].start, 1);
  68. if (chip->ioaddress == NULL)
  69. return -EBUSY;
  70. return 0;
  71. }
  72. static void v3020_mmio_unmap(struct v3020 *chip)
  73. {
  74. iounmap(chip->ioaddress);
  75. }
  76. static void v3020_mmio_write_bit(struct v3020 *chip, unsigned char bit)
  77. {
  78. writel(bit << chip->leftshift, chip->ioaddress);
  79. }
  80. static unsigned char v3020_mmio_read_bit(struct v3020 *chip)
  81. {
  82. return !!(readl(chip->ioaddress) & (1 << chip->leftshift));
  83. }
  84. static struct v3020_chip_ops v3020_mmio_ops = {
  85. .map_io = v3020_mmio_map,
  86. .unmap_io = v3020_mmio_unmap,
  87. .read_bit = v3020_mmio_read_bit,
  88. .write_bit = v3020_mmio_write_bit,
  89. };
  90. static struct v3020_gpio v3020_gpio[] = {
  91. { "RTC CS", 0 },
  92. { "RTC WR", 0 },
  93. { "RTC RD", 0 },
  94. { "RTC IO", 0 },
  95. };
  96. static int v3020_gpio_map(struct v3020 *chip, struct platform_device *pdev,
  97. struct v3020_platform_data *pdata)
  98. {
  99. int i, err;
  100. v3020_gpio[V3020_CS].gpio = pdata->gpio_cs;
  101. v3020_gpio[V3020_WR].gpio = pdata->gpio_wr;
  102. v3020_gpio[V3020_RD].gpio = pdata->gpio_rd;
  103. v3020_gpio[V3020_IO].gpio = pdata->gpio_io;
  104. for (i = 0; i < ARRAY_SIZE(v3020_gpio); i++) {
  105. err = gpio_request(v3020_gpio[i].gpio, v3020_gpio[i].name);
  106. if (err)
  107. goto err_request;
  108. gpio_direction_output(v3020_gpio[i].gpio, 1);
  109. }
  110. chip->gpio = v3020_gpio;
  111. return 0;
  112. err_request:
  113. while (--i >= 0)
  114. gpio_free(v3020_gpio[i].gpio);
  115. return err;
  116. }
  117. static void v3020_gpio_unmap(struct v3020 *chip)
  118. {
  119. int i;
  120. for (i = 0; i < ARRAY_SIZE(v3020_gpio); i++)
  121. gpio_free(v3020_gpio[i].gpio);
  122. }
  123. static void v3020_gpio_write_bit(struct v3020 *chip, unsigned char bit)
  124. {
  125. gpio_direction_output(chip->gpio[V3020_IO].gpio, bit);
  126. gpio_set_value(chip->gpio[V3020_CS].gpio, 0);
  127. gpio_set_value(chip->gpio[V3020_WR].gpio, 0);
  128. udelay(1);
  129. gpio_set_value(chip->gpio[V3020_WR].gpio, 1);
  130. gpio_set_value(chip->gpio[V3020_CS].gpio, 1);
  131. }
  132. static unsigned char v3020_gpio_read_bit(struct v3020 *chip)
  133. {
  134. int bit;
  135. gpio_direction_input(chip->gpio[V3020_IO].gpio);
  136. gpio_set_value(chip->gpio[V3020_CS].gpio, 0);
  137. gpio_set_value(chip->gpio[V3020_RD].gpio, 0);
  138. udelay(1);
  139. bit = !!gpio_get_value(chip->gpio[V3020_IO].gpio);
  140. udelay(1);
  141. gpio_set_value(chip->gpio[V3020_RD].gpio, 1);
  142. gpio_set_value(chip->gpio[V3020_CS].gpio, 1);
  143. return bit;
  144. }
  145. static struct v3020_chip_ops v3020_gpio_ops = {
  146. .map_io = v3020_gpio_map,
  147. .unmap_io = v3020_gpio_unmap,
  148. .read_bit = v3020_gpio_read_bit,
  149. .write_bit = v3020_gpio_write_bit,
  150. };
  151. static void v3020_set_reg(struct v3020 *chip, unsigned char address,
  152. unsigned char data)
  153. {
  154. int i;
  155. unsigned char tmp;
  156. tmp = address;
  157. for (i = 0; i < 4; i++) {
  158. chip->ops->write_bit(chip, (tmp & 1));
  159. tmp >>= 1;
  160. udelay(1);
  161. }
  162. /* Commands dont have data */
  163. if (!V3020_IS_COMMAND(address)) {
  164. for (i = 0; i < 8; i++) {
  165. chip->ops->write_bit(chip, (data & 1));
  166. data >>= 1;
  167. udelay(1);
  168. }
  169. }
  170. }
  171. static unsigned char v3020_get_reg(struct v3020 *chip, unsigned char address)
  172. {
  173. unsigned int data = 0;
  174. int i;
  175. for (i = 0; i < 4; i++) {
  176. chip->ops->write_bit(chip, (address & 1));
  177. address >>= 1;
  178. udelay(1);
  179. }
  180. for (i = 0; i < 8; i++) {
  181. data >>= 1;
  182. if (chip->ops->read_bit(chip))
  183. data |= 0x80;
  184. udelay(1);
  185. }
  186. return data;
  187. }
  188. static int v3020_read_time(struct device *dev, struct rtc_time *dt)
  189. {
  190. struct v3020 *chip = dev_get_drvdata(dev);
  191. int tmp;
  192. /* Copy the current time to ram... */
  193. v3020_set_reg(chip, V3020_CMD_CLOCK2RAM, 0);
  194. /* ...and then read constant values. */
  195. tmp = v3020_get_reg(chip, V3020_SECONDS);
  196. dt->tm_sec = bcd2bin(tmp);
  197. tmp = v3020_get_reg(chip, V3020_MINUTES);
  198. dt->tm_min = bcd2bin(tmp);
  199. tmp = v3020_get_reg(chip, V3020_HOURS);
  200. dt->tm_hour = bcd2bin(tmp);
  201. tmp = v3020_get_reg(chip, V3020_MONTH_DAY);
  202. dt->tm_mday = bcd2bin(tmp);
  203. tmp = v3020_get_reg(chip, V3020_MONTH);
  204. dt->tm_mon = bcd2bin(tmp) - 1;
  205. tmp = v3020_get_reg(chip, V3020_WEEK_DAY);
  206. dt->tm_wday = bcd2bin(tmp);
  207. tmp = v3020_get_reg(chip, V3020_YEAR);
  208. dt->tm_year = bcd2bin(tmp)+100;
  209. dev_dbg(dev, "\n%s : Read RTC values\n", __func__);
  210. dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour);
  211. dev_dbg(dev, "tm_min : %i\n", dt->tm_min);
  212. dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec);
  213. dev_dbg(dev, "tm_year: %i\n", dt->tm_year);
  214. dev_dbg(dev, "tm_mon : %i\n", dt->tm_mon);
  215. dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday);
  216. dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday);
  217. return 0;
  218. }
  219. static int v3020_set_time(struct device *dev, struct rtc_time *dt)
  220. {
  221. struct v3020 *chip = dev_get_drvdata(dev);
  222. dev_dbg(dev, "\n%s : Setting RTC values\n", __func__);
  223. dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec);
  224. dev_dbg(dev, "tm_min : %i\n", dt->tm_min);
  225. dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour);
  226. dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday);
  227. dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday);
  228. dev_dbg(dev, "tm_year: %i\n", dt->tm_year);
  229. /* Write all the values to ram... */
  230. v3020_set_reg(chip, V3020_SECONDS, bin2bcd(dt->tm_sec));
  231. v3020_set_reg(chip, V3020_MINUTES, bin2bcd(dt->tm_min));
  232. v3020_set_reg(chip, V3020_HOURS, bin2bcd(dt->tm_hour));
  233. v3020_set_reg(chip, V3020_MONTH_DAY, bin2bcd(dt->tm_mday));
  234. v3020_set_reg(chip, V3020_MONTH, bin2bcd(dt->tm_mon + 1));
  235. v3020_set_reg(chip, V3020_WEEK_DAY, bin2bcd(dt->tm_wday));
  236. v3020_set_reg(chip, V3020_YEAR, bin2bcd(dt->tm_year % 100));
  237. /* ...and set the clock. */
  238. v3020_set_reg(chip, V3020_CMD_RAM2CLOCK, 0);
  239. /* Compulab used this delay here. I dont know why,
  240. * the datasheet does not specify a delay. */
  241. /*mdelay(5);*/
  242. return 0;
  243. }
  244. static const struct rtc_class_ops v3020_rtc_ops = {
  245. .read_time = v3020_read_time,
  246. .set_time = v3020_set_time,
  247. };
  248. static int rtc_probe(struct platform_device *pdev)
  249. {
  250. struct v3020_platform_data *pdata = pdev->dev.platform_data;
  251. struct v3020 *chip;
  252. int retval = -EBUSY;
  253. int i;
  254. int temp;
  255. chip = kzalloc(sizeof *chip, GFP_KERNEL);
  256. if (!chip)
  257. return -ENOMEM;
  258. if (pdata->use_gpio)
  259. chip->ops = &v3020_gpio_ops;
  260. else
  261. chip->ops = &v3020_mmio_ops;
  262. retval = chip->ops->map_io(chip, pdev, pdata);
  263. if (retval)
  264. goto err_chip;
  265. /* Make sure the v3020 expects a communication cycle
  266. * by reading 8 times */
  267. for (i = 0; i < 8; i++)
  268. temp = chip->ops->read_bit(chip);
  269. /* Test chip by doing a write/read sequence
  270. * to the chip ram */
  271. v3020_set_reg(chip, V3020_SECONDS, 0x33);
  272. if (v3020_get_reg(chip, V3020_SECONDS) != 0x33) {
  273. retval = -ENODEV;
  274. goto err_io;
  275. }
  276. /* Make sure frequency measurement mode, test modes, and lock
  277. * are all disabled */
  278. v3020_set_reg(chip, V3020_STATUS_0, 0x0);
  279. if (pdata->use_gpio)
  280. dev_info(&pdev->dev, "Chip available at GPIOs "
  281. "%d, %d, %d, %d\n",
  282. chip->gpio[V3020_CS].gpio, chip->gpio[V3020_WR].gpio,
  283. chip->gpio[V3020_RD].gpio, chip->gpio[V3020_IO].gpio);
  284. else
  285. dev_info(&pdev->dev, "Chip available at "
  286. "physical address 0x%llx,"
  287. "data connected to D%d\n",
  288. (unsigned long long)pdev->resource[0].start,
  289. chip->leftshift);
  290. platform_set_drvdata(pdev, chip);
  291. chip->rtc = rtc_device_register("v3020",
  292. &pdev->dev, &v3020_rtc_ops, THIS_MODULE);
  293. if (IS_ERR(chip->rtc)) {
  294. retval = PTR_ERR(chip->rtc);
  295. goto err_io;
  296. }
  297. return 0;
  298. err_io:
  299. chip->ops->unmap_io(chip);
  300. err_chip:
  301. kfree(chip);
  302. return retval;
  303. }
  304. static int rtc_remove(struct platform_device *dev)
  305. {
  306. struct v3020 *chip = platform_get_drvdata(dev);
  307. struct rtc_device *rtc = chip->rtc;
  308. if (rtc)
  309. rtc_device_unregister(rtc);
  310. chip->ops->unmap_io(chip);
  311. kfree(chip);
  312. return 0;
  313. }
  314. static struct platform_driver rtc_device_driver = {
  315. .probe = rtc_probe,
  316. .remove = rtc_remove,
  317. .driver = {
  318. .name = "v3020",
  319. .owner = THIS_MODULE,
  320. },
  321. };
  322. module_platform_driver(rtc_device_driver);
  323. MODULE_DESCRIPTION("V3020 RTC");
  324. MODULE_AUTHOR("Raphael Assenat");
  325. MODULE_LICENSE("GPL");
  326. MODULE_ALIAS("platform:v3020");