cx18-i2c.c 9.4 KB

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  1. /*
  2. * cx18 I2C functions
  3. *
  4. * Derived from ivtv-i2c.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-cards.h"
  27. #include "cx18-gpio.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-irq.h"
  30. #define CX18_REG_I2C_1_WR 0xf15000
  31. #define CX18_REG_I2C_1_RD 0xf15008
  32. #define CX18_REG_I2C_2_WR 0xf25100
  33. #define CX18_REG_I2C_2_RD 0xf25108
  34. #define SETSCL_BIT 0x0001
  35. #define SETSDL_BIT 0x0002
  36. #define GETSCL_BIT 0x0004
  37. #define GETSDL_BIT 0x0008
  38. #define CX18_CS5345_I2C_ADDR 0x4c
  39. #define CX18_Z8F0811_IR_TX_I2C_ADDR 0x70
  40. #define CX18_Z8F0811_IR_RX_I2C_ADDR 0x71
  41. /* This array should match the CX18_HW_ defines */
  42. static const u8 hw_addrs[] = {
  43. 0, /* CX18_HW_TUNER */
  44. 0, /* CX18_HW_TVEEPROM */
  45. CX18_CS5345_I2C_ADDR, /* CX18_HW_CS5345 */
  46. 0, /* CX18_HW_DVB */
  47. 0, /* CX18_HW_418_AV */
  48. 0, /* CX18_HW_GPIO_MUX */
  49. 0, /* CX18_HW_GPIO_RESET_CTRL */
  50. CX18_Z8F0811_IR_TX_I2C_ADDR, /* CX18_HW_Z8F0811_IR_TX_HAUP */
  51. CX18_Z8F0811_IR_RX_I2C_ADDR, /* CX18_HW_Z8F0811_IR_RX_HAUP */
  52. };
  53. /* This array should match the CX18_HW_ defines */
  54. /* This might well become a card-specific array */
  55. static const u8 hw_bus[] = {
  56. 1, /* CX18_HW_TUNER */
  57. 0, /* CX18_HW_TVEEPROM */
  58. 0, /* CX18_HW_CS5345 */
  59. 0, /* CX18_HW_DVB */
  60. 0, /* CX18_HW_418_AV */
  61. 0, /* CX18_HW_GPIO_MUX */
  62. 0, /* CX18_HW_GPIO_RESET_CTRL */
  63. 0, /* CX18_HW_Z8F0811_IR_TX_HAUP */
  64. 0, /* CX18_HW_Z8F0811_IR_RX_HAUP */
  65. };
  66. /* This array should match the CX18_HW_ defines */
  67. static const char * const hw_devicenames[] = {
  68. "tuner",
  69. "tveeprom",
  70. "cs5345",
  71. "cx23418_DTV",
  72. "cx23418_AV",
  73. "gpio_mux",
  74. "gpio_reset_ctrl",
  75. "ir_tx_z8f0811_haup",
  76. "ir_rx_z8f0811_haup",
  77. };
  78. static int cx18_i2c_new_ir(struct cx18 *cx, struct i2c_adapter *adap, u32 hw,
  79. const char *type, u8 addr)
  80. {
  81. struct i2c_board_info info;
  82. struct IR_i2c_init_data *init_data = &cx->ir_i2c_init_data;
  83. unsigned short addr_list[2] = { addr, I2C_CLIENT_END };
  84. memset(&info, 0, sizeof(struct i2c_board_info));
  85. strlcpy(info.type, type, I2C_NAME_SIZE);
  86. /* Our default information for ir-kbd-i2c.c to use */
  87. switch (hw) {
  88. case CX18_HW_Z8F0811_IR_RX_HAUP:
  89. init_data->ir_codes = RC_MAP_HAUPPAUGE;
  90. init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
  91. init_data->type = RC_TYPE_RC5;
  92. init_data->name = cx->card_name;
  93. info.platform_data = init_data;
  94. break;
  95. }
  96. return i2c_new_probed_device(adap, &info, addr_list, NULL) == NULL ?
  97. -1 : 0;
  98. }
  99. int cx18_i2c_register(struct cx18 *cx, unsigned idx)
  100. {
  101. struct v4l2_subdev *sd;
  102. int bus = hw_bus[idx];
  103. struct i2c_adapter *adap = &cx->i2c_adap[bus];
  104. const char *type = hw_devicenames[idx];
  105. u32 hw = 1 << idx;
  106. if (idx >= ARRAY_SIZE(hw_addrs))
  107. return -1;
  108. if (hw == CX18_HW_TUNER) {
  109. /* special tuner group handling */
  110. sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
  111. adap, type, 0, cx->card_i2c->radio);
  112. if (sd != NULL)
  113. sd->grp_id = hw;
  114. sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
  115. adap, type, 0, cx->card_i2c->demod);
  116. if (sd != NULL)
  117. sd->grp_id = hw;
  118. sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
  119. adap, type, 0, cx->card_i2c->tv);
  120. if (sd != NULL)
  121. sd->grp_id = hw;
  122. return sd != NULL ? 0 : -1;
  123. }
  124. if (hw & CX18_HW_IR_ANY)
  125. return cx18_i2c_new_ir(cx, adap, hw, type, hw_addrs[idx]);
  126. /* Is it not an I2C device or one we do not wish to register? */
  127. if (!hw_addrs[idx])
  128. return -1;
  129. /* It's an I2C device other than an analog tuner or IR chip */
  130. sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, type, hw_addrs[idx],
  131. NULL);
  132. if (sd != NULL)
  133. sd->grp_id = hw;
  134. return sd != NULL ? 0 : -1;
  135. }
  136. /* Find the first member of the subdev group id in hw */
  137. struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
  138. {
  139. struct v4l2_subdev *result = NULL;
  140. struct v4l2_subdev *sd;
  141. spin_lock(&cx->v4l2_dev.lock);
  142. v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
  143. if (sd->grp_id == hw) {
  144. result = sd;
  145. break;
  146. }
  147. }
  148. spin_unlock(&cx->v4l2_dev.lock);
  149. return result;
  150. }
  151. static void cx18_setscl(void *data, int state)
  152. {
  153. struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
  154. int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
  155. u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
  156. u32 r = cx18_read_reg(cx, addr);
  157. if (state)
  158. cx18_write_reg(cx, r | SETSCL_BIT, addr);
  159. else
  160. cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
  161. }
  162. static void cx18_setsda(void *data, int state)
  163. {
  164. struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
  165. int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
  166. u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
  167. u32 r = cx18_read_reg(cx, addr);
  168. if (state)
  169. cx18_write_reg(cx, r | SETSDL_BIT, addr);
  170. else
  171. cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
  172. }
  173. static int cx18_getscl(void *data)
  174. {
  175. struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
  176. int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
  177. u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
  178. return cx18_read_reg(cx, addr) & GETSCL_BIT;
  179. }
  180. static int cx18_getsda(void *data)
  181. {
  182. struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
  183. int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
  184. u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
  185. return cx18_read_reg(cx, addr) & GETSDL_BIT;
  186. }
  187. /* template for i2c-bit-algo */
  188. static struct i2c_adapter cx18_i2c_adap_template = {
  189. .name = "cx18 i2c driver",
  190. .algo = NULL, /* set by i2c-algo-bit */
  191. .algo_data = NULL, /* filled from template */
  192. .owner = THIS_MODULE,
  193. };
  194. #define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
  195. #define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */
  196. static struct i2c_algo_bit_data cx18_i2c_algo_template = {
  197. .setsda = cx18_setsda,
  198. .setscl = cx18_setscl,
  199. .getsda = cx18_getsda,
  200. .getscl = cx18_getscl,
  201. .udelay = CX18_SCL_PERIOD/2, /* 1/2 clock period in usec*/
  202. .timeout = CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
  203. };
  204. /* init + register i2c adapter */
  205. int init_cx18_i2c(struct cx18 *cx)
  206. {
  207. int i, err;
  208. CX18_DEBUG_I2C("i2c init\n");
  209. for (i = 0; i < 2; i++) {
  210. /* Setup algorithm for adapter */
  211. memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
  212. sizeof(struct i2c_algo_bit_data));
  213. cx->i2c_algo_cb_data[i].cx = cx;
  214. cx->i2c_algo_cb_data[i].bus_index = i;
  215. cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
  216. /* Setup adapter */
  217. memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
  218. sizeof(struct i2c_adapter));
  219. cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
  220. sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
  221. " #%d-%d", cx->instance, i);
  222. i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
  223. cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
  224. }
  225. if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
  226. /* Reset/Unreset I2C hardware block */
  227. /* Clock select 220MHz */
  228. cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
  229. 0x00000000, 0x10001000);
  230. /* Clock Enable */
  231. cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
  232. 0x00001000, 0x10001000);
  233. }
  234. /* courtesy of Steven Toth <stoth@hauppauge.com> */
  235. cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
  236. mdelay(10);
  237. cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
  238. mdelay(10);
  239. cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
  240. mdelay(10);
  241. /* Set to edge-triggered intrs. */
  242. cx18_write_reg(cx, 0x00c00000, 0xc730c8);
  243. /* Clear any stale intrs */
  244. cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
  245. ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
  246. /* Hw I2C1 Clock Freq ~100kHz */
  247. cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
  248. cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
  249. cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
  250. /* Hw I2C2 Clock Freq ~100kHz */
  251. cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
  252. cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
  253. cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
  254. cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
  255. core, reset, (u32) CX18_GPIO_RESET_I2C);
  256. err = i2c_bit_add_bus(&cx->i2c_adap[0]);
  257. if (err)
  258. goto err;
  259. err = i2c_bit_add_bus(&cx->i2c_adap[1]);
  260. if (err)
  261. goto err_del_bus_0;
  262. return 0;
  263. err_del_bus_0:
  264. i2c_del_adapter(&cx->i2c_adap[0]);
  265. err:
  266. return err;
  267. }
  268. void exit_cx18_i2c(struct cx18 *cx)
  269. {
  270. int i;
  271. CX18_DEBUG_I2C("i2c exit\n");
  272. cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
  273. CX18_REG_I2C_1_WR);
  274. cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
  275. CX18_REG_I2C_2_WR);
  276. for (i = 0; i < 2; i++) {
  277. i2c_del_adapter(&cx->i2c_adap[i]);
  278. }
  279. }
  280. /*
  281. Hauppauge HVR1600 should have:
  282. 32 cx24227
  283. 98 unknown
  284. a0 eeprom
  285. c2 tuner
  286. e? zilog ir
  287. */