omap-cpufreq.c 8.0 KB

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  1. /*
  2. * CPU frequency scaling for OMAP using OPP information
  3. *
  4. * Copyright (C) 2005 Nokia Corporation
  5. * Written by Tony Lindgren <tony@atomide.com>
  6. *
  7. * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
  8. *
  9. * Copyright (C) 2007-2011 Texas Instruments, Inc.
  10. * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/kernel.h>
  18. #include <linux/sched.h>
  19. #include <linux/cpufreq.h>
  20. #include <linux/delay.h>
  21. #include <linux/init.h>
  22. #include <linux/err.h>
  23. #include <linux/clk.h>
  24. #include <linux/io.h>
  25. #include <linux/opp.h>
  26. #include <linux/cpu.h>
  27. #include <linux/module.h>
  28. #include <linux/regulator/consumer.h>
  29. #include <asm/smp_plat.h>
  30. #include <asm/cpu.h>
  31. #include <plat/clock.h>
  32. #include <plat/omap-pm.h>
  33. #include <plat/common.h>
  34. #include <plat/omap_device.h>
  35. #include <mach/hardware.h>
  36. /* OPP tolerance in percentage */
  37. #define OPP_TOLERANCE 4
  38. #ifdef CONFIG_SMP
  39. struct lpj_info {
  40. unsigned long ref;
  41. unsigned int freq;
  42. };
  43. static DEFINE_PER_CPU(struct lpj_info, lpj_ref);
  44. static struct lpj_info global_lpj_ref;
  45. #endif
  46. static struct cpufreq_frequency_table *freq_table;
  47. static atomic_t freq_table_users = ATOMIC_INIT(0);
  48. static struct clk *mpu_clk;
  49. static char *mpu_clk_name;
  50. static struct device *mpu_dev;
  51. static struct regulator *mpu_reg;
  52. static int omap_verify_speed(struct cpufreq_policy *policy)
  53. {
  54. if (!freq_table)
  55. return -EINVAL;
  56. return cpufreq_frequency_table_verify(policy, freq_table);
  57. }
  58. static unsigned int omap_getspeed(unsigned int cpu)
  59. {
  60. unsigned long rate;
  61. if (cpu >= NR_CPUS)
  62. return 0;
  63. rate = clk_get_rate(mpu_clk) / 1000;
  64. return rate;
  65. }
  66. static int omap_target(struct cpufreq_policy *policy,
  67. unsigned int target_freq,
  68. unsigned int relation)
  69. {
  70. unsigned int i;
  71. int r, ret = 0;
  72. struct cpufreq_freqs freqs;
  73. struct opp *opp;
  74. unsigned long freq, volt = 0, volt_old = 0, tol = 0;
  75. if (!freq_table) {
  76. dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__,
  77. policy->cpu);
  78. return -EINVAL;
  79. }
  80. ret = cpufreq_frequency_table_target(policy, freq_table, target_freq,
  81. relation, &i);
  82. if (ret) {
  83. dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n",
  84. __func__, policy->cpu, target_freq, ret);
  85. return ret;
  86. }
  87. freqs.new = freq_table[i].frequency;
  88. if (!freqs.new) {
  89. dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__,
  90. policy->cpu, target_freq);
  91. return -EINVAL;
  92. }
  93. freqs.old = omap_getspeed(policy->cpu);
  94. freqs.cpu = policy->cpu;
  95. if (freqs.old == freqs.new && policy->cur == freqs.new)
  96. return ret;
  97. /* notifiers */
  98. for_each_cpu(i, policy->cpus) {
  99. freqs.cpu = i;
  100. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  101. }
  102. freq = freqs.new * 1000;
  103. if (mpu_reg) {
  104. opp = opp_find_freq_ceil(mpu_dev, &freq);
  105. if (IS_ERR(opp)) {
  106. dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n",
  107. __func__, freqs.new);
  108. return -EINVAL;
  109. }
  110. volt = opp_get_voltage(opp);
  111. tol = volt * OPP_TOLERANCE / 100;
  112. volt_old = regulator_get_voltage(mpu_reg);
  113. }
  114. dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n",
  115. freqs.old / 1000, volt_old ? volt_old / 1000 : -1,
  116. freqs.new / 1000, volt ? volt / 1000 : -1);
  117. /* scaling up? scale voltage before frequency */
  118. if (mpu_reg && (freqs.new > freqs.old)) {
  119. r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
  120. if (r < 0) {
  121. dev_warn(mpu_dev, "%s: unable to scale voltage up.\n",
  122. __func__);
  123. freqs.new = freqs.old;
  124. goto done;
  125. }
  126. }
  127. ret = clk_set_rate(mpu_clk, freqs.new * 1000);
  128. /* scaling down? scale voltage after frequency */
  129. if (mpu_reg && (freqs.new < freqs.old)) {
  130. r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
  131. if (r < 0) {
  132. dev_warn(mpu_dev, "%s: unable to scale voltage down.\n",
  133. __func__);
  134. ret = clk_set_rate(mpu_clk, freqs.old * 1000);
  135. freqs.new = freqs.old;
  136. goto done;
  137. }
  138. }
  139. freqs.new = omap_getspeed(policy->cpu);
  140. #ifdef CONFIG_SMP
  141. /*
  142. * Note that loops_per_jiffy is not updated on SMP systems in
  143. * cpufreq driver. So, update the per-CPU loops_per_jiffy value
  144. * on frequency transition. We need to update all dependent CPUs.
  145. */
  146. for_each_cpu(i, policy->cpus) {
  147. struct lpj_info *lpj = &per_cpu(lpj_ref, i);
  148. if (!lpj->freq) {
  149. lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy;
  150. lpj->freq = freqs.old;
  151. }
  152. per_cpu(cpu_data, i).loops_per_jiffy =
  153. cpufreq_scale(lpj->ref, lpj->freq, freqs.new);
  154. }
  155. /* And don't forget to adjust the global one */
  156. if (!global_lpj_ref.freq) {
  157. global_lpj_ref.ref = loops_per_jiffy;
  158. global_lpj_ref.freq = freqs.old;
  159. }
  160. loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq,
  161. freqs.new);
  162. #endif
  163. done:
  164. /* notifiers */
  165. for_each_cpu(i, policy->cpus) {
  166. freqs.cpu = i;
  167. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  168. }
  169. return ret;
  170. }
  171. static inline void freq_table_free(void)
  172. {
  173. if (atomic_dec_and_test(&freq_table_users))
  174. opp_free_cpufreq_table(mpu_dev, &freq_table);
  175. }
  176. static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
  177. {
  178. int result = 0;
  179. mpu_clk = clk_get(NULL, mpu_clk_name);
  180. if (IS_ERR(mpu_clk))
  181. return PTR_ERR(mpu_clk);
  182. if (policy->cpu >= NR_CPUS) {
  183. result = -EINVAL;
  184. goto fail_ck;
  185. }
  186. policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu);
  187. if (atomic_inc_return(&freq_table_users) == 1)
  188. result = opp_init_cpufreq_table(mpu_dev, &freq_table);
  189. if (result) {
  190. dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n",
  191. __func__, policy->cpu, result);
  192. goto fail_ck;
  193. }
  194. result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
  195. if (result)
  196. goto fail_table;
  197. cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
  198. policy->min = policy->cpuinfo.min_freq;
  199. policy->max = policy->cpuinfo.max_freq;
  200. policy->cur = omap_getspeed(policy->cpu);
  201. /*
  202. * On OMAP SMP configuartion, both processors share the voltage
  203. * and clock. So both CPUs needs to be scaled together and hence
  204. * needs software co-ordination. Use cpufreq affected_cpus
  205. * interface to handle this scenario. Additional is_smp() check
  206. * is to keep SMP_ON_UP build working.
  207. */
  208. if (is_smp()) {
  209. policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
  210. cpumask_setall(policy->cpus);
  211. }
  212. /* FIXME: what's the actual transition time? */
  213. policy->cpuinfo.transition_latency = 300 * 1000;
  214. return 0;
  215. fail_table:
  216. freq_table_free();
  217. fail_ck:
  218. clk_put(mpu_clk);
  219. return result;
  220. }
  221. static int omap_cpu_exit(struct cpufreq_policy *policy)
  222. {
  223. freq_table_free();
  224. clk_put(mpu_clk);
  225. return 0;
  226. }
  227. static struct freq_attr *omap_cpufreq_attr[] = {
  228. &cpufreq_freq_attr_scaling_available_freqs,
  229. NULL,
  230. };
  231. static struct cpufreq_driver omap_driver = {
  232. .flags = CPUFREQ_STICKY,
  233. .verify = omap_verify_speed,
  234. .target = omap_target,
  235. .get = omap_getspeed,
  236. .init = omap_cpu_init,
  237. .exit = omap_cpu_exit,
  238. .name = "omap",
  239. .attr = omap_cpufreq_attr,
  240. };
  241. static int __init omap_cpufreq_init(void)
  242. {
  243. if (cpu_is_omap24xx())
  244. mpu_clk_name = "virt_prcm_set";
  245. else if (cpu_is_omap34xx())
  246. mpu_clk_name = "dpll1_ck";
  247. else if (cpu_is_omap44xx())
  248. mpu_clk_name = "dpll_mpu_ck";
  249. if (!mpu_clk_name) {
  250. pr_err("%s: unsupported Silicon?\n", __func__);
  251. return -EINVAL;
  252. }
  253. mpu_dev = omap_device_get_by_hwmod_name("mpu");
  254. if (!mpu_dev) {
  255. pr_warning("%s: unable to get the mpu device\n", __func__);
  256. return -EINVAL;
  257. }
  258. mpu_reg = regulator_get(mpu_dev, "vcc");
  259. if (IS_ERR(mpu_reg)) {
  260. pr_warning("%s: unable to get MPU regulator\n", __func__);
  261. mpu_reg = NULL;
  262. } else {
  263. /*
  264. * Ensure physical regulator is present.
  265. * (e.g. could be dummy regulator.)
  266. */
  267. if (regulator_get_voltage(mpu_reg) < 0) {
  268. pr_warn("%s: physical regulator not present for MPU\n",
  269. __func__);
  270. regulator_put(mpu_reg);
  271. mpu_reg = NULL;
  272. }
  273. }
  274. return cpufreq_register_driver(&omap_driver);
  275. }
  276. static void __exit omap_cpufreq_exit(void)
  277. {
  278. cpufreq_unregister_driver(&omap_driver);
  279. }
  280. MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
  281. MODULE_LICENSE("GPL");
  282. module_init(omap_cpufreq_init);
  283. module_exit(omap_cpufreq_exit);