hpet.c 24 KB

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  1. /*
  2. * Intel & MS High Precision Event Timer Implementation.
  3. *
  4. * Copyright (C) 2003 Intel Corporation
  5. * Venki Pallipadi
  6. * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
  7. * Bob Picco <robert.picco@hp.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/interrupt.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/miscdevice.h>
  18. #include <linux/major.h>
  19. #include <linux/ioport.h>
  20. #include <linux/fcntl.h>
  21. #include <linux/init.h>
  22. #include <linux/poll.h>
  23. #include <linux/mm.h>
  24. #include <linux/proc_fs.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/sysctl.h>
  27. #include <linux/wait.h>
  28. #include <linux/bcd.h>
  29. #include <linux/seq_file.h>
  30. #include <linux/bitops.h>
  31. #include <linux/compat.h>
  32. #include <linux/clocksource.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/slab.h>
  35. #include <linux/io.h>
  36. #include <asm/current.h>
  37. #include <asm/irq.h>
  38. #include <asm/div64.h>
  39. #include <linux/acpi.h>
  40. #include <acpi/acpi_bus.h>
  41. #include <linux/hpet.h>
  42. /*
  43. * The High Precision Event Timer driver.
  44. * This driver is closely modelled after the rtc.c driver.
  45. * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
  46. */
  47. #define HPET_USER_FREQ (64)
  48. #define HPET_DRIFT (500)
  49. #define HPET_RANGE_SIZE 1024 /* from HPET spec */
  50. /* WARNING -- don't get confused. These macros are never used
  51. * to write the (single) counter, and rarely to read it.
  52. * They're badly named; to fix, someday.
  53. */
  54. #if BITS_PER_LONG == 64
  55. #define write_counter(V, MC) writeq(V, MC)
  56. #define read_counter(MC) readq(MC)
  57. #else
  58. #define write_counter(V, MC) writel(V, MC)
  59. #define read_counter(MC) readl(MC)
  60. #endif
  61. static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
  62. static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
  63. /* This clocksource driver currently only works on ia64 */
  64. #ifdef CONFIG_IA64
  65. static void __iomem *hpet_mctr;
  66. static cycle_t read_hpet(struct clocksource *cs)
  67. {
  68. return (cycle_t)read_counter((void __iomem *)hpet_mctr);
  69. }
  70. static struct clocksource clocksource_hpet = {
  71. .name = "hpet",
  72. .rating = 250,
  73. .read = read_hpet,
  74. .mask = CLOCKSOURCE_MASK(64),
  75. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  76. };
  77. static struct clocksource *hpet_clocksource;
  78. #endif
  79. /* A lock for concurrent access by app and isr hpet activity. */
  80. static DEFINE_SPINLOCK(hpet_lock);
  81. #define HPET_DEV_NAME (7)
  82. struct hpet_dev {
  83. struct hpets *hd_hpets;
  84. struct hpet __iomem *hd_hpet;
  85. struct hpet_timer __iomem *hd_timer;
  86. unsigned long hd_ireqfreq;
  87. unsigned long hd_irqdata;
  88. wait_queue_head_t hd_waitqueue;
  89. struct fasync_struct *hd_async_queue;
  90. unsigned int hd_flags;
  91. unsigned int hd_irq;
  92. unsigned int hd_hdwirq;
  93. char hd_name[HPET_DEV_NAME];
  94. };
  95. struct hpets {
  96. struct hpets *hp_next;
  97. struct hpet __iomem *hp_hpet;
  98. unsigned long hp_hpet_phys;
  99. struct clocksource *hp_clocksource;
  100. unsigned long long hp_tick_freq;
  101. unsigned long hp_delta;
  102. unsigned int hp_ntimer;
  103. unsigned int hp_which;
  104. struct hpet_dev hp_dev[1];
  105. };
  106. static struct hpets *hpets;
  107. #define HPET_OPEN 0x0001
  108. #define HPET_IE 0x0002 /* interrupt enabled */
  109. #define HPET_PERIODIC 0x0004
  110. #define HPET_SHARED_IRQ 0x0008
  111. #ifndef readq
  112. static inline unsigned long long readq(void __iomem *addr)
  113. {
  114. return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
  115. }
  116. #endif
  117. #ifndef writeq
  118. static inline void writeq(unsigned long long v, void __iomem *addr)
  119. {
  120. writel(v & 0xffffffff, addr);
  121. writel(v >> 32, addr + 4);
  122. }
  123. #endif
  124. static irqreturn_t hpet_interrupt(int irq, void *data)
  125. {
  126. struct hpet_dev *devp;
  127. unsigned long isr;
  128. devp = data;
  129. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  130. if ((devp->hd_flags & HPET_SHARED_IRQ) &&
  131. !(isr & readl(&devp->hd_hpet->hpet_isr)))
  132. return IRQ_NONE;
  133. spin_lock(&hpet_lock);
  134. devp->hd_irqdata++;
  135. /*
  136. * For non-periodic timers, increment the accumulator.
  137. * This has the effect of treating non-periodic like periodic.
  138. */
  139. if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
  140. unsigned long m, t, mc, base, k;
  141. struct hpet __iomem *hpet = devp->hd_hpet;
  142. struct hpets *hpetp = devp->hd_hpets;
  143. t = devp->hd_ireqfreq;
  144. m = read_counter(&devp->hd_timer->hpet_compare);
  145. mc = read_counter(&hpet->hpet_mc);
  146. /* The time for the next interrupt would logically be t + m,
  147. * however, if we are very unlucky and the interrupt is delayed
  148. * for longer than t then we will completely miss the next
  149. * interrupt if we set t + m and an application will hang.
  150. * Therefore we need to make a more complex computation assuming
  151. * that there exists a k for which the following is true:
  152. * k * t + base < mc + delta
  153. * (k + 1) * t + base > mc + delta
  154. * where t is the interval in hpet ticks for the given freq,
  155. * base is the theoretical start value 0 < base < t,
  156. * mc is the main counter value at the time of the interrupt,
  157. * delta is the time it takes to write the a value to the
  158. * comparator.
  159. * k may then be computed as (mc - base + delta) / t .
  160. */
  161. base = mc % t;
  162. k = (mc - base + hpetp->hp_delta) / t;
  163. write_counter(t * (k + 1) + base,
  164. &devp->hd_timer->hpet_compare);
  165. }
  166. if (devp->hd_flags & HPET_SHARED_IRQ)
  167. writel(isr, &devp->hd_hpet->hpet_isr);
  168. spin_unlock(&hpet_lock);
  169. wake_up_interruptible(&devp->hd_waitqueue);
  170. kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
  171. return IRQ_HANDLED;
  172. }
  173. static void hpet_timer_set_irq(struct hpet_dev *devp)
  174. {
  175. unsigned long v;
  176. int irq, gsi;
  177. struct hpet_timer __iomem *timer;
  178. spin_lock_irq(&hpet_lock);
  179. if (devp->hd_hdwirq) {
  180. spin_unlock_irq(&hpet_lock);
  181. return;
  182. }
  183. timer = devp->hd_timer;
  184. /* we prefer level triggered mode */
  185. v = readl(&timer->hpet_config);
  186. if (!(v & Tn_INT_TYPE_CNF_MASK)) {
  187. v |= Tn_INT_TYPE_CNF_MASK;
  188. writel(v, &timer->hpet_config);
  189. }
  190. spin_unlock_irq(&hpet_lock);
  191. v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
  192. Tn_INT_ROUTE_CAP_SHIFT;
  193. /*
  194. * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
  195. * legacy device. In IO APIC mode, we skip all the legacy IRQS.
  196. */
  197. if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
  198. v &= ~0xf3df;
  199. else
  200. v &= ~0xffff;
  201. for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
  202. if (irq >= nr_irqs) {
  203. irq = HPET_MAX_IRQ;
  204. break;
  205. }
  206. gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
  207. ACPI_ACTIVE_LOW);
  208. if (gsi > 0)
  209. break;
  210. /* FIXME: Setup interrupt source table */
  211. }
  212. if (irq < HPET_MAX_IRQ) {
  213. spin_lock_irq(&hpet_lock);
  214. v = readl(&timer->hpet_config);
  215. v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
  216. writel(v, &timer->hpet_config);
  217. devp->hd_hdwirq = gsi;
  218. spin_unlock_irq(&hpet_lock);
  219. }
  220. return;
  221. }
  222. static int hpet_open(struct inode *inode, struct file *file)
  223. {
  224. struct hpet_dev *devp;
  225. struct hpets *hpetp;
  226. int i;
  227. if (file->f_mode & FMODE_WRITE)
  228. return -EINVAL;
  229. mutex_lock(&hpet_mutex);
  230. spin_lock_irq(&hpet_lock);
  231. for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
  232. for (i = 0; i < hpetp->hp_ntimer; i++)
  233. if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
  234. continue;
  235. else {
  236. devp = &hpetp->hp_dev[i];
  237. break;
  238. }
  239. if (!devp) {
  240. spin_unlock_irq(&hpet_lock);
  241. mutex_unlock(&hpet_mutex);
  242. return -EBUSY;
  243. }
  244. file->private_data = devp;
  245. devp->hd_irqdata = 0;
  246. devp->hd_flags |= HPET_OPEN;
  247. spin_unlock_irq(&hpet_lock);
  248. mutex_unlock(&hpet_mutex);
  249. hpet_timer_set_irq(devp);
  250. return 0;
  251. }
  252. static ssize_t
  253. hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
  254. {
  255. DECLARE_WAITQUEUE(wait, current);
  256. unsigned long data;
  257. ssize_t retval;
  258. struct hpet_dev *devp;
  259. devp = file->private_data;
  260. if (!devp->hd_ireqfreq)
  261. return -EIO;
  262. if (count < sizeof(unsigned long))
  263. return -EINVAL;
  264. add_wait_queue(&devp->hd_waitqueue, &wait);
  265. for ( ; ; ) {
  266. set_current_state(TASK_INTERRUPTIBLE);
  267. spin_lock_irq(&hpet_lock);
  268. data = devp->hd_irqdata;
  269. devp->hd_irqdata = 0;
  270. spin_unlock_irq(&hpet_lock);
  271. if (data)
  272. break;
  273. else if (file->f_flags & O_NONBLOCK) {
  274. retval = -EAGAIN;
  275. goto out;
  276. } else if (signal_pending(current)) {
  277. retval = -ERESTARTSYS;
  278. goto out;
  279. }
  280. schedule();
  281. }
  282. retval = put_user(data, (unsigned long __user *)buf);
  283. if (!retval)
  284. retval = sizeof(unsigned long);
  285. out:
  286. __set_current_state(TASK_RUNNING);
  287. remove_wait_queue(&devp->hd_waitqueue, &wait);
  288. return retval;
  289. }
  290. static unsigned int hpet_poll(struct file *file, poll_table * wait)
  291. {
  292. unsigned long v;
  293. struct hpet_dev *devp;
  294. devp = file->private_data;
  295. if (!devp->hd_ireqfreq)
  296. return 0;
  297. poll_wait(file, &devp->hd_waitqueue, wait);
  298. spin_lock_irq(&hpet_lock);
  299. v = devp->hd_irqdata;
  300. spin_unlock_irq(&hpet_lock);
  301. if (v != 0)
  302. return POLLIN | POLLRDNORM;
  303. return 0;
  304. }
  305. static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
  306. {
  307. #ifdef CONFIG_HPET_MMAP
  308. struct hpet_dev *devp;
  309. unsigned long addr;
  310. devp = file->private_data;
  311. addr = devp->hd_hpets->hp_hpet_phys;
  312. if (addr & (PAGE_SIZE - 1))
  313. return -ENOSYS;
  314. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  315. return vm_iomap_memory(vma, addr, PAGE_SIZE);
  316. #else
  317. return -ENOSYS;
  318. #endif
  319. }
  320. static int hpet_fasync(int fd, struct file *file, int on)
  321. {
  322. struct hpet_dev *devp;
  323. devp = file->private_data;
  324. if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
  325. return 0;
  326. else
  327. return -EIO;
  328. }
  329. static int hpet_release(struct inode *inode, struct file *file)
  330. {
  331. struct hpet_dev *devp;
  332. struct hpet_timer __iomem *timer;
  333. int irq = 0;
  334. devp = file->private_data;
  335. timer = devp->hd_timer;
  336. spin_lock_irq(&hpet_lock);
  337. writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
  338. &timer->hpet_config);
  339. irq = devp->hd_irq;
  340. devp->hd_irq = 0;
  341. devp->hd_ireqfreq = 0;
  342. if (devp->hd_flags & HPET_PERIODIC
  343. && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  344. unsigned long v;
  345. v = readq(&timer->hpet_config);
  346. v ^= Tn_TYPE_CNF_MASK;
  347. writeq(v, &timer->hpet_config);
  348. }
  349. devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
  350. spin_unlock_irq(&hpet_lock);
  351. if (irq)
  352. free_irq(irq, devp);
  353. file->private_data = NULL;
  354. return 0;
  355. }
  356. static int hpet_ioctl_ieon(struct hpet_dev *devp)
  357. {
  358. struct hpet_timer __iomem *timer;
  359. struct hpet __iomem *hpet;
  360. struct hpets *hpetp;
  361. int irq;
  362. unsigned long g, v, t, m;
  363. unsigned long flags, isr;
  364. timer = devp->hd_timer;
  365. hpet = devp->hd_hpet;
  366. hpetp = devp->hd_hpets;
  367. if (!devp->hd_ireqfreq)
  368. return -EIO;
  369. spin_lock_irq(&hpet_lock);
  370. if (devp->hd_flags & HPET_IE) {
  371. spin_unlock_irq(&hpet_lock);
  372. return -EBUSY;
  373. }
  374. devp->hd_flags |= HPET_IE;
  375. if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
  376. devp->hd_flags |= HPET_SHARED_IRQ;
  377. spin_unlock_irq(&hpet_lock);
  378. irq = devp->hd_hdwirq;
  379. if (irq) {
  380. unsigned long irq_flags;
  381. if (devp->hd_flags & HPET_SHARED_IRQ) {
  382. /*
  383. * To prevent the interrupt handler from seeing an
  384. * unwanted interrupt status bit, program the timer
  385. * so that it will not fire in the near future ...
  386. */
  387. writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
  388. &timer->hpet_config);
  389. write_counter(read_counter(&hpet->hpet_mc),
  390. &timer->hpet_compare);
  391. /* ... and clear any left-over status. */
  392. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  393. writel(isr, &hpet->hpet_isr);
  394. }
  395. sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
  396. irq_flags = devp->hd_flags & HPET_SHARED_IRQ
  397. ? IRQF_SHARED : IRQF_DISABLED;
  398. if (request_irq(irq, hpet_interrupt, irq_flags,
  399. devp->hd_name, (void *)devp)) {
  400. printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
  401. irq = 0;
  402. }
  403. }
  404. if (irq == 0) {
  405. spin_lock_irq(&hpet_lock);
  406. devp->hd_flags ^= HPET_IE;
  407. spin_unlock_irq(&hpet_lock);
  408. return -EIO;
  409. }
  410. devp->hd_irq = irq;
  411. t = devp->hd_ireqfreq;
  412. v = readq(&timer->hpet_config);
  413. /* 64-bit comparators are not yet supported through the ioctls,
  414. * so force this into 32-bit mode if it supports both modes
  415. */
  416. g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
  417. if (devp->hd_flags & HPET_PERIODIC) {
  418. g |= Tn_TYPE_CNF_MASK;
  419. v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
  420. writeq(v, &timer->hpet_config);
  421. local_irq_save(flags);
  422. /*
  423. * NOTE: First we modify the hidden accumulator
  424. * register supported by periodic-capable comparators.
  425. * We never want to modify the (single) counter; that
  426. * would affect all the comparators. The value written
  427. * is the counter value when the first interrupt is due.
  428. */
  429. m = read_counter(&hpet->hpet_mc);
  430. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  431. /*
  432. * Then we modify the comparator, indicating the period
  433. * for subsequent interrupt.
  434. */
  435. write_counter(t, &timer->hpet_compare);
  436. } else {
  437. local_irq_save(flags);
  438. m = read_counter(&hpet->hpet_mc);
  439. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  440. }
  441. if (devp->hd_flags & HPET_SHARED_IRQ) {
  442. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  443. writel(isr, &hpet->hpet_isr);
  444. }
  445. writeq(g, &timer->hpet_config);
  446. local_irq_restore(flags);
  447. return 0;
  448. }
  449. /* converts Hz to number of timer ticks */
  450. static inline unsigned long hpet_time_div(struct hpets *hpets,
  451. unsigned long dis)
  452. {
  453. unsigned long long m;
  454. m = hpets->hp_tick_freq + (dis >> 1);
  455. do_div(m, dis);
  456. return (unsigned long)m;
  457. }
  458. static int
  459. hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
  460. struct hpet_info *info)
  461. {
  462. struct hpet_timer __iomem *timer;
  463. struct hpet __iomem *hpet;
  464. struct hpets *hpetp;
  465. int err;
  466. unsigned long v;
  467. switch (cmd) {
  468. case HPET_IE_OFF:
  469. case HPET_INFO:
  470. case HPET_EPI:
  471. case HPET_DPI:
  472. case HPET_IRQFREQ:
  473. timer = devp->hd_timer;
  474. hpet = devp->hd_hpet;
  475. hpetp = devp->hd_hpets;
  476. break;
  477. case HPET_IE_ON:
  478. return hpet_ioctl_ieon(devp);
  479. default:
  480. return -EINVAL;
  481. }
  482. err = 0;
  483. switch (cmd) {
  484. case HPET_IE_OFF:
  485. if ((devp->hd_flags & HPET_IE) == 0)
  486. break;
  487. v = readq(&timer->hpet_config);
  488. v &= ~Tn_INT_ENB_CNF_MASK;
  489. writeq(v, &timer->hpet_config);
  490. if (devp->hd_irq) {
  491. free_irq(devp->hd_irq, devp);
  492. devp->hd_irq = 0;
  493. }
  494. devp->hd_flags ^= HPET_IE;
  495. break;
  496. case HPET_INFO:
  497. {
  498. memset(info, 0, sizeof(*info));
  499. if (devp->hd_ireqfreq)
  500. info->hi_ireqfreq =
  501. hpet_time_div(hpetp, devp->hd_ireqfreq);
  502. info->hi_flags =
  503. readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
  504. info->hi_hpet = hpetp->hp_which;
  505. info->hi_timer = devp - hpetp->hp_dev;
  506. break;
  507. }
  508. case HPET_EPI:
  509. v = readq(&timer->hpet_config);
  510. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  511. err = -ENXIO;
  512. break;
  513. }
  514. devp->hd_flags |= HPET_PERIODIC;
  515. break;
  516. case HPET_DPI:
  517. v = readq(&timer->hpet_config);
  518. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  519. err = -ENXIO;
  520. break;
  521. }
  522. if (devp->hd_flags & HPET_PERIODIC &&
  523. readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  524. v = readq(&timer->hpet_config);
  525. v ^= Tn_TYPE_CNF_MASK;
  526. writeq(v, &timer->hpet_config);
  527. }
  528. devp->hd_flags &= ~HPET_PERIODIC;
  529. break;
  530. case HPET_IRQFREQ:
  531. if ((arg > hpet_max_freq) &&
  532. !capable(CAP_SYS_RESOURCE)) {
  533. err = -EACCES;
  534. break;
  535. }
  536. if (!arg) {
  537. err = -EINVAL;
  538. break;
  539. }
  540. devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
  541. }
  542. return err;
  543. }
  544. static long
  545. hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  546. {
  547. struct hpet_info info;
  548. int err;
  549. mutex_lock(&hpet_mutex);
  550. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  551. mutex_unlock(&hpet_mutex);
  552. if ((cmd == HPET_INFO) && !err &&
  553. (copy_to_user((void __user *)arg, &info, sizeof(info))))
  554. err = -EFAULT;
  555. return err;
  556. }
  557. #ifdef CONFIG_COMPAT
  558. struct compat_hpet_info {
  559. compat_ulong_t hi_ireqfreq; /* Hz */
  560. compat_ulong_t hi_flags; /* information */
  561. unsigned short hi_hpet;
  562. unsigned short hi_timer;
  563. };
  564. static long
  565. hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  566. {
  567. struct hpet_info info;
  568. int err;
  569. mutex_lock(&hpet_mutex);
  570. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  571. mutex_unlock(&hpet_mutex);
  572. if ((cmd == HPET_INFO) && !err) {
  573. struct compat_hpet_info __user *u = compat_ptr(arg);
  574. if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
  575. put_user(info.hi_flags, &u->hi_flags) ||
  576. put_user(info.hi_hpet, &u->hi_hpet) ||
  577. put_user(info.hi_timer, &u->hi_timer))
  578. err = -EFAULT;
  579. }
  580. return err;
  581. }
  582. #endif
  583. static const struct file_operations hpet_fops = {
  584. .owner = THIS_MODULE,
  585. .llseek = no_llseek,
  586. .read = hpet_read,
  587. .poll = hpet_poll,
  588. .unlocked_ioctl = hpet_ioctl,
  589. #ifdef CONFIG_COMPAT
  590. .compat_ioctl = hpet_compat_ioctl,
  591. #endif
  592. .open = hpet_open,
  593. .release = hpet_release,
  594. .fasync = hpet_fasync,
  595. .mmap = hpet_mmap,
  596. };
  597. static int hpet_is_known(struct hpet_data *hdp)
  598. {
  599. struct hpets *hpetp;
  600. for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
  601. if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
  602. return 1;
  603. return 0;
  604. }
  605. static ctl_table hpet_table[] = {
  606. {
  607. .procname = "max-user-freq",
  608. .data = &hpet_max_freq,
  609. .maxlen = sizeof(int),
  610. .mode = 0644,
  611. .proc_handler = proc_dointvec,
  612. },
  613. {}
  614. };
  615. static ctl_table hpet_root[] = {
  616. {
  617. .procname = "hpet",
  618. .maxlen = 0,
  619. .mode = 0555,
  620. .child = hpet_table,
  621. },
  622. {}
  623. };
  624. static ctl_table dev_root[] = {
  625. {
  626. .procname = "dev",
  627. .maxlen = 0,
  628. .mode = 0555,
  629. .child = hpet_root,
  630. },
  631. {}
  632. };
  633. static struct ctl_table_header *sysctl_header;
  634. /*
  635. * Adjustment for when arming the timer with
  636. * initial conditions. That is, main counter
  637. * ticks expired before interrupts are enabled.
  638. */
  639. #define TICK_CALIBRATE (1000UL)
  640. static unsigned long __hpet_calibrate(struct hpets *hpetp)
  641. {
  642. struct hpet_timer __iomem *timer = NULL;
  643. unsigned long t, m, count, i, flags, start;
  644. struct hpet_dev *devp;
  645. int j;
  646. struct hpet __iomem *hpet;
  647. for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
  648. if ((devp->hd_flags & HPET_OPEN) == 0) {
  649. timer = devp->hd_timer;
  650. break;
  651. }
  652. if (!timer)
  653. return 0;
  654. hpet = hpetp->hp_hpet;
  655. t = read_counter(&timer->hpet_compare);
  656. i = 0;
  657. count = hpet_time_div(hpetp, TICK_CALIBRATE);
  658. local_irq_save(flags);
  659. start = read_counter(&hpet->hpet_mc);
  660. do {
  661. m = read_counter(&hpet->hpet_mc);
  662. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  663. } while (i++, (m - start) < count);
  664. local_irq_restore(flags);
  665. return (m - start) / i;
  666. }
  667. static unsigned long hpet_calibrate(struct hpets *hpetp)
  668. {
  669. unsigned long ret = -1;
  670. unsigned long tmp;
  671. /*
  672. * Try to calibrate until return value becomes stable small value.
  673. * If SMI interruption occurs in calibration loop, the return value
  674. * will be big. This avoids its impact.
  675. */
  676. for ( ; ; ) {
  677. tmp = __hpet_calibrate(hpetp);
  678. if (ret <= tmp)
  679. break;
  680. ret = tmp;
  681. }
  682. return ret;
  683. }
  684. int hpet_alloc(struct hpet_data *hdp)
  685. {
  686. u64 cap, mcfg;
  687. struct hpet_dev *devp;
  688. u32 i, ntimer;
  689. struct hpets *hpetp;
  690. size_t siz;
  691. struct hpet __iomem *hpet;
  692. static struct hpets *last;
  693. unsigned long period;
  694. unsigned long long temp;
  695. u32 remainder;
  696. /*
  697. * hpet_alloc can be called by platform dependent code.
  698. * If platform dependent code has allocated the hpet that
  699. * ACPI has also reported, then we catch it here.
  700. */
  701. if (hpet_is_known(hdp)) {
  702. printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
  703. __func__);
  704. return 0;
  705. }
  706. siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
  707. sizeof(struct hpet_dev));
  708. hpetp = kzalloc(siz, GFP_KERNEL);
  709. if (!hpetp)
  710. return -ENOMEM;
  711. hpetp->hp_which = hpet_nhpet++;
  712. hpetp->hp_hpet = hdp->hd_address;
  713. hpetp->hp_hpet_phys = hdp->hd_phys_address;
  714. hpetp->hp_ntimer = hdp->hd_nirqs;
  715. for (i = 0; i < hdp->hd_nirqs; i++)
  716. hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
  717. hpet = hpetp->hp_hpet;
  718. cap = readq(&hpet->hpet_cap);
  719. ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
  720. if (hpetp->hp_ntimer != ntimer) {
  721. printk(KERN_WARNING "hpet: number irqs doesn't agree"
  722. " with number of timers\n");
  723. kfree(hpetp);
  724. return -ENODEV;
  725. }
  726. if (last)
  727. last->hp_next = hpetp;
  728. else
  729. hpets = hpetp;
  730. last = hpetp;
  731. period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
  732. HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
  733. temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
  734. temp += period >> 1; /* round */
  735. do_div(temp, period);
  736. hpetp->hp_tick_freq = temp; /* ticks per second */
  737. printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
  738. hpetp->hp_which, hdp->hd_phys_address,
  739. hpetp->hp_ntimer > 1 ? "s" : "");
  740. for (i = 0; i < hpetp->hp_ntimer; i++)
  741. printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
  742. printk(KERN_CONT "\n");
  743. temp = hpetp->hp_tick_freq;
  744. remainder = do_div(temp, 1000000);
  745. printk(KERN_INFO
  746. "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
  747. hpetp->hp_which, hpetp->hp_ntimer,
  748. cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
  749. (unsigned) temp, remainder);
  750. mcfg = readq(&hpet->hpet_config);
  751. if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
  752. write_counter(0L, &hpet->hpet_mc);
  753. mcfg |= HPET_ENABLE_CNF_MASK;
  754. writeq(mcfg, &hpet->hpet_config);
  755. }
  756. for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
  757. struct hpet_timer __iomem *timer;
  758. timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
  759. devp->hd_hpets = hpetp;
  760. devp->hd_hpet = hpet;
  761. devp->hd_timer = timer;
  762. /*
  763. * If the timer was reserved by platform code,
  764. * then make timer unavailable for opens.
  765. */
  766. if (hdp->hd_state & (1 << i)) {
  767. devp->hd_flags = HPET_OPEN;
  768. continue;
  769. }
  770. init_waitqueue_head(&devp->hd_waitqueue);
  771. }
  772. hpetp->hp_delta = hpet_calibrate(hpetp);
  773. /* This clocksource driver currently only works on ia64 */
  774. #ifdef CONFIG_IA64
  775. if (!hpet_clocksource) {
  776. hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
  777. clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
  778. clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
  779. hpetp->hp_clocksource = &clocksource_hpet;
  780. hpet_clocksource = &clocksource_hpet;
  781. }
  782. #endif
  783. return 0;
  784. }
  785. static acpi_status hpet_resources(struct acpi_resource *res, void *data)
  786. {
  787. struct hpet_data *hdp;
  788. acpi_status status;
  789. struct acpi_resource_address64 addr;
  790. hdp = data;
  791. status = acpi_resource_to_address64(res, &addr);
  792. if (ACPI_SUCCESS(status)) {
  793. hdp->hd_phys_address = addr.minimum;
  794. hdp->hd_address = ioremap(addr.minimum, addr.address_length);
  795. if (hpet_is_known(hdp)) {
  796. iounmap(hdp->hd_address);
  797. return AE_ALREADY_EXISTS;
  798. }
  799. } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
  800. struct acpi_resource_fixed_memory32 *fixmem32;
  801. fixmem32 = &res->data.fixed_memory32;
  802. if (!fixmem32)
  803. return AE_NO_MEMORY;
  804. hdp->hd_phys_address = fixmem32->address;
  805. hdp->hd_address = ioremap(fixmem32->address,
  806. HPET_RANGE_SIZE);
  807. if (hpet_is_known(hdp)) {
  808. iounmap(hdp->hd_address);
  809. return AE_ALREADY_EXISTS;
  810. }
  811. } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
  812. struct acpi_resource_extended_irq *irqp;
  813. int i, irq;
  814. irqp = &res->data.extended_irq;
  815. for (i = 0; i < irqp->interrupt_count; i++) {
  816. irq = acpi_register_gsi(NULL, irqp->interrupts[i],
  817. irqp->triggering, irqp->polarity);
  818. if (irq < 0)
  819. return AE_ERROR;
  820. hdp->hd_irq[hdp->hd_nirqs] = irq;
  821. hdp->hd_nirqs++;
  822. }
  823. }
  824. return AE_OK;
  825. }
  826. static int hpet_acpi_add(struct acpi_device *device)
  827. {
  828. acpi_status result;
  829. struct hpet_data data;
  830. memset(&data, 0, sizeof(data));
  831. result =
  832. acpi_walk_resources(device->handle, METHOD_NAME__CRS,
  833. hpet_resources, &data);
  834. if (ACPI_FAILURE(result))
  835. return -ENODEV;
  836. if (!data.hd_address || !data.hd_nirqs) {
  837. if (data.hd_address)
  838. iounmap(data.hd_address);
  839. printk("%s: no address or irqs in _CRS\n", __func__);
  840. return -ENODEV;
  841. }
  842. return hpet_alloc(&data);
  843. }
  844. static int hpet_acpi_remove(struct acpi_device *device, int type)
  845. {
  846. /* XXX need to unregister clocksource, dealloc mem, etc */
  847. return -EINVAL;
  848. }
  849. static const struct acpi_device_id hpet_device_ids[] = {
  850. {"PNP0103", 0},
  851. {"", 0},
  852. };
  853. MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
  854. static struct acpi_driver hpet_acpi_driver = {
  855. .name = "hpet",
  856. .ids = hpet_device_ids,
  857. .ops = {
  858. .add = hpet_acpi_add,
  859. .remove = hpet_acpi_remove,
  860. },
  861. };
  862. static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
  863. static int __init hpet_init(void)
  864. {
  865. int result;
  866. result = misc_register(&hpet_misc);
  867. if (result < 0)
  868. return -ENODEV;
  869. sysctl_header = register_sysctl_table(dev_root);
  870. result = acpi_bus_register_driver(&hpet_acpi_driver);
  871. if (result < 0) {
  872. if (sysctl_header)
  873. unregister_sysctl_table(sysctl_header);
  874. misc_deregister(&hpet_misc);
  875. return result;
  876. }
  877. return 0;
  878. }
  879. static void __exit hpet_exit(void)
  880. {
  881. acpi_bus_unregister_driver(&hpet_acpi_driver);
  882. if (sysctl_header)
  883. unregister_sysctl_table(sysctl_header);
  884. misc_deregister(&hpet_misc);
  885. return;
  886. }
  887. module_init(hpet_init);
  888. module_exit(hpet_exit);
  889. MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
  890. MODULE_LICENSE("GPL");