h7201-regs.h 2.3 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768
  1. /*
  2. * arch/arm/mach-h720x/include/mach/h7201-regs.h
  3. *
  4. * Copyright (C) 2000 Jungjun Kim, Hynix Semiconductor Inc.
  5. * (C) 2003 Thomas Gleixner <tglx@linutronix.de>
  6. * (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>
  7. * (C) 2004 Sascha Hauer <s.hauer@pengutronix.de>
  8. *
  9. * This file contains the hardware definitions of the h720x processors
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. *
  15. * Do not add implementations specific defines here. This files contains
  16. * only defines of the onchip peripherals. Add those defines to boards.h,
  17. * which is included by this file.
  18. */
  19. #define SERIAL2_VIRT (IO_VIRT + 0x50100)
  20. #define SERIAL3_VIRT (IO_VIRT + 0x50200)
  21. /*
  22. * PCMCIA
  23. */
  24. #define PCMCIA0_ATT_BASE 0xe5000000
  25. #define PCMCIA0_ATT_SIZE 0x00200000
  26. #define PCMCIA0_ATT_START 0x20000000
  27. #define PCMCIA0_MEM_BASE 0xe5200000
  28. #define PCMCIA0_MEM_SIZE 0x00200000
  29. #define PCMCIA0_MEM_START 0x24000000
  30. #define PCMCIA0_IO_BASE 0xe5400000
  31. #define PCMCIA0_IO_SIZE 0x00200000
  32. #define PCMCIA0_IO_START 0x28000000
  33. #define PCMCIA1_ATT_BASE 0xe5600000
  34. #define PCMCIA1_ATT_SIZE 0x00200000
  35. #define PCMCIA1_ATT_START 0x30000000
  36. #define PCMCIA1_MEM_BASE 0xe5800000
  37. #define PCMCIA1_MEM_SIZE 0x00200000
  38. #define PCMCIA1_MEM_START 0x34000000
  39. #define PCMCIA1_IO_BASE 0xe5a00000
  40. #define PCMCIA1_IO_SIZE 0x00200000
  41. #define PCMCIA1_IO_START 0x38000000
  42. #define PRIME3C_BASE 0xf0050000
  43. #define PRIME3C_SIZE 0x00001000
  44. #define PRIME3C_START 0x10000000
  45. /* VGA Controller */
  46. #define VGA_RAMBASE 0x50
  47. #define VGA_TIMING0 0x60
  48. #define VGA_TIMING1 0x64
  49. #define VGA_TIMING2 0x68
  50. #define VGA_TIMING3 0x6c
  51. #define LCD_CTRL_VGA_ENABLE 0x00000100
  52. #define LCD_CTRL_VGA_BPP_MASK 0x00000600
  53. #define LCD_CTRL_VGA_4BPP 0x00000000
  54. #define LCD_CTRL_VGA_8BPP 0x00000200
  55. #define LCD_CTRL_VGA_16BPP 0x00000300
  56. #define LCD_CTRL_SHARE_DMA 0x00000800
  57. #define LCD_CTRL_VDE 0x00100000
  58. #define LCD_CTRL_LPE 0x00400000 /* LCD Power enable */
  59. #define LCD_CTRL_BLE 0x00800000 /* LCD backlight enable */
  60. #define VGA_PALETTE_BASE (IO_VIRT + 0x10800)