fsl-tsec-phy.txt 4.9 KB

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  1. * MDIO IO device
  2. The MDIO is a bus to which the PHY devices are connected. For each
  3. device that exists on this bus, a child node should be created. See
  4. the definition of the PHY node in booting-without-of.txt for an example
  5. of how to define a PHY.
  6. Required properties:
  7. - reg : Offset and length of the register set for the device
  8. - compatible : Should define the compatible device type for the
  9. mdio. Currently, this is most likely to be "fsl,gianfar-mdio"
  10. Example:
  11. mdio@24520 {
  12. reg = <24520 20>;
  13. compatible = "fsl,gianfar-mdio";
  14. ethernet-phy@0 {
  15. ......
  16. };
  17. };
  18. * TBI Internal MDIO bus
  19. As of this writing, every tsec is associated with an internal TBI PHY.
  20. This PHY is accessed through the local MDIO bus. These buses are defined
  21. similarly to the mdio buses, except they are compatible with "fsl,gianfar-tbi".
  22. The TBI PHYs underneath them are similar to normal PHYs, but the reg property
  23. is considered instructive, rather than descriptive. The reg property should
  24. be chosen so it doesn't interfere with other PHYs on the bus.
  25. * Gianfar-compatible ethernet nodes
  26. Properties:
  27. - device_type : Should be "network"
  28. - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
  29. - compatible : Should be "gianfar"
  30. - reg : Offset and length of the register set for the device
  31. - local-mac-address : List of bytes representing the ethernet address of
  32. this controller
  33. - interrupts : For FEC devices, the first interrupt is the device's
  34. interrupt. For TSEC and eTSEC devices, the first interrupt is
  35. transmit, the second is receive, and the third is error.
  36. - phy-handle : The phandle for the PHY connected to this ethernet
  37. controller.
  38. - fixed-link : <a b c d e> where a is emulated phy id - choose any,
  39. but unique to the all specified fixed-links, b is duplex - 0 half,
  40. 1 full, c is link speed - d#10/d#100/d#1000, d is pause - 0 no
  41. pause, 1 pause, e is asym_pause - 0 no asym_pause, 1 asym_pause.
  42. - phy-connection-type : a string naming the controller/PHY interface type,
  43. i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii",
  44. "tbi", or "rtbi". This property is only really needed if the connection
  45. is of type "rgmii-id", as all other connection types are detected by
  46. hardware.
  47. - fsl,magic-packet : If present, indicates that the hardware supports
  48. waking up via magic packet.
  49. - bd-stash : If present, indicates that the hardware supports stashing
  50. buffer descriptors in the L2.
  51. - rx-stash-len : Denotes the number of bytes of a received buffer to stash
  52. in the L2.
  53. - rx-stash-idx : Denotes the index of the first byte from the received
  54. buffer to stash in the L2.
  55. Example:
  56. ethernet@24000 {
  57. device_type = "network";
  58. model = "TSEC";
  59. compatible = "gianfar";
  60. reg = <0x24000 0x1000>;
  61. local-mac-address = [ 00 E0 0C 00 73 00 ];
  62. interrupts = <29 2 30 2 34 2>;
  63. interrupt-parent = <&mpic>;
  64. phy-handle = <&phy0>
  65. };
  66. * Gianfar PTP clock nodes
  67. General Properties:
  68. - compatible Should be "fsl,etsec-ptp"
  69. - reg Offset and length of the register set for the device
  70. - interrupts There should be at least two interrupts. Some devices
  71. have as many as four PTP related interrupts.
  72. Clock Properties:
  73. - fsl,tclk-period Timer reference clock period in nanoseconds.
  74. - fsl,tmr-prsc Prescaler, divides the output clock.
  75. - fsl,tmr-add Frequency compensation value.
  76. - fsl,tmr-fiper1 Fixed interval period pulse generator.
  77. - fsl,tmr-fiper2 Fixed interval period pulse generator.
  78. - fsl,max-adj Maximum frequency adjustment in parts per billion.
  79. These properties set the operational parameters for the PTP
  80. clock. You must choose these carefully for the clock to work right.
  81. Here is how to figure good values:
  82. TimerOsc = system clock MHz
  83. tclk_period = desired clock period nanoseconds
  84. NominalFreq = 1000 / tclk_period MHz
  85. FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
  86. tmr_add = ceil(2^32 / FreqDivRatio)
  87. OutputClock = NominalFreq / tmr_prsc MHz
  88. PulseWidth = 1 / OutputClock microseconds
  89. FiperFreq1 = desired frequency in Hz
  90. FiperDiv1 = 1000000 * OutputClock / FiperFreq1
  91. tmr_fiper1 = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
  92. max_adj = 1000000000 * (FreqDivRatio - 1.0) - 1
  93. The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
  94. driver expects that tmr_fiper1 will be correctly set to produce a 1
  95. Pulse Per Second (PPS) signal, since this will be offered to the PPS
  96. subsystem to synchronize the Linux clock.
  97. Example:
  98. ptp_clock@24E00 {
  99. compatible = "fsl,etsec-ptp";
  100. reg = <0x24E00 0xB0>;
  101. interrupts = <12 0x8 13 0x8>;
  102. interrupt-parent = < &ipic >;
  103. fsl,tclk-period = <10>;
  104. fsl,tmr-prsc = <100>;
  105. fsl,tmr-add = <0x999999A4>;
  106. fsl,tmr-fiper1 = <0x3B9AC9F6>;
  107. fsl,tmr-fiper2 = <0x00018696>;
  108. fsl,max-adj = <659999998>;
  109. };