DMA-API.txt 27 KB

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  1. Dynamic DMA mapping using the generic device
  2. ============================================
  3. James E.J. Bottomley <James.Bottomley@HansenPartnership.com>
  4. This document describes the DMA API. For a more gentle introduction
  5. of the API (and actual examples) see
  6. Documentation/DMA-API-HOWTO.txt.
  7. This API is split into two pieces. Part I describes the API. Part II
  8. describes the extensions to the API for supporting non-consistent
  9. memory machines. Unless you know that your driver absolutely has to
  10. support non-consistent platforms (this is usually only legacy
  11. platforms) you should only use the API described in part I.
  12. Part I - dma_ API
  13. -------------------------------------
  14. To get the dma_ API, you must #include <linux/dma-mapping.h>
  15. Part Ia - Using large dma-coherent buffers
  16. ------------------------------------------
  17. void *
  18. dma_alloc_coherent(struct device *dev, size_t size,
  19. dma_addr_t *dma_handle, gfp_t flag)
  20. Consistent memory is memory for which a write by either the device or
  21. the processor can immediately be read by the processor or device
  22. without having to worry about caching effects. (You may however need
  23. to make sure to flush the processor's write buffers before telling
  24. devices to read that memory.)
  25. This routine allocates a region of <size> bytes of consistent memory.
  26. It also returns a <dma_handle> which may be cast to an unsigned
  27. integer the same width as the bus and used as the physical address
  28. base of the region.
  29. Returns: a pointer to the allocated region (in the processor's virtual
  30. address space) or NULL if the allocation failed.
  31. Note: consistent memory can be expensive on some platforms, and the
  32. minimum allocation length may be as big as a page, so you should
  33. consolidate your requests for consistent memory as much as possible.
  34. The simplest way to do that is to use the dma_pool calls (see below).
  35. The flag parameter (dma_alloc_coherent only) allows the caller to
  36. specify the GFP_ flags (see kmalloc) for the allocation (the
  37. implementation may choose to ignore flags that affect the location of
  38. the returned memory, like GFP_DMA).
  39. void *
  40. dma_zalloc_coherent(struct device *dev, size_t size,
  41. dma_addr_t *dma_handle, gfp_t flag)
  42. Wraps dma_alloc_coherent() and also zeroes the returned memory if the
  43. allocation attempt succeeded.
  44. void
  45. dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
  46. dma_addr_t dma_handle)
  47. Free the region of consistent memory you previously allocated. dev,
  48. size and dma_handle must all be the same as those passed into the
  49. consistent allocate. cpu_addr must be the virtual address returned by
  50. the consistent allocate.
  51. Note that unlike their sibling allocation calls, these routines
  52. may only be called with IRQs enabled.
  53. Part Ib - Using small dma-coherent buffers
  54. ------------------------------------------
  55. To get this part of the dma_ API, you must #include <linux/dmapool.h>
  56. Many drivers need lots of small dma-coherent memory regions for DMA
  57. descriptors or I/O buffers. Rather than allocating in units of a page
  58. or more using dma_alloc_coherent(), you can use DMA pools. These work
  59. much like a struct kmem_cache, except that they use the dma-coherent allocator,
  60. not __get_free_pages(). Also, they understand common hardware constraints
  61. for alignment, like queue heads needing to be aligned on N-byte boundaries.
  62. struct dma_pool *
  63. dma_pool_create(const char *name, struct device *dev,
  64. size_t size, size_t align, size_t alloc);
  65. The pool create() routines initialize a pool of dma-coherent buffers
  66. for use with a given device. It must be called in a context which
  67. can sleep.
  68. The "name" is for diagnostics (like a struct kmem_cache name); dev and size
  69. are like what you'd pass to dma_alloc_coherent(). The device's hardware
  70. alignment requirement for this type of data is "align" (which is expressed
  71. in bytes, and must be a power of two). If your device has no boundary
  72. crossing restrictions, pass 0 for alloc; passing 4096 says memory allocated
  73. from this pool must not cross 4KByte boundaries.
  74. void *dma_pool_alloc(struct dma_pool *pool, gfp_t gfp_flags,
  75. dma_addr_t *dma_handle);
  76. This allocates memory from the pool; the returned memory will meet the size
  77. and alignment requirements specified at creation time. Pass GFP_ATOMIC to
  78. prevent blocking, or if it's permitted (not in_interrupt, not holding SMP locks),
  79. pass GFP_KERNEL to allow blocking. Like dma_alloc_coherent(), this returns
  80. two values: an address usable by the cpu, and the dma address usable by the
  81. pool's device.
  82. void dma_pool_free(struct dma_pool *pool, void *vaddr,
  83. dma_addr_t addr);
  84. This puts memory back into the pool. The pool is what was passed to
  85. the pool allocation routine; the cpu (vaddr) and dma addresses are what
  86. were returned when that routine allocated the memory being freed.
  87. void dma_pool_destroy(struct dma_pool *pool);
  88. The pool destroy() routines free the resources of the pool. They must be
  89. called in a context which can sleep. Make sure you've freed all allocated
  90. memory back to the pool before you destroy it.
  91. Part Ic - DMA addressing limitations
  92. ------------------------------------
  93. int
  94. dma_supported(struct device *dev, u64 mask)
  95. Checks to see if the device can support DMA to the memory described by
  96. mask.
  97. Returns: 1 if it can and 0 if it can't.
  98. Notes: This routine merely tests to see if the mask is possible. It
  99. won't change the current mask settings. It is more intended as an
  100. internal API for use by the platform than an external API for use by
  101. driver writers.
  102. int
  103. dma_set_mask(struct device *dev, u64 mask)
  104. Checks to see if the mask is possible and updates the device
  105. parameters if it is.
  106. Returns: 0 if successful and a negative error if not.
  107. int
  108. dma_set_coherent_mask(struct device *dev, u64 mask)
  109. Checks to see if the mask is possible and updates the device
  110. parameters if it is.
  111. Returns: 0 if successful and a negative error if not.
  112. u64
  113. dma_get_required_mask(struct device *dev)
  114. This API returns the mask that the platform requires to
  115. operate efficiently. Usually this means the returned mask
  116. is the minimum required to cover all of memory. Examining the
  117. required mask gives drivers with variable descriptor sizes the
  118. opportunity to use smaller descriptors as necessary.
  119. Requesting the required mask does not alter the current mask. If you
  120. wish to take advantage of it, you should issue a dma_set_mask()
  121. call to set the mask to the value returned.
  122. Part Id - Streaming DMA mappings
  123. --------------------------------
  124. dma_addr_t
  125. dma_map_single(struct device *dev, void *cpu_addr, size_t size,
  126. enum dma_data_direction direction)
  127. Maps a piece of processor virtual memory so it can be accessed by the
  128. device and returns the physical handle of the memory.
  129. The direction for both api's may be converted freely by casting.
  130. However the dma_ API uses a strongly typed enumerator for its
  131. direction:
  132. DMA_NONE no direction (used for debugging)
  133. DMA_TO_DEVICE data is going from the memory to the device
  134. DMA_FROM_DEVICE data is coming from the device to the memory
  135. DMA_BIDIRECTIONAL direction isn't known
  136. Notes: Not all memory regions in a machine can be mapped by this
  137. API. Further, regions that appear to be physically contiguous in
  138. kernel virtual space may not be contiguous as physical memory. Since
  139. this API does not provide any scatter/gather capability, it will fail
  140. if the user tries to map a non-physically contiguous piece of memory.
  141. For this reason, it is recommended that memory mapped by this API be
  142. obtained only from sources which guarantee it to be physically contiguous
  143. (like kmalloc).
  144. Further, the physical address of the memory must be within the
  145. dma_mask of the device (the dma_mask represents a bit mask of the
  146. addressable region for the device. I.e., if the physical address of
  147. the memory anded with the dma_mask is still equal to the physical
  148. address, then the device can perform DMA to the memory). In order to
  149. ensure that the memory allocated by kmalloc is within the dma_mask,
  150. the driver may specify various platform-dependent flags to restrict
  151. the physical memory range of the allocation (e.g. on x86, GFP_DMA
  152. guarantees to be within the first 16Mb of available physical memory,
  153. as required by ISA devices).
  154. Note also that the above constraints on physical contiguity and
  155. dma_mask may not apply if the platform has an IOMMU (a device which
  156. supplies a physical to virtual mapping between the I/O memory bus and
  157. the device). However, to be portable, device driver writers may *not*
  158. assume that such an IOMMU exists.
  159. Warnings: Memory coherency operates at a granularity called the cache
  160. line width. In order for memory mapped by this API to operate
  161. correctly, the mapped region must begin exactly on a cache line
  162. boundary and end exactly on one (to prevent two separately mapped
  163. regions from sharing a single cache line). Since the cache line size
  164. may not be known at compile time, the API will not enforce this
  165. requirement. Therefore, it is recommended that driver writers who
  166. don't take special care to determine the cache line size at run time
  167. only map virtual regions that begin and end on page boundaries (which
  168. are guaranteed also to be cache line boundaries).
  169. DMA_TO_DEVICE synchronisation must be done after the last modification
  170. of the memory region by the software and before it is handed off to
  171. the driver. Once this primitive is used, memory covered by this
  172. primitive should be treated as read-only by the device. If the device
  173. may write to it at any point, it should be DMA_BIDIRECTIONAL (see
  174. below).
  175. DMA_FROM_DEVICE synchronisation must be done before the driver
  176. accesses data that may be changed by the device. This memory should
  177. be treated as read-only by the driver. If the driver needs to write
  178. to it at any point, it should be DMA_BIDIRECTIONAL (see below).
  179. DMA_BIDIRECTIONAL requires special handling: it means that the driver
  180. isn't sure if the memory was modified before being handed off to the
  181. device and also isn't sure if the device will also modify it. Thus,
  182. you must always sync bidirectional memory twice: once before the
  183. memory is handed off to the device (to make sure all memory changes
  184. are flushed from the processor) and once before the data may be
  185. accessed after being used by the device (to make sure any processor
  186. cache lines are updated with data that the device may have changed).
  187. void
  188. dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
  189. enum dma_data_direction direction)
  190. Unmaps the region previously mapped. All the parameters passed in
  191. must be identical to those passed in (and returned) by the mapping
  192. API.
  193. dma_addr_t
  194. dma_map_page(struct device *dev, struct page *page,
  195. unsigned long offset, size_t size,
  196. enum dma_data_direction direction)
  197. void
  198. dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
  199. enum dma_data_direction direction)
  200. API for mapping and unmapping for pages. All the notes and warnings
  201. for the other mapping APIs apply here. Also, although the <offset>
  202. and <size> parameters are provided to do partial page mapping, it is
  203. recommended that you never use these unless you really know what the
  204. cache width is.
  205. int
  206. dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  207. In some circumstances dma_map_single and dma_map_page will fail to create
  208. a mapping. A driver can check for these errors by testing the returned
  209. dma address with dma_mapping_error(). A non-zero return value means the mapping
  210. could not be created and the driver should take appropriate action (e.g.
  211. reduce current DMA mapping usage or delay and try again later).
  212. int
  213. dma_map_sg(struct device *dev, struct scatterlist *sg,
  214. int nents, enum dma_data_direction direction)
  215. Returns: the number of physical segments mapped (this may be shorter
  216. than <nents> passed in if some elements of the scatter/gather list are
  217. physically or virtually adjacent and an IOMMU maps them with a single
  218. entry).
  219. Please note that the sg cannot be mapped again if it has been mapped once.
  220. The mapping process is allowed to destroy information in the sg.
  221. As with the other mapping interfaces, dma_map_sg can fail. When it
  222. does, 0 is returned and a driver must take appropriate action. It is
  223. critical that the driver do something, in the case of a block driver
  224. aborting the request or even oopsing is better than doing nothing and
  225. corrupting the filesystem.
  226. With scatterlists, you use the resulting mapping like this:
  227. int i, count = dma_map_sg(dev, sglist, nents, direction);
  228. struct scatterlist *sg;
  229. for_each_sg(sglist, sg, count, i) {
  230. hw_address[i] = sg_dma_address(sg);
  231. hw_len[i] = sg_dma_len(sg);
  232. }
  233. where nents is the number of entries in the sglist.
  234. The implementation is free to merge several consecutive sglist entries
  235. into one (e.g. with an IOMMU, or if several pages just happen to be
  236. physically contiguous) and returns the actual number of sg entries it
  237. mapped them to. On failure 0, is returned.
  238. Then you should loop count times (note: this can be less than nents times)
  239. and use sg_dma_address() and sg_dma_len() macros where you previously
  240. accessed sg->address and sg->length as shown above.
  241. void
  242. dma_unmap_sg(struct device *dev, struct scatterlist *sg,
  243. int nhwentries, enum dma_data_direction direction)
  244. Unmap the previously mapped scatter/gather list. All the parameters
  245. must be the same as those and passed in to the scatter/gather mapping
  246. API.
  247. Note: <nents> must be the number you passed in, *not* the number of
  248. physical entries returned.
  249. void
  250. dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
  251. enum dma_data_direction direction)
  252. void
  253. dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
  254. enum dma_data_direction direction)
  255. void
  256. dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
  257. enum dma_data_direction direction)
  258. void
  259. dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
  260. enum dma_data_direction direction)
  261. Synchronise a single contiguous or scatter/gather mapping for the cpu
  262. and device. With the sync_sg API, all the parameters must be the same
  263. as those passed into the single mapping API. With the sync_single API,
  264. you can use dma_handle and size parameters that aren't identical to
  265. those passed into the single mapping API to do a partial sync.
  266. Notes: You must do this:
  267. - Before reading values that have been written by DMA from the device
  268. (use the DMA_FROM_DEVICE direction)
  269. - After writing values that will be written to the device using DMA
  270. (use the DMA_TO_DEVICE) direction
  271. - before *and* after handing memory to the device if the memory is
  272. DMA_BIDIRECTIONAL
  273. See also dma_map_single().
  274. dma_addr_t
  275. dma_map_single_attrs(struct device *dev, void *cpu_addr, size_t size,
  276. enum dma_data_direction dir,
  277. struct dma_attrs *attrs)
  278. void
  279. dma_unmap_single_attrs(struct device *dev, dma_addr_t dma_addr,
  280. size_t size, enum dma_data_direction dir,
  281. struct dma_attrs *attrs)
  282. int
  283. dma_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
  284. int nents, enum dma_data_direction dir,
  285. struct dma_attrs *attrs)
  286. void
  287. dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sgl,
  288. int nents, enum dma_data_direction dir,
  289. struct dma_attrs *attrs)
  290. The four functions above are just like the counterpart functions
  291. without the _attrs suffixes, except that they pass an optional
  292. struct dma_attrs*.
  293. struct dma_attrs encapsulates a set of "dma attributes". For the
  294. definition of struct dma_attrs see linux/dma-attrs.h.
  295. The interpretation of dma attributes is architecture-specific, and
  296. each attribute should be documented in Documentation/DMA-attributes.txt.
  297. If struct dma_attrs* is NULL, the semantics of each of these
  298. functions is identical to those of the corresponding function
  299. without the _attrs suffix. As a result dma_map_single_attrs()
  300. can generally replace dma_map_single(), etc.
  301. As an example of the use of the *_attrs functions, here's how
  302. you could pass an attribute DMA_ATTR_FOO when mapping memory
  303. for DMA:
  304. #include <linux/dma-attrs.h>
  305. /* DMA_ATTR_FOO should be defined in linux/dma-attrs.h and
  306. * documented in Documentation/DMA-attributes.txt */
  307. ...
  308. DEFINE_DMA_ATTRS(attrs);
  309. dma_set_attr(DMA_ATTR_FOO, &attrs);
  310. ....
  311. n = dma_map_sg_attrs(dev, sg, nents, DMA_TO_DEVICE, &attr);
  312. ....
  313. Architectures that care about DMA_ATTR_FOO would check for its
  314. presence in their implementations of the mapping and unmapping
  315. routines, e.g.:
  316. void whizco_dma_map_sg_attrs(struct device *dev, dma_addr_t dma_addr,
  317. size_t size, enum dma_data_direction dir,
  318. struct dma_attrs *attrs)
  319. {
  320. ....
  321. int foo = dma_get_attr(DMA_ATTR_FOO, attrs);
  322. ....
  323. if (foo)
  324. /* twizzle the frobnozzle */
  325. ....
  326. Part II - Advanced dma_ usage
  327. -----------------------------
  328. Warning: These pieces of the DMA API should not be used in the
  329. majority of cases, since they cater for unlikely corner cases that
  330. don't belong in usual drivers.
  331. If you don't understand how cache line coherency works between a
  332. processor and an I/O device, you should not be using this part of the
  333. API at all.
  334. void *
  335. dma_alloc_noncoherent(struct device *dev, size_t size,
  336. dma_addr_t *dma_handle, gfp_t flag)
  337. Identical to dma_alloc_coherent() except that the platform will
  338. choose to return either consistent or non-consistent memory as it sees
  339. fit. By using this API, you are guaranteeing to the platform that you
  340. have all the correct and necessary sync points for this memory in the
  341. driver should it choose to return non-consistent memory.
  342. Note: where the platform can return consistent memory, it will
  343. guarantee that the sync points become nops.
  344. Warning: Handling non-consistent memory is a real pain. You should
  345. only ever use this API if you positively know your driver will be
  346. required to work on one of the rare (usually non-PCI) architectures
  347. that simply cannot make consistent memory.
  348. void
  349. dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
  350. dma_addr_t dma_handle)
  351. Free memory allocated by the nonconsistent API. All parameters must
  352. be identical to those passed in (and returned by
  353. dma_alloc_noncoherent()).
  354. int
  355. dma_get_cache_alignment(void)
  356. Returns the processor cache alignment. This is the absolute minimum
  357. alignment *and* width that you must observe when either mapping
  358. memory or doing partial flushes.
  359. Notes: This API may return a number *larger* than the actual cache
  360. line, but it will guarantee that one or more cache lines fit exactly
  361. into the width returned by this call. It will also always be a power
  362. of two for easy alignment.
  363. void
  364. dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  365. enum dma_data_direction direction)
  366. Do a partial sync of memory that was allocated by
  367. dma_alloc_noncoherent(), starting at virtual address vaddr and
  368. continuing on for size. Again, you *must* observe the cache line
  369. boundaries when doing this.
  370. int
  371. dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
  372. dma_addr_t device_addr, size_t size, int
  373. flags)
  374. Declare region of memory to be handed out by dma_alloc_coherent when
  375. it's asked for coherent memory for this device.
  376. bus_addr is the physical address to which the memory is currently
  377. assigned in the bus responding region (this will be used by the
  378. platform to perform the mapping).
  379. device_addr is the physical address the device needs to be programmed
  380. with actually to address this memory (this will be handed out as the
  381. dma_addr_t in dma_alloc_coherent()).
  382. size is the size of the area (must be multiples of PAGE_SIZE).
  383. flags can be or'd together and are:
  384. DMA_MEMORY_MAP - request that the memory returned from
  385. dma_alloc_coherent() be directly writable.
  386. DMA_MEMORY_IO - request that the memory returned from
  387. dma_alloc_coherent() be addressable using read/write/memcpy_toio etc.
  388. One or both of these flags must be present.
  389. DMA_MEMORY_INCLUDES_CHILDREN - make the declared memory be allocated by
  390. dma_alloc_coherent of any child devices of this one (for memory residing
  391. on a bridge).
  392. DMA_MEMORY_EXCLUSIVE - only allocate memory from the declared regions.
  393. Do not allow dma_alloc_coherent() to fall back to system memory when
  394. it's out of memory in the declared region.
  395. The return value will be either DMA_MEMORY_MAP or DMA_MEMORY_IO and
  396. must correspond to a passed in flag (i.e. no returning DMA_MEMORY_IO
  397. if only DMA_MEMORY_MAP were passed in) for success or zero for
  398. failure.
  399. Note, for DMA_MEMORY_IO returns, all subsequent memory returned by
  400. dma_alloc_coherent() may no longer be accessed directly, but instead
  401. must be accessed using the correct bus functions. If your driver
  402. isn't prepared to handle this contingency, it should not specify
  403. DMA_MEMORY_IO in the input flags.
  404. As a simplification for the platforms, only *one* such region of
  405. memory may be declared per device.
  406. For reasons of efficiency, most platforms choose to track the declared
  407. region only at the granularity of a page. For smaller allocations,
  408. you should use the dma_pool() API.
  409. void
  410. dma_release_declared_memory(struct device *dev)
  411. Remove the memory region previously declared from the system. This
  412. API performs *no* in-use checking for this region and will return
  413. unconditionally having removed all the required structures. It is the
  414. driver's job to ensure that no parts of this memory region are
  415. currently in use.
  416. void *
  417. dma_mark_declared_memory_occupied(struct device *dev,
  418. dma_addr_t device_addr, size_t size)
  419. This is used to occupy specific regions of the declared space
  420. (dma_alloc_coherent() will hand out the first free region it finds).
  421. device_addr is the *device* address of the region requested.
  422. size is the size (and should be a page-sized multiple).
  423. The return value will be either a pointer to the processor virtual
  424. address of the memory, or an error (via PTR_ERR()) if any part of the
  425. region is occupied.
  426. Part III - Debug drivers use of the DMA-API
  427. -------------------------------------------
  428. The DMA-API as described above as some constraints. DMA addresses must be
  429. released with the corresponding function with the same size for example. With
  430. the advent of hardware IOMMUs it becomes more and more important that drivers
  431. do not violate those constraints. In the worst case such a violation can
  432. result in data corruption up to destroyed filesystems.
  433. To debug drivers and find bugs in the usage of the DMA-API checking code can
  434. be compiled into the kernel which will tell the developer about those
  435. violations. If your architecture supports it you can select the "Enable
  436. debugging of DMA-API usage" option in your kernel configuration. Enabling this
  437. option has a performance impact. Do not enable it in production kernels.
  438. If you boot the resulting kernel will contain code which does some bookkeeping
  439. about what DMA memory was allocated for which device. If this code detects an
  440. error it prints a warning message with some details into your kernel log. An
  441. example warning message may look like this:
  442. ------------[ cut here ]------------
  443. WARNING: at /data2/repos/linux-2.6-iommu/lib/dma-debug.c:448
  444. check_unmap+0x203/0x490()
  445. Hardware name:
  446. forcedeth 0000:00:08.0: DMA-API: device driver frees DMA memory with wrong
  447. function [device address=0x00000000640444be] [size=66 bytes] [mapped as
  448. single] [unmapped as page]
  449. Modules linked in: nfsd exportfs bridge stp llc r8169
  450. Pid: 0, comm: swapper Tainted: G W 2.6.28-dmatest-09289-g8bb99c0 #1
  451. Call Trace:
  452. <IRQ> [<ffffffff80240b22>] warn_slowpath+0xf2/0x130
  453. [<ffffffff80647b70>] _spin_unlock+0x10/0x30
  454. [<ffffffff80537e75>] usb_hcd_link_urb_to_ep+0x75/0xc0
  455. [<ffffffff80647c22>] _spin_unlock_irqrestore+0x12/0x40
  456. [<ffffffff8055347f>] ohci_urb_enqueue+0x19f/0x7c0
  457. [<ffffffff80252f96>] queue_work+0x56/0x60
  458. [<ffffffff80237e10>] enqueue_task_fair+0x20/0x50
  459. [<ffffffff80539279>] usb_hcd_submit_urb+0x379/0xbc0
  460. [<ffffffff803b78c3>] cpumask_next_and+0x23/0x40
  461. [<ffffffff80235177>] find_busiest_group+0x207/0x8a0
  462. [<ffffffff8064784f>] _spin_lock_irqsave+0x1f/0x50
  463. [<ffffffff803c7ea3>] check_unmap+0x203/0x490
  464. [<ffffffff803c8259>] debug_dma_unmap_page+0x49/0x50
  465. [<ffffffff80485f26>] nv_tx_done_optimized+0xc6/0x2c0
  466. [<ffffffff80486c13>] nv_nic_irq_optimized+0x73/0x2b0
  467. [<ffffffff8026df84>] handle_IRQ_event+0x34/0x70
  468. [<ffffffff8026ffe9>] handle_edge_irq+0xc9/0x150
  469. [<ffffffff8020e3ab>] do_IRQ+0xcb/0x1c0
  470. [<ffffffff8020c093>] ret_from_intr+0x0/0xa
  471. <EOI> <4>---[ end trace f6435a98e2a38c0e ]---
  472. The driver developer can find the driver and the device including a stacktrace
  473. of the DMA-API call which caused this warning.
  474. Per default only the first error will result in a warning message. All other
  475. errors will only silently counted. This limitation exist to prevent the code
  476. from flooding your kernel log. To support debugging a device driver this can
  477. be disabled via debugfs. See the debugfs interface documentation below for
  478. details.
  479. The debugfs directory for the DMA-API debugging code is called dma-api/. In
  480. this directory the following files can currently be found:
  481. dma-api/all_errors This file contains a numeric value. If this
  482. value is not equal to zero the debugging code
  483. will print a warning for every error it finds
  484. into the kernel log. Be careful with this
  485. option, as it can easily flood your logs.
  486. dma-api/disabled This read-only file contains the character 'Y'
  487. if the debugging code is disabled. This can
  488. happen when it runs out of memory or if it was
  489. disabled at boot time
  490. dma-api/error_count This file is read-only and shows the total
  491. numbers of errors found.
  492. dma-api/num_errors The number in this file shows how many
  493. warnings will be printed to the kernel log
  494. before it stops. This number is initialized to
  495. one at system boot and be set by writing into
  496. this file
  497. dma-api/min_free_entries
  498. This read-only file can be read to get the
  499. minimum number of free dma_debug_entries the
  500. allocator has ever seen. If this value goes
  501. down to zero the code will disable itself
  502. because it is not longer reliable.
  503. dma-api/num_free_entries
  504. The current number of free dma_debug_entries
  505. in the allocator.
  506. dma-api/driver-filter
  507. You can write a name of a driver into this file
  508. to limit the debug output to requests from that
  509. particular driver. Write an empty string to
  510. that file to disable the filter and see
  511. all errors again.
  512. If you have this code compiled into your kernel it will be enabled by default.
  513. If you want to boot without the bookkeeping anyway you can provide
  514. 'dma_debug=off' as a boot parameter. This will disable DMA-API debugging.
  515. Notice that you can not enable it again at runtime. You have to reboot to do
  516. so.
  517. If you want to see debug messages only for a special device driver you can
  518. specify the dma_debug_driver=<drivername> parameter. This will enable the
  519. driver filter at boot time. The debug code will only print errors for that
  520. driver afterwards. This filter can be disabled or changed later using debugfs.
  521. When the code disables itself at runtime this is most likely because it ran
  522. out of dma_debug_entries. These entries are preallocated at boot. The number
  523. of preallocated entries is defined per architecture. If it is too low for you
  524. boot with 'dma_debug_entries=<your_desired_number>' to overwrite the
  525. architectural default.