epm_adc.c 60 KB

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  1. /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/fs.h>
  16. #include <linux/mutex.h>
  17. #include <linux/err.h>
  18. #include <linux/slab.h>
  19. #include <linux/gpio.h>
  20. #include <linux/hwmon.h>
  21. #include <linux/delay.h>
  22. #include <linux/epm_adc.h>
  23. #include <linux/uaccess.h>
  24. #include <linux/spi/spi.h>
  25. #include <linux/hwmon-sysfs.h>
  26. #include <linux/miscdevice.h>
  27. #include <linux/platform_device.h>
  28. #define EPM_ADC_DRIVER_NAME "epm_adc"
  29. #define EPM_ADC_MAX_FNAME 20
  30. #define EPM_ADC_CONVERSION_DELAY 100 /* milliseconds */
  31. /* Command Bits */
  32. #define EPM_ADC_ADS_SPI_BITS_PER_WORD 8
  33. #define EPM_ADC_ADS_DATA_READ_CMD (0x1 << 5)
  34. #define EPM_ADC_ADS_REG_READ_CMD (0x2 << 5)
  35. #define EPM_ADC_ADS_REG_WRITE_CMD (0x3 << 5)
  36. #define EPM_ADC_ADS_PULSE_CONVERT_CMD (0x4 << 5)
  37. #define EPM_ADC_ADS_MULTIPLE_REG_ACCESS (0x1 << 4)
  38. /* Register map */
  39. #define EPM_ADC_ADS_CONFIG0_REG_ADDR 0x0
  40. #define EPM_ADC_ADS_CONFIG1_REG_ADDR 0x1
  41. #define EPM_ADC_ADS_MUXSG0_REG_ADDR 0x4
  42. #define EPM_ADC_ADS_MUXSG1_REG_ADDR 0x5
  43. /* Register map default data */
  44. #define EPM_ADC_ADS_REG0_DEFAULT 0x2
  45. #define EPM_ADC_ADS_REG1_DEFAULT 0x52
  46. #define EPM_ADC_ADS_CHANNEL_DATA_CHID 0x1f
  47. /* Channel ID */
  48. #define EPM_ADC_ADS_CHANNEL_OFFSET 0x18
  49. #define EPM_ADC_ADS_CHANNEL_VCC 0x1a
  50. #define EPM_ADC_ADS_CHANNEL_TEMP 0x1b
  51. #define EPM_ADC_ADS_CHANNEL_GAIN 0x1c
  52. #define EPM_ADC_ADS_CHANNEL_REF 0x1d
  53. /* Scaling data co-efficients */
  54. #define EPM_ADC_SCALE_MILLI 1000
  55. #define EPM_ADC_SCALE_CODE_VOLTS 3072
  56. #define EPM_ADC_SCALE_CODE_GAIN 30720
  57. #define EPM_ADC_TEMP_SENSOR_COEFF 394
  58. #define EPM_ADC_TEMP_TO_DEGC_COEFF 168000
  59. #define EPM_ADC_CHANNEL_AIN_OFFSET 8
  60. #define EPM_ADC_MAX_NEGATIVE_SCALE_CODE 0x8000
  61. #define EPM_ADC_NEG_LSB_CODE 0xffff
  62. #define EPM_ADC_VREF_CODE 0x7800
  63. #define EPM_ADC_MILLI_VOLTS_SOURCE 4750
  64. #define EPM_ADC_SCALE_FACTOR 64
  65. #define GPIO_EPM_GLOBAL_ENABLE 86
  66. #define GPIO_EPM_MARKER1 85
  67. #define GPIO_EPM_MARKER2 96
  68. #define EPM_ADC_CONVERSION_TIME_MIN 50000
  69. #define EPM_ADC_CONVERSION_TIME_MAX 51000
  70. /* PSoc Commands */
  71. #define EPM_PSOC_INIT_CMD 0x1
  72. #define EPM_PSOC_INIT_RESPONSE_CMD 0x2
  73. #define EPM_PSOC_CHANNEL_ENABLE_DISABLE_CMD 0x5
  74. #define EPM_PSOC_CHANNEL_ENABLE_DISABLE_RESPONSE_CMD 0x6
  75. #define EPM_PSOC_SET_AVERAGING_CMD 0x7
  76. #define EPM_PSOC_SET_AVERAGING_RESPONSE_CMD 0x8
  77. #define EPM_PSOC_GET_LAST_MEASUREMENT_CMD 0x9
  78. #define EPM_PSOC_GET_LAST_MEASUREMENT_RESPONSE_CMD 0xa
  79. #define EPM_PSOC_GET_BUFFERED_DATA_CMD 0xb
  80. #define EPM_PSOC_GET_BUFFERED_RESPONSE_CMD 0xc
  81. #define EPM_PSOC_GET_SYSTEM_TIMESTAMP_CMD 0x11
  82. #define EPM_PSOC_GET_SYSTEM_TIMESTAMP_RESPONSE_CMD 0x12
  83. #define EPM_PSOC_SET_SYSTEM_TIMESTAMP_CMD 0x13
  84. #define EPM_PSOC_SET_SYSTEM_TIMESTAMP_RESPONSE_CMD 0x14
  85. #define EPM_PSOC_SET_CHANNEL_TYPE_CMD 0x15
  86. #define EPM_PSOC_SET_CHANNEL_TYPE_RESPONSE_CMD 0x16
  87. #define EPM_PSOC_GET_AVERAGED_DATA_CMD 0x19
  88. #define EPM_PSOC_GET_AVERAGED_DATA_RESPONSE_CMD 0x1a
  89. #define EPM_PSOC_SET_CHANNEL_SWITCH_DELAY_CMD 0x1b
  90. #define EPM_PSOC_SET_CHANNEL_SWITCH_DELAY_RESPONSE_CMD 0x1c
  91. #define EPM_PSOC_CLEAR_BUFFER_CMD 0x1d
  92. #define EPM_PSOC_CLEAR_BUFFER_RESPONSE_CMD 0x1e
  93. #define EPM_PSOC_SET_VADC_REFERENCE_CMD 0x1f
  94. #define EPM_PSOC_SET_VADC_REFERENCE_RESPONSE_CMD 0x20
  95. #define EPM_PSOC_PAUSE_CONVERSION 0x35
  96. #define EPM_PSOC_PAUSE_CONVERSION_RSP_CMD 0x36
  97. #define EPM_PSOC_UNPAUSE_CONVERSION 0x37
  98. #define EPM_PSOC_UNPAUSE_CONVERSION_RSP_CMD 0x38
  99. #define EPM_PSOC_GPIO_BUFFER_REQUEST_CMD 0x4f
  100. #define EPM_PSOC_GPIO_BUFFER_REQUEST_RESPONSE_CMD 0x50
  101. #define EPM_PSOC_GET_GPIO_BUFFER_CMD 0x51
  102. #define EPM_PSOC_GET_GPIO_BUFFER_RESPONSE_CMD 0x52
  103. #define EPM_PSOC_GLOBAL_ENABLE 81
  104. #define EPM_PSOC_VREF_VOLTAGE 2048
  105. #define EPM_PSOC_MAX_ADC_CODE_15_BIT 32767
  106. #define EPM_PSOC_MAX_ADC_CODE_12_BIT 4096
  107. #define EPM_GLOBAL_ENABLE_MIN_DELAY 5000
  108. #define EPM_GLOBAL_ENABLE_MAX_DELAY 5100
  109. #define EPM_AVG_BUF_MASK1 0xfff00000
  110. #define EPM_AVG_BUF_MASK2 0xfff00
  111. #define EPM_AVG_BUF_MASK3 0xff
  112. #define EPM_AVG_BUF_MASK4 0xf0000000
  113. #define EPM_AVG_BUF_MASK5 0xfff0000
  114. #define EPM_AVG_BUF_MASK6 0xfff0
  115. #define EPM_AVG_BUF_MASK7 0xf
  116. #define EPM_AVG_BUF_MASK8 0xff000000
  117. #define EPM_AVG_BUF_MASK9 0xfff000
  118. #define EPM_AVG_BUF_MASK10 0xfff
  119. #define EPM_PSOC_BUFFERED_DATA_LENGTH 48
  120. #define EPM_PSOC_BUFFERED_DATA_LENGTH2 54
  121. struct epm_adc_drv {
  122. struct platform_device *pdev;
  123. struct device *hwmon;
  124. struct spi_device *epm_spi_client;
  125. struct mutex conv_lock;
  126. uint32_t bus_id;
  127. struct miscdevice misc;
  128. uint32_t channel_mask;
  129. struct epm_chan_properties epm_psoc_ch_prop[0];
  130. };
  131. static struct epm_adc_drv *epm_adc_drv;
  132. static struct i2c_board_info *epm_i2c_info;
  133. static bool epm_adc_first_request;
  134. static int epm_gpio_expander_base_addr;
  135. static bool epm_adc_expander_register;
  136. #define GPIO_EPM_EXPANDER_IO0 epm_gpio_expander_base_addr
  137. #define GPIO_PWR_MON_ENABLE (GPIO_EPM_EXPANDER_IO0 + 1)
  138. #define GPIO_ADC1_PWDN_N (GPIO_PWR_MON_ENABLE + 1)
  139. #define GPIO_PWR_MON_RESET_N (GPIO_ADC1_PWDN_N + 1)
  140. #define GPIO_EPM_SPI_ADC1_CS_N (GPIO_PWR_MON_RESET_N + 1)
  141. #define GPIO_PWR_MON_START (GPIO_EPM_SPI_ADC1_CS_N + 1)
  142. #define GPIO_ADC1_DRDY_N (GPIO_PWR_MON_START + 1)
  143. #define GPIO_ADC2_PWDN_N (GPIO_ADC1_DRDY_N + 1)
  144. #define GPIO_EPM_SPI_ADC2_CS_N (GPIO_ADC2_PWDN_N + 1)
  145. #define GPIO_ADC2_DRDY_N (GPIO_EPM_SPI_ADC2_CS_N + 1)
  146. static int epm_adc_i2c_expander_register(void)
  147. {
  148. int rc = 0;
  149. static struct i2c_adapter *i2c_adap;
  150. static struct i2c_client *epm_i2c_client;
  151. rc = gpio_request(GPIO_EPM_GLOBAL_ENABLE, "EPM_GLOBAL_EN");
  152. if (!rc) {
  153. gpio_direction_output(GPIO_EPM_GLOBAL_ENABLE, 1);
  154. } else {
  155. pr_err("%s: Configure EPM_GLOBAL_EN Failed\n", __func__);
  156. return rc;
  157. }
  158. usleep_range(EPM_ADC_CONVERSION_TIME_MIN,
  159. EPM_ADC_CONVERSION_TIME_MAX);
  160. i2c_adap = i2c_get_adapter(epm_adc_drv->bus_id);
  161. if (i2c_adap == NULL) {
  162. pr_err("%s: i2c_get_adapter() failed\n", __func__);
  163. return -EINVAL;
  164. }
  165. usleep_range(EPM_ADC_CONVERSION_TIME_MIN,
  166. EPM_ADC_CONVERSION_TIME_MAX);
  167. epm_i2c_client = i2c_new_device(i2c_adap, epm_i2c_info);
  168. if (IS_ERR(epm_i2c_client)) {
  169. pr_err("Error with i2c epm device register\n");
  170. return -ENODEV;
  171. }
  172. epm_adc_first_request = false;
  173. return 0;
  174. }
  175. static int epm_adc_gpio_configure_expander_enable(void)
  176. {
  177. int rc = 0;
  178. if (epm_adc_first_request) {
  179. rc = gpio_request(GPIO_EPM_GLOBAL_ENABLE, "EPM_GLOBAL_EN");
  180. if (!rc) {
  181. gpio_direction_output(GPIO_EPM_GLOBAL_ENABLE, 1);
  182. } else {
  183. pr_err("%s: Configure EPM_GLOBAL_EN Failed\n",
  184. __func__);
  185. return rc;
  186. }
  187. } else {
  188. epm_adc_first_request = true;
  189. }
  190. usleep_range(EPM_ADC_CONVERSION_TIME_MIN,
  191. EPM_ADC_CONVERSION_TIME_MAX);
  192. rc = gpio_request(GPIO_PWR_MON_ENABLE, "GPIO_PWR_MON_ENABLE");
  193. if (!rc) {
  194. rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
  195. if (rc) {
  196. pr_err("%s: Set GPIO_PWR_MON_ENABLE failed\n",
  197. __func__);
  198. return rc;
  199. }
  200. } else {
  201. pr_err("%s: gpio_request GPIO_PWR_MON_ENABLE failed\n",
  202. __func__);
  203. return rc;
  204. }
  205. rc = gpio_request(GPIO_ADC1_PWDN_N, "GPIO_ADC1_PWDN_N");
  206. if (!rc) {
  207. rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
  208. if (rc) {
  209. pr_err("%s: Set GPIO_ADC1_PWDN_N failed\n", __func__);
  210. return rc;
  211. }
  212. } else {
  213. pr_err("%s: gpio_request GPIO_ADC1_PWDN_N failed\n", __func__);
  214. return rc;
  215. }
  216. rc = gpio_request(GPIO_ADC2_PWDN_N, "GPIO_ADC2_PWDN_N");
  217. if (!rc) {
  218. rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
  219. if (rc) {
  220. pr_err("%s: Set GPIO_ADC2_PWDN_N failed\n",
  221. __func__);
  222. return rc;
  223. }
  224. } else {
  225. pr_err("%s: gpio_request GPIO_ADC2_PWDN_N failed\n",
  226. __func__);
  227. return rc;
  228. }
  229. rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "GPIO_EPM_SPI_ADC1_CS_N");
  230. if (!rc) {
  231. rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 1);
  232. if (rc) {
  233. pr_err("%s:Set GPIO_EPM_SPI_ADC1_CS_N failed\n",
  234. __func__);
  235. return rc;
  236. }
  237. } else {
  238. pr_err("%s: gpio_request GPIO_EPM_SPI_ADC1_CS_N failed\n",
  239. __func__);
  240. return rc;
  241. }
  242. rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N,
  243. "GPIO_EPM_SPI_ADC2_CS_N");
  244. if (!rc) {
  245. rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 1);
  246. if (rc) {
  247. pr_err("Set GPIO_EPM_SPI_ADC2_CS_N failed\n");
  248. return rc;
  249. }
  250. } else {
  251. pr_err("gpio_request GPIO_EPM_SPI_ADC2_CS_N failed\n");
  252. return rc;
  253. }
  254. rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
  255. if (rc) {
  256. pr_err("%s:Reset GPIO_EPM_SPI_ADC1_CS_N failed\n", __func__);
  257. return rc;
  258. }
  259. rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 1);
  260. if (rc) {
  261. pr_err("%s: Set GPIO_EPM_SPI_ADC1_CS_N failed\n", __func__);
  262. return rc;
  263. }
  264. rc = gpio_request(GPIO_PWR_MON_START, "GPIO_PWR_MON_START");
  265. if (!rc) {
  266. rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
  267. if (rc) {
  268. pr_err("%s: Reset GPIO_PWR_MON_START failed\n",
  269. __func__);
  270. return rc;
  271. }
  272. } else {
  273. pr_err("%s: gpio_request GPIO_PWR_MON_START failed\n",
  274. __func__);
  275. return rc;
  276. }
  277. rc = gpio_request(GPIO_PWR_MON_RESET_N, "GPIO_PWR_MON_RESET_N");
  278. if (!rc) {
  279. rc = gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
  280. if (rc) {
  281. pr_err("%s: Reset GPIO_PWR_MON_RESET_N failed\n",
  282. __func__);
  283. return rc;
  284. }
  285. } else {
  286. pr_err("%s: gpio_request GPIO_PWR_MON_RESET_N failed\n",
  287. __func__);
  288. return rc;
  289. }
  290. rc = gpio_direction_output(GPIO_PWR_MON_RESET_N, 1);
  291. if (rc) {
  292. pr_err("%s: Set GPIO_PWR_MON_RESET_N failed\n", __func__);
  293. return rc;
  294. }
  295. rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
  296. if (rc) {
  297. pr_err("%s:Reset GPIO_EPM_SPI_ADC1_CS_N failed\n", __func__);
  298. return rc;
  299. }
  300. return rc;
  301. }
  302. static int epm_adc_gpio_configure_expander_disable(void)
  303. {
  304. int rc = 0;
  305. gpio_free(GPIO_PWR_MON_ENABLE);
  306. gpio_free(GPIO_ADC1_PWDN_N);
  307. gpio_free(GPIO_ADC2_PWDN_N);
  308. gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
  309. gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
  310. gpio_free(GPIO_PWR_MON_START);
  311. gpio_free(GPIO_PWR_MON_RESET_N);
  312. rc = gpio_direction_output(GPIO_EPM_GLOBAL_ENABLE, 0);
  313. if (rc)
  314. pr_debug("%s: Disable EPM_GLOBAL_EN Failed\n", __func__);
  315. gpio_free(GPIO_EPM_GLOBAL_ENABLE);
  316. return rc;
  317. }
  318. static int epm_adc_spi_chip_select(int32_t id)
  319. {
  320. int rc = 0;
  321. if (id == 0) {
  322. rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 1);
  323. if (rc) {
  324. pr_err("%s:Disable SPI_ADC2_CS failed",
  325. __func__);
  326. return rc;
  327. }
  328. rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
  329. if (rc) {
  330. pr_err("%s:Enable SPI_ADC1_CS failed", __func__);
  331. return rc;
  332. }
  333. } else if (id == 1) {
  334. rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 1);
  335. if (rc) {
  336. pr_err("%s:Disable SPI_ADC1_CS failed", __func__);
  337. return rc;
  338. }
  339. rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
  340. if (rc) {
  341. pr_err("%s:Enable SPI_ADC2_CS failed", __func__);
  342. return rc;
  343. }
  344. } else {
  345. rc = -EFAULT;
  346. }
  347. return rc;
  348. }
  349. static int epm_adc_ads_spi_write(struct epm_adc_drv *epm_adc,
  350. uint8_t addr, uint8_t val)
  351. {
  352. struct spi_message m;
  353. struct spi_transfer t;
  354. char tx_buf[2];
  355. int rc = 0;
  356. spi_setup(epm_adc->epm_spi_client);
  357. memset(&t, 0, sizeof t);
  358. memset(tx_buf, 0, sizeof tx_buf);
  359. t.tx_buf = tx_buf;
  360. spi_message_init(&m);
  361. spi_message_add_tail(&t, &m);
  362. tx_buf[0] = EPM_ADC_ADS_REG_WRITE_CMD | addr;
  363. tx_buf[1] = val;
  364. t.len = sizeof(tx_buf);
  365. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  366. rc = spi_sync(epm_adc->epm_spi_client, &m);
  367. return rc;
  368. }
  369. static int epm_adc_init_ads(struct epm_adc_drv *epm_adc)
  370. {
  371. int rc = 0;
  372. rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_CONFIG0_REG_ADDR,
  373. EPM_ADC_ADS_REG0_DEFAULT);
  374. if (rc)
  375. return rc;
  376. rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_CONFIG1_REG_ADDR,
  377. EPM_ADC_ADS_REG1_DEFAULT);
  378. if (rc)
  379. return rc;
  380. return rc;
  381. }
  382. static int epm_adc_ads_pulse_convert(struct epm_adc_drv *epm_adc)
  383. {
  384. struct spi_message m;
  385. struct spi_transfer t;
  386. char tx_buf[1];
  387. int rc = 0;
  388. spi_setup(epm_adc->epm_spi_client);
  389. memset(&t, 0, sizeof t);
  390. memset(tx_buf, 0, sizeof tx_buf);
  391. t.tx_buf = tx_buf;
  392. spi_message_init(&m);
  393. spi_message_add_tail(&t, &m);
  394. tx_buf[0] = EPM_ADC_ADS_PULSE_CONVERT_CMD;
  395. t.len = sizeof(tx_buf);
  396. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  397. rc = spi_sync(epm_adc->epm_spi_client, &m);
  398. return rc;
  399. }
  400. static int epm_adc_ads_read_data(struct epm_adc_drv *epm_adc, char *adc_data)
  401. {
  402. struct spi_message m;
  403. struct spi_transfer t;
  404. char tx_buf[4], rx_buf[4];
  405. int rc = 0;
  406. spi_setup(epm_adc->epm_spi_client);
  407. memset(&t, 0, sizeof t);
  408. memset(tx_buf, 0, sizeof tx_buf);
  409. memset(rx_buf, 0, sizeof tx_buf);
  410. t.tx_buf = tx_buf;
  411. t.rx_buf = rx_buf;
  412. spi_message_init(&m);
  413. spi_message_add_tail(&t, &m);
  414. tx_buf[0] = EPM_ADC_ADS_DATA_READ_CMD |
  415. EPM_ADC_ADS_MULTIPLE_REG_ACCESS;
  416. t.len = sizeof(tx_buf);
  417. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  418. rc = spi_sync(epm_adc->epm_spi_client, &m);
  419. if (rc)
  420. return rc;
  421. rc = spi_sync(epm_adc->epm_spi_client, &m);
  422. if (rc)
  423. return rc;
  424. rc = spi_sync(epm_adc->epm_spi_client, &m);
  425. if (rc)
  426. return rc;
  427. adc_data[0] = rx_buf[1];
  428. adc_data[1] = rx_buf[2];
  429. adc_data[2] = rx_buf[3];
  430. return rc;
  431. }
  432. static int epm_adc_hw_init(struct epm_adc_drv *epm_adc)
  433. {
  434. int rc = 0;
  435. mutex_lock(&epm_adc->conv_lock);
  436. rc = epm_adc_gpio_configure_expander_enable();
  437. if (rc != 0) {
  438. pr_err("epm gpio configure expander failed, rc = %d\n", rc);
  439. goto epm_adc_hw_init_err;
  440. }
  441. rc = epm_adc_init_ads(epm_adc);
  442. if (rc) {
  443. pr_err("epm_adc_init_ads failed, rc=%d\n", rc);
  444. goto epm_adc_hw_init_err;
  445. }
  446. epm_adc_hw_init_err:
  447. mutex_unlock(&epm_adc->conv_lock);
  448. return rc;
  449. }
  450. static int epm_adc_hw_deinit(struct epm_adc_drv *epm_adc)
  451. {
  452. int rc = 0;
  453. mutex_lock(&epm_adc->conv_lock);
  454. rc = epm_adc_gpio_configure_expander_disable();
  455. if (rc != 0) {
  456. pr_err("gpio expander disable failed with %d\n", rc);
  457. goto epm_adc_hw_deinit_err;
  458. }
  459. epm_adc_hw_deinit_err:
  460. mutex_unlock(&epm_adc->conv_lock);
  461. return rc;
  462. }
  463. static int epm_adc_ads_scale_result(struct epm_adc_drv *epm_adc,
  464. uint8_t *adc_raw_data, struct epm_chan_request *conv)
  465. {
  466. uint32_t channel_num;
  467. int16_t sign_bit;
  468. struct epm_adc_platform_data *pdata = epm_adc->pdev->dev.platform_data;
  469. uint32_t chan_idx = (conv->device_idx * pdata->chan_per_adc) +
  470. conv->channel_idx;
  471. int64_t adc_scaled_data = 0;
  472. /* Get the channel number */
  473. channel_num = (adc_raw_data[0] & EPM_ADC_ADS_CHANNEL_DATA_CHID);
  474. sign_bit = 1;
  475. /* This is the 16-bit raw data */
  476. adc_scaled_data = ((adc_raw_data[1] << 8) | adc_raw_data[2]);
  477. /* Obtain the internal system reading */
  478. if (channel_num == EPM_ADC_ADS_CHANNEL_VCC) {
  479. adc_scaled_data *= EPM_ADC_SCALE_MILLI;
  480. do_div(adc_scaled_data, EPM_ADC_SCALE_CODE_VOLTS);
  481. } else if (channel_num == EPM_ADC_ADS_CHANNEL_GAIN) {
  482. do_div(adc_scaled_data, EPM_ADC_SCALE_CODE_GAIN);
  483. } else if (channel_num == EPM_ADC_ADS_CHANNEL_REF) {
  484. adc_scaled_data *= EPM_ADC_SCALE_MILLI;
  485. do_div(adc_scaled_data, EPM_ADC_SCALE_CODE_VOLTS);
  486. } else if (channel_num == EPM_ADC_ADS_CHANNEL_TEMP) {
  487. /* Convert Code to micro-volts */
  488. /* Use this formula to get the temperature reading */
  489. adc_scaled_data -= EPM_ADC_TEMP_TO_DEGC_COEFF;
  490. do_div(adc_scaled_data, EPM_ADC_TEMP_SENSOR_COEFF);
  491. } else if (channel_num == EPM_ADC_ADS_CHANNEL_OFFSET) {
  492. /* The offset should be zero */
  493. pr_debug("%s: ADC Channel Offset\n", __func__);
  494. return -EFAULT;
  495. } else {
  496. channel_num -= EPM_ADC_CHANNEL_AIN_OFFSET;
  497. /*
  498. * Conversion for the adc channels.
  499. * mvVRef is in milli-volts and resistorvalue is in micro-ohms.
  500. * Hence, I = V/R gives us current in kilo-amps.
  501. */
  502. if (adc_scaled_data & EPM_ADC_MAX_NEGATIVE_SCALE_CODE) {
  503. sign_bit = -1;
  504. adc_scaled_data = (~adc_scaled_data
  505. & EPM_ADC_NEG_LSB_CODE);
  506. }
  507. if (adc_scaled_data != 0) {
  508. adc_scaled_data *= EPM_ADC_SCALE_FACTOR;
  509. /* Device is calibrated for 1LSB = VREF/7800h.*/
  510. adc_scaled_data *= EPM_ADC_MILLI_VOLTS_SOURCE;
  511. do_div(adc_scaled_data, EPM_ADC_VREF_CODE);
  512. /* Data will now be in micro-volts.*/
  513. adc_scaled_data *= EPM_ADC_SCALE_MILLI;
  514. /* Divide by amplifier gain value.*/
  515. do_div(adc_scaled_data, pdata->channel[chan_idx].gain);
  516. /* Data will now be in nano-volts.*/
  517. do_div(adc_scaled_data, EPM_ADC_SCALE_FACTOR);
  518. adc_scaled_data *= EPM_ADC_SCALE_MILLI;
  519. /* Data is now in micro-amps.*/
  520. do_div(adc_scaled_data,
  521. pdata->channel[chan_idx].resistorvalue);
  522. /* Set the sign bit for lekage current. */
  523. adc_scaled_data *= sign_bit;
  524. }
  525. }
  526. conv->physical = (int32_t) adc_scaled_data;
  527. return 0;
  528. }
  529. static int epm_psoc_scale_result(int16_t result, uint32_t index)
  530. {
  531. struct epm_adc_drv *epm_adc = epm_adc_drv;
  532. int32_t result_cur, neg = 0;
  533. if ((1 << index) & epm_adc->channel_mask) {
  534. if (result & 0x800) {
  535. neg = 1;
  536. result = result & 0x7ff;
  537. }
  538. /* result = (2.048V * code)/(4096 * gain * rsense) */
  539. result_cur = ((EPM_PSOC_VREF_VOLTAGE * result)/
  540. EPM_PSOC_MAX_ADC_CODE_12_BIT);
  541. result_cur = (result_cur/
  542. (epm_adc->epm_psoc_ch_prop[index].gain *
  543. epm_adc->epm_psoc_ch_prop[index].resistorvalue));
  544. if (neg)
  545. result_cur -= result_cur;
  546. } else {
  547. if (result & 0x8000) {
  548. neg = 1;
  549. result = result & 0x7fff;
  550. }
  551. /* result = (2.048V * code)/(32767 * gain * rsense) */
  552. result_cur = (((EPM_PSOC_VREF_VOLTAGE * (int) result)/
  553. EPM_PSOC_MAX_ADC_CODE_15_BIT) * 1000);
  554. result_cur = (result_cur/
  555. (epm_adc->epm_psoc_ch_prop[index].gain *
  556. epm_adc->epm_psoc_ch_prop[index].resistorvalue));
  557. if (neg)
  558. result_cur -= result_cur;
  559. }
  560. return result_cur;
  561. }
  562. static int epm_adc_blocking_conversion(struct epm_adc_drv *epm_adc,
  563. struct epm_chan_request *conv)
  564. {
  565. struct epm_adc_platform_data *pdata = epm_adc->pdev->dev.platform_data;
  566. int32_t channel_num = 0, mux_chan_idx = 0;
  567. char adc_data[3];
  568. int rc = 0;
  569. mutex_lock(&epm_adc->conv_lock);
  570. rc = epm_adc_spi_chip_select(conv->device_idx);
  571. if (rc) {
  572. pr_err("epm_adc_chip_select failed, rc=%d\n", rc);
  573. goto conv_err;
  574. }
  575. if (conv->channel_idx < pdata->chan_per_mux) {
  576. /* Reset MUXSG1_REGISTER */
  577. rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_MUXSG1_REG_ADDR,
  578. 0x0);
  579. if (rc)
  580. goto conv_err;
  581. mux_chan_idx = 1 << conv->channel_idx;
  582. /* Select Channel index in MUXSG0_REGISTER */
  583. rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_MUXSG0_REG_ADDR,
  584. mux_chan_idx);
  585. if (rc)
  586. goto conv_err;
  587. } else {
  588. /* Reset MUXSG0_REGISTER */
  589. rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_MUXSG0_REG_ADDR,
  590. 0x0);
  591. if (rc)
  592. goto conv_err;
  593. mux_chan_idx = 1 << (conv->channel_idx - pdata->chan_per_mux);
  594. /* Select Channel index in MUXSG1_REGISTER */
  595. rc = epm_adc_ads_spi_write(epm_adc, EPM_ADC_ADS_MUXSG1_REG_ADDR,
  596. mux_chan_idx);
  597. if (rc)
  598. goto conv_err;
  599. }
  600. rc = epm_adc_ads_pulse_convert(epm_adc);
  601. if (rc) {
  602. pr_err("epm_adc_ads_pulse_convert failed, rc=%d\n", rc);
  603. goto conv_err;
  604. }
  605. rc = epm_adc_ads_read_data(epm_adc, adc_data);
  606. if (rc) {
  607. pr_err("epm_adc_ads_read_data failed, rc=%d\n", rc);
  608. goto conv_err;
  609. }
  610. channel_num = (adc_data[0] & EPM_ADC_ADS_CHANNEL_DATA_CHID);
  611. pr_debug("ADC data Read: adc_data =%d, %d, %d\n",
  612. adc_data[0], adc_data[1], adc_data[2]);
  613. epm_adc_ads_scale_result(epm_adc, (uint8_t *)adc_data, conv);
  614. pr_debug("channel_num(0x) = %x, scaled_data = %d\n",
  615. (channel_num - EPM_ADC_ADS_SPI_BITS_PER_WORD),
  616. conv->physical);
  617. conv_err:
  618. mutex_unlock(&epm_adc->conv_lock);
  619. return rc;
  620. }
  621. static int epm_adc_psoc_gpio_init(bool enable)
  622. {
  623. int rc = 0;
  624. if (enable) {
  625. rc = gpio_request(EPM_PSOC_GLOBAL_ENABLE, "EPM_PSOC_GLOBAL_EN");
  626. if (!rc) {
  627. gpio_direction_output(EPM_PSOC_GLOBAL_ENABLE, 1);
  628. } else {
  629. pr_err("%s: Configure EPM_GLOBAL_EN Failed\n",
  630. __func__);
  631. return rc;
  632. }
  633. } else {
  634. gpio_direction_output(EPM_PSOC_GLOBAL_ENABLE, 0);
  635. gpio_free(EPM_PSOC_GLOBAL_ENABLE);
  636. }
  637. return 0;
  638. }
  639. static int epm_set_marker1(struct epm_marker_level *marker_init)
  640. {
  641. int rc = 0;
  642. rc = gpio_request(GPIO_EPM_MARKER1, "EPM_MARKER1");
  643. if (!rc) {
  644. gpio_direction_output(GPIO_EPM_MARKER1, 1);
  645. } else {
  646. pr_err("%s: Configure MARKER1 GPIO Failed\n",
  647. __func__);
  648. return rc;
  649. }
  650. gpio_set_value(GPIO_EPM_MARKER1, marker_init->level);
  651. return 0;
  652. }
  653. static int epm_set_marker2(struct epm_marker_level *marker_init)
  654. {
  655. int rc = 0;
  656. rc = gpio_request(GPIO_EPM_MARKER2, "EPM_MARKER2");
  657. if (!rc) {
  658. gpio_direction_output(GPIO_EPM_MARKER2, 1);
  659. } else {
  660. pr_err("%s: Configure MARKER2 GPIO Failed\n",
  661. __func__);
  662. return rc;
  663. }
  664. gpio_set_value(GPIO_EPM_MARKER2, marker_init->level);
  665. return 0;
  666. }
  667. static int epm_marker1_release(void)
  668. {
  669. gpio_free(GPIO_EPM_MARKER1);
  670. return 0;
  671. }
  672. static int epm_marker2_release(void)
  673. {
  674. gpio_free(GPIO_EPM_MARKER2);
  675. return 0;
  676. }
  677. static int epm_psoc_pause_conversion(struct epm_adc_drv *epm_adc)
  678. {
  679. struct spi_message m;
  680. struct spi_transfer t;
  681. char tx_buf[2], rx_buf[2];
  682. int rc = 0;
  683. spi_setup(epm_adc->epm_spi_client);
  684. memset(&t, 0, sizeof t);
  685. memset(tx_buf, 0, sizeof tx_buf);
  686. memset(rx_buf, 0, sizeof tx_buf);
  687. t.tx_buf = tx_buf;
  688. t.rx_buf = rx_buf;
  689. spi_message_init(&m);
  690. spi_message_add_tail(&t, &m);
  691. tx_buf[0] = EPM_PSOC_PAUSE_CONVERSION;
  692. t.len = sizeof(tx_buf);
  693. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  694. rc = spi_sync(epm_adc->epm_spi_client, &m);
  695. if (rc) {
  696. pr_err("spi sync err with %d\n", rc);
  697. return rc;
  698. }
  699. rc = spi_sync(epm_adc->epm_spi_client, &m);
  700. if (rc) {
  701. pr_err("spi sync err with %d\n", rc);
  702. return rc;
  703. }
  704. return rx_buf[0];
  705. }
  706. static int epm_psoc_unpause_conversion(struct epm_adc_drv *epm_adc)
  707. {
  708. struct spi_message m;
  709. struct spi_transfer t;
  710. char tx_buf[2], rx_buf[2];
  711. int rc = 0;
  712. spi_setup(epm_adc->epm_spi_client);
  713. memset(&t, 0, sizeof t);
  714. memset(tx_buf, 0, sizeof tx_buf);
  715. memset(rx_buf, 0, sizeof tx_buf);
  716. t.tx_buf = tx_buf;
  717. t.rx_buf = rx_buf;
  718. spi_message_init(&m);
  719. spi_message_add_tail(&t, &m);
  720. tx_buf[0] = EPM_PSOC_UNPAUSE_CONVERSION;
  721. t.len = sizeof(tx_buf);
  722. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  723. rc = spi_sync(epm_adc->epm_spi_client, &m);
  724. if (rc) {
  725. pr_err("spi sync err with %d\n", rc);
  726. return rc;
  727. }
  728. rc = spi_sync(epm_adc->epm_spi_client, &m);
  729. if (rc) {
  730. pr_err("spi sync err with %d\n", rc);
  731. return rc;
  732. }
  733. return rx_buf[0];
  734. }
  735. static int epm_psoc_init(struct epm_adc_drv *epm_adc,
  736. struct epm_psoc_init_resp *init_resp)
  737. {
  738. struct spi_message m;
  739. struct spi_transfer t;
  740. char tx_buf[17], rx_buf[17];
  741. int rc = 0;
  742. spi_setup(epm_adc->epm_spi_client);
  743. memset(&t, 0, sizeof t);
  744. memset(tx_buf, 0, sizeof tx_buf);
  745. memset(rx_buf, 0, sizeof tx_buf);
  746. t.tx_buf = tx_buf;
  747. t.rx_buf = rx_buf;
  748. spi_message_init(&m);
  749. spi_message_add_tail(&t, &m);
  750. tx_buf[0] = init_resp->cmd;
  751. t.len = sizeof(tx_buf);
  752. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  753. rc = spi_sync(epm_adc->epm_spi_client, &m);
  754. if (rc)
  755. return rc;
  756. rc = spi_sync(epm_adc->epm_spi_client, &m);
  757. if (rc)
  758. return rc;
  759. init_resp->cmd = rx_buf[0];
  760. init_resp->version = rx_buf[1];
  761. init_resp->compatible_ver = rx_buf[2];
  762. init_resp->firm_ver[0] = rx_buf[3];
  763. init_resp->firm_ver[1] = rx_buf[4];
  764. init_resp->firm_ver[2] = rx_buf[5];
  765. init_resp->num_dev = rx_buf[6];
  766. init_resp->num_channel = rx_buf[7];
  767. pr_debug("EPM PSOC response for hello command: resp_cmd:0x%x\n",
  768. rx_buf[0]);
  769. pr_debug("EPM PSOC version:0x%x\n", rx_buf[1]);
  770. pr_debug("EPM PSOC firmware version:0x%x\n",
  771. rx_buf[6] | rx_buf[5] | rx_buf[4] | rx_buf[3]);
  772. return rc;
  773. }
  774. static int epm_psoc_channel_configure(struct epm_adc_drv *epm_adc,
  775. struct epm_psoc_channel_configure *psoc_chan_configure)
  776. {
  777. struct spi_message m;
  778. struct spi_transfer t;
  779. char tx_buf[9], rx_buf[9];
  780. int32_t rc = 0, chan_num;
  781. spi_setup(epm_adc->epm_spi_client);
  782. memset(&t, 0, sizeof t);
  783. memset(tx_buf, 0, sizeof tx_buf);
  784. memset(rx_buf, 0, sizeof tx_buf);
  785. t.tx_buf = tx_buf;
  786. t.rx_buf = rx_buf;
  787. spi_message_init(&m);
  788. spi_message_add_tail(&t, &m);
  789. chan_num = psoc_chan_configure->channel_num;
  790. tx_buf[0] = psoc_chan_configure->cmd;
  791. tx_buf[1] = 0;
  792. tx_buf[2] = (chan_num & 0xff000000) >> 24;
  793. tx_buf[3] = (chan_num & 0xff0000) >> 16;
  794. tx_buf[4] = (chan_num & 0xff00) >> 8;
  795. tx_buf[5] = (chan_num & 0xff);
  796. t.len = sizeof(tx_buf);
  797. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  798. rc = spi_sync(epm_adc->epm_spi_client, &m);
  799. if (rc)
  800. return rc;
  801. rc = spi_sync(epm_adc->epm_spi_client, &m);
  802. if (rc)
  803. return rc;
  804. psoc_chan_configure->cmd = rx_buf[0];
  805. psoc_chan_configure->device_num = rx_buf[1];
  806. chan_num = rx_buf[2] << 24 | (rx_buf[3] << 16) | (rx_buf[4] << 8) |
  807. rx_buf[5];
  808. psoc_chan_configure->channel_num = chan_num;
  809. return rc;
  810. }
  811. static int epm_psoc_set_averaging(struct epm_adc_drv *epm_adc,
  812. struct epm_psoc_set_avg *psoc_set_avg)
  813. {
  814. struct spi_message m;
  815. struct spi_transfer t;
  816. char tx_buf[4], rx_buf[4];
  817. int rc = 0;
  818. spi_setup(epm_adc->epm_spi_client);
  819. memset(&t, 0, sizeof t);
  820. memset(tx_buf, 0, sizeof tx_buf);
  821. memset(rx_buf, 0, sizeof tx_buf);
  822. t.tx_buf = tx_buf;
  823. t.rx_buf = rx_buf;
  824. spi_message_init(&m);
  825. spi_message_add_tail(&t, &m);
  826. tx_buf[0] = psoc_set_avg->cmd;
  827. tx_buf[1] = psoc_set_avg->avg_period;
  828. t.len = sizeof(tx_buf);
  829. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  830. rc = spi_sync(epm_adc->epm_spi_client, &m);
  831. if (rc)
  832. return rc;
  833. rc = spi_sync(epm_adc->epm_spi_client, &m);
  834. if (rc)
  835. return rc;
  836. psoc_set_avg->cmd = rx_buf[0];
  837. psoc_set_avg->return_code = rx_buf[1];
  838. return rc;
  839. }
  840. static int epm_psoc_get_data(struct epm_adc_drv *epm_adc,
  841. struct epm_psoc_get_data *psoc_get_meas)
  842. {
  843. struct spi_message m;
  844. struct spi_transfer t;
  845. char tx_buf[10], rx_buf[10];
  846. int rc = 0;
  847. spi_setup(epm_adc->epm_spi_client);
  848. memset(&t, 0, sizeof t);
  849. memset(tx_buf, 0, sizeof tx_buf);
  850. memset(rx_buf, 0, sizeof tx_buf);
  851. t.tx_buf = tx_buf;
  852. t.rx_buf = rx_buf;
  853. spi_message_init(&m);
  854. spi_message_add_tail(&t, &m);
  855. tx_buf[0] = psoc_get_meas->cmd;
  856. tx_buf[1] = psoc_get_meas->dev_num;
  857. tx_buf[2] = psoc_get_meas->chan_num;
  858. t.len = sizeof(tx_buf);
  859. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  860. rc = spi_sync(epm_adc->epm_spi_client, &m);
  861. if (rc)
  862. return rc;
  863. rc = spi_sync(epm_adc->epm_spi_client, &m);
  864. if (rc)
  865. return rc;
  866. psoc_get_meas->cmd = rx_buf[0];
  867. psoc_get_meas->dev_num = rx_buf[1];
  868. psoc_get_meas->chan_num = rx_buf[2];
  869. psoc_get_meas->timestamp_resp_value = (rx_buf[3] << 24) |
  870. (rx_buf[4] << 16) | (rx_buf[5] << 8) |
  871. rx_buf[6];
  872. psoc_get_meas->reading_raw = (rx_buf[7] << 8) | rx_buf[8];
  873. return rc;
  874. }
  875. static int epm_psoc_get_buffered_data(struct epm_adc_drv *epm_adc,
  876. struct epm_psoc_get_buffered_data *psoc_get_meas)
  877. {
  878. struct spi_message m;
  879. struct spi_transfer t;
  880. char tx_buf[64], rx_buf[64];
  881. int rc = 0, i;
  882. spi_setup(epm_adc->epm_spi_client);
  883. memset(&t, 0, sizeof t);
  884. memset(tx_buf, 0, sizeof tx_buf);
  885. memset(rx_buf, 0, sizeof tx_buf);
  886. t.tx_buf = tx_buf;
  887. t.rx_buf = rx_buf;
  888. spi_message_init(&m);
  889. spi_message_add_tail(&t, &m);
  890. tx_buf[0] = psoc_get_meas->cmd;
  891. t.len = sizeof(tx_buf);
  892. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  893. rc = spi_sync(epm_adc->epm_spi_client, &m);
  894. if (rc)
  895. return rc;
  896. rc = spi_sync(epm_adc->epm_spi_client, &m);
  897. if (rc)
  898. return rc;
  899. psoc_get_meas->cmd = rx_buf[0];
  900. psoc_get_meas->dev_num = rx_buf[1];
  901. psoc_get_meas->status_mask = rx_buf[2];
  902. psoc_get_meas->chan_idx = rx_buf[3];
  903. psoc_get_meas->chan_mask = (rx_buf[4] << 24 |
  904. rx_buf[5] << 16 | rx_buf[6] << 8
  905. | rx_buf[7]);
  906. psoc_get_meas->timestamp_start = (rx_buf[8] << 24 |
  907. rx_buf[9] << 16 | rx_buf[10] << 8
  908. | rx_buf[11]);
  909. psoc_get_meas->timestamp_end = (rx_buf[12] << 24 |
  910. rx_buf[13] << 16 | rx_buf[14] << 8
  911. | rx_buf[15]);
  912. for (i = 0; i < EPM_PSOC_BUFFERED_DATA_LENGTH; i++)
  913. psoc_get_meas->buff_data[i] = rx_buf[16 + i];
  914. return rc;
  915. }
  916. static int epm_psoc_get_timestamp(struct epm_adc_drv *epm_adc,
  917. struct epm_psoc_system_time_stamp *psoc_timestamp)
  918. {
  919. struct spi_message m;
  920. struct spi_transfer t;
  921. char tx_buf[10], rx_buf[10];
  922. int rc = 0;
  923. spi_setup(epm_adc->epm_spi_client);
  924. memset(&t, 0, sizeof t);
  925. memset(tx_buf, 0, sizeof tx_buf);
  926. memset(rx_buf, 0, sizeof tx_buf);
  927. t.tx_buf = tx_buf;
  928. t.rx_buf = rx_buf;
  929. spi_message_init(&m);
  930. spi_message_add_tail(&t, &m);
  931. psoc_timestamp->cmd = EPM_PSOC_GET_SYSTEM_TIMESTAMP_CMD;
  932. tx_buf[0] = psoc_timestamp->cmd;
  933. t.len = sizeof(tx_buf);
  934. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  935. rc = spi_sync(epm_adc->epm_spi_client, &m);
  936. if (rc)
  937. return rc;
  938. rc = spi_sync(epm_adc->epm_spi_client, &m);
  939. if (rc)
  940. return rc;
  941. psoc_timestamp->cmd = rx_buf[0];
  942. psoc_timestamp->timestamp = rx_buf[1] << 24 | rx_buf[2] << 16 |
  943. rx_buf[3] << 8 | rx_buf[4];
  944. return rc;
  945. }
  946. static int epm_psoc_set_timestamp(struct epm_adc_drv *epm_adc,
  947. struct epm_psoc_system_time_stamp *psoc_timestamp)
  948. {
  949. struct spi_message m;
  950. struct spi_transfer t;
  951. char tx_buf[10], rx_buf[10];
  952. int rc = 0;
  953. spi_setup(epm_adc->epm_spi_client);
  954. memset(&t, 0, sizeof t);
  955. memset(tx_buf, 0, sizeof tx_buf);
  956. memset(rx_buf, 0, sizeof tx_buf);
  957. t.tx_buf = tx_buf;
  958. t.rx_buf = rx_buf;
  959. spi_message_init(&m);
  960. spi_message_add_tail(&t, &m);
  961. psoc_timestamp->cmd = EPM_PSOC_SET_SYSTEM_TIMESTAMP_CMD;
  962. tx_buf[0] = psoc_timestamp->cmd;
  963. tx_buf[1] = (psoc_timestamp->timestamp >> 24) & 0xff;
  964. tx_buf[2] = (psoc_timestamp->timestamp >> 16) & 0xff;
  965. tx_buf[3] = (psoc_timestamp->timestamp >> 8) & 0xff;
  966. tx_buf[4] = (psoc_timestamp->timestamp & 0xff);
  967. t.len = sizeof(tx_buf);
  968. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  969. rc = spi_sync(epm_adc->epm_spi_client, &m);
  970. if (rc)
  971. return rc;
  972. rc = spi_sync(epm_adc->epm_spi_client, &m);
  973. if (rc)
  974. return rc;
  975. psoc_timestamp->cmd = rx_buf[0];
  976. psoc_timestamp->timestamp = rx_buf[1] << 24 | rx_buf[2] << 16 |
  977. rx_buf[3] << 8 | rx_buf[4];
  978. return rc;
  979. }
  980. static int epm_psoc_get_avg_buffered_switch_data(struct epm_adc_drv *epm_adc,
  981. struct epm_psoc_get_avg_buffered_switch_data *psoc_get_meas)
  982. {
  983. struct spi_message m;
  984. struct spi_transfer t;
  985. char tx_buf[64], rx_buf[64];
  986. int rc = 0, i = 0, j = 0, z = 0;
  987. spi_setup(epm_adc->epm_spi_client);
  988. memset(&t, 0, sizeof t);
  989. memset(tx_buf, 0, sizeof tx_buf);
  990. memset(rx_buf, 0, sizeof tx_buf);
  991. t.tx_buf = tx_buf;
  992. t.rx_buf = rx_buf;
  993. spi_message_init(&m);
  994. spi_message_add_tail(&t, &m);
  995. tx_buf[0] = psoc_get_meas->cmd;
  996. t.len = sizeof(tx_buf);
  997. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  998. rc = spi_sync(epm_adc->epm_spi_client, &m);
  999. if (rc)
  1000. return rc;
  1001. rc = spi_sync(epm_adc->epm_spi_client, &m);
  1002. if (rc)
  1003. return rc;
  1004. psoc_get_meas->cmd = rx_buf[0];
  1005. psoc_get_meas->status = rx_buf[1];
  1006. psoc_get_meas->timestamp_start = (rx_buf[2] << 24 |
  1007. rx_buf[3] << 16 | rx_buf[4] << 8
  1008. | rx_buf[5]);
  1009. psoc_get_meas->channel_mask = (rx_buf[6] << 24 |
  1010. rx_buf[7] << 16 | rx_buf[8] << 8
  1011. | rx_buf[9]);
  1012. for (i = 0; i < EPM_PSOC_BUFFERED_DATA_LENGTH2; i++)
  1013. psoc_get_meas->avg_data[i] = rx_buf[10 + i];
  1014. i = j = 0;
  1015. for (z = 0; z < 4; z++) {
  1016. psoc_get_meas->data[i].channel = i;
  1017. psoc_get_meas->data[i].avg_buffer_sample =
  1018. rx_buf[10 + j] & EPM_AVG_BUF_MASK1;
  1019. i++;
  1020. j++;
  1021. psoc_get_meas->data[i].avg_buffer_sample =
  1022. rx_buf[10 + j] & EPM_AVG_BUF_MASK2;
  1023. i++;
  1024. j++;
  1025. psoc_get_meas->data[i].avg_buffer_sample =
  1026. rx_buf[10 + j] & EPM_AVG_BUF_MASK3;
  1027. psoc_get_meas->data[i].avg_buffer_sample <<= 8;
  1028. j++;
  1029. psoc_get_meas->data[i].avg_buffer_sample =
  1030. psoc_get_meas->data[i].avg_buffer_sample |
  1031. (rx_buf[10 + j] & EPM_AVG_BUF_MASK4);
  1032. i++;
  1033. j++;
  1034. psoc_get_meas->data[i].avg_buffer_sample =
  1035. rx_buf[10 + j] & EPM_AVG_BUF_MASK5;
  1036. i++;
  1037. j++;
  1038. psoc_get_meas->data[i].avg_buffer_sample =
  1039. rx_buf[10 + j] & EPM_AVG_BUF_MASK6;
  1040. i++;
  1041. j++;
  1042. psoc_get_meas->data[i].avg_buffer_sample =
  1043. rx_buf[10 + j] & EPM_AVG_BUF_MASK7;
  1044. psoc_get_meas->data[i].avg_buffer_sample <<= 4;
  1045. j++;
  1046. psoc_get_meas->data[i].avg_buffer_sample =
  1047. psoc_get_meas->data[i].avg_buffer_sample |
  1048. (rx_buf[10 + j] & EPM_AVG_BUF_MASK8);
  1049. i++;
  1050. j++;
  1051. psoc_get_meas->data[i].avg_buffer_sample =
  1052. rx_buf[10 + j] & EPM_AVG_BUF_MASK9;
  1053. i++;
  1054. j++;
  1055. psoc_get_meas->data[i].avg_buffer_sample =
  1056. rx_buf[10 + j] & EPM_AVG_BUF_MASK10;
  1057. }
  1058. for (z = 0; z < 32; z++) {
  1059. if (psoc_get_meas->data[z].avg_buffer_sample != 0)
  1060. psoc_get_meas->data[z].result = epm_psoc_scale_result(
  1061. psoc_get_meas->data[z].avg_buffer_sample, z);
  1062. }
  1063. return rc;
  1064. }
  1065. static int epm_psoc_set_vadc(struct epm_adc_drv *epm_adc,
  1066. struct epm_psoc_set_vadc *psoc_set_vadc)
  1067. {
  1068. struct spi_message m;
  1069. struct spi_transfer t;
  1070. char tx_buf[10], rx_buf[10];
  1071. int rc = 0;
  1072. spi_setup(epm_adc->epm_spi_client);
  1073. memset(&t, 0, sizeof t);
  1074. memset(tx_buf, 0, sizeof tx_buf);
  1075. memset(rx_buf, 0, sizeof tx_buf);
  1076. t.tx_buf = tx_buf;
  1077. t.rx_buf = rx_buf;
  1078. spi_message_init(&m);
  1079. spi_message_add_tail(&t, &m);
  1080. tx_buf[0] = psoc_set_vadc->cmd;
  1081. tx_buf[1] = psoc_set_vadc->vadc_dev;
  1082. tx_buf[2] = (psoc_set_vadc->vadc_voltage & 0xff000000) >> 24;
  1083. tx_buf[3] = (psoc_set_vadc->vadc_voltage & 0xff0000) >> 16;
  1084. tx_buf[4] = (psoc_set_vadc->vadc_voltage & 0xff00) >> 8;
  1085. tx_buf[5] = psoc_set_vadc->vadc_voltage & 0xff;
  1086. t.len = sizeof(tx_buf);
  1087. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  1088. rc = spi_sync(epm_adc->epm_spi_client, &m);
  1089. if (rc)
  1090. return rc;
  1091. rc = spi_sync(epm_adc->epm_spi_client, &m);
  1092. if (rc)
  1093. return rc;
  1094. psoc_set_vadc->cmd = rx_buf[0];
  1095. psoc_set_vadc->vadc_dev = rx_buf[1];
  1096. psoc_set_vadc->vadc_voltage = (rx_buf[2] << 24) | (rx_buf[3] << 16) |
  1097. (rx_buf[4] << 8) | (rx_buf[5]);
  1098. return rc;
  1099. }
  1100. static int epm_psoc_set_channel_switch(struct epm_adc_drv *epm_adc,
  1101. struct epm_psoc_set_channel_switch *psoc_channel_switch)
  1102. {
  1103. struct spi_message m;
  1104. struct spi_transfer t;
  1105. char tx_buf[10], rx_buf[10];
  1106. int rc = 0;
  1107. spi_setup(epm_adc->epm_spi_client);
  1108. memset(&t, 0, sizeof t);
  1109. memset(tx_buf, 0, sizeof tx_buf);
  1110. memset(rx_buf, 0, sizeof tx_buf);
  1111. t.tx_buf = tx_buf;
  1112. t.rx_buf = rx_buf;
  1113. spi_message_init(&m);
  1114. spi_message_add_tail(&t, &m);
  1115. tx_buf[0] = psoc_channel_switch->cmd;
  1116. tx_buf[1] = psoc_channel_switch->dev;
  1117. tx_buf[2] = (psoc_channel_switch->delay & 0xff000000) >> 24;
  1118. tx_buf[3] = (psoc_channel_switch->delay & 0xff0000) >> 16;
  1119. tx_buf[4] = (psoc_channel_switch->delay & 0xff00) >> 8;
  1120. tx_buf[5] = psoc_channel_switch->delay & 0xff;
  1121. t.len = sizeof(tx_buf);
  1122. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  1123. rc = spi_sync(epm_adc->epm_spi_client, &m);
  1124. if (rc)
  1125. return rc;
  1126. rc = spi_sync(epm_adc->epm_spi_client, &m);
  1127. if (rc)
  1128. return rc;
  1129. psoc_channel_switch->cmd = rx_buf[0];
  1130. psoc_channel_switch->dev = rx_buf[1];
  1131. psoc_channel_switch->delay = rx_buf[2] << 24 |
  1132. rx_buf[3] << 16 |
  1133. rx_buf[4] << 8 | rx_buf[5];
  1134. return rc;
  1135. }
  1136. static int epm_psoc_clear_buffer(struct epm_adc_drv *epm_adc)
  1137. {
  1138. struct spi_message m;
  1139. struct spi_transfer t;
  1140. char tx_buf[3], rx_buf[3];
  1141. int rc = 0;
  1142. spi_setup(epm_adc->epm_spi_client);
  1143. memset(&t, 0, sizeof t);
  1144. memset(tx_buf, 0, sizeof tx_buf);
  1145. memset(rx_buf, 0, sizeof tx_buf);
  1146. t.tx_buf = tx_buf;
  1147. t.rx_buf = rx_buf;
  1148. spi_message_init(&m);
  1149. spi_message_add_tail(&t, &m);
  1150. tx_buf[0] = EPM_PSOC_CLEAR_BUFFER_CMD;
  1151. t.len = sizeof(tx_buf);
  1152. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  1153. rc = spi_sync(epm_adc->epm_spi_client, &m);
  1154. if (rc)
  1155. return rc;
  1156. rc = spi_sync(epm_adc->epm_spi_client, &m);
  1157. if (rc)
  1158. return rc;
  1159. rc = rx_buf[1];
  1160. return rc;
  1161. }
  1162. static int epm_psoc_get_gpio_buffer_data(struct epm_adc_drv *epm_adc,
  1163. struct epm_get_gpio_buffer_resp *gpio_resp_pkt)
  1164. {
  1165. struct spi_message m;
  1166. struct spi_transfer t;
  1167. char tx_buf[7], rx_buf[7];
  1168. int rc = 0;
  1169. spi_setup(epm_adc->epm_spi_client);
  1170. memset(&t, 0, sizeof t);
  1171. memset(tx_buf, 0, sizeof tx_buf);
  1172. memset(rx_buf, 0, sizeof tx_buf);
  1173. t.tx_buf = tx_buf;
  1174. t.rx_buf = rx_buf;
  1175. spi_message_init(&m);
  1176. spi_message_add_tail(&t, &m);
  1177. tx_buf[0] = EPM_PSOC_GET_GPIO_BUFFER_CMD;
  1178. t.len = sizeof(tx_buf);
  1179. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  1180. rc = spi_sync(epm_adc->epm_spi_client, &m);
  1181. if (rc)
  1182. return rc;
  1183. rc = spi_sync(epm_adc->epm_spi_client, &m);
  1184. if (rc)
  1185. return rc;
  1186. gpio_resp_pkt->cmd = rx_buf[0];
  1187. gpio_resp_pkt->status = rx_buf[1];
  1188. gpio_resp_pkt->bitmask_monitor_pin = rx_buf[2];
  1189. gpio_resp_pkt->timestamp = rx_buf[3] << 24 | rx_buf[4] << 16 |
  1190. rx_buf[5] << 8 | tx_buf[6];
  1191. return rc;
  1192. }
  1193. static int epm_psoc_gpio_buffer_request_configure(struct epm_adc_drv *epm_adc,
  1194. struct epm_gpio_buffer_request *gpio_request)
  1195. {
  1196. struct spi_message m;
  1197. struct spi_transfer t;
  1198. char tx_buf[2], rx_buf[2];
  1199. int rc = 0;
  1200. spi_setup(epm_adc->epm_spi_client);
  1201. memset(&t, 0, sizeof t);
  1202. memset(tx_buf, 0, sizeof tx_buf);
  1203. memset(rx_buf, 0, sizeof tx_buf);
  1204. t.tx_buf = tx_buf;
  1205. t.rx_buf = rx_buf;
  1206. spi_message_init(&m);
  1207. spi_message_add_tail(&t, &m);
  1208. tx_buf[0] = EPM_PSOC_GPIO_BUFFER_REQUEST_CMD;
  1209. tx_buf[1] = gpio_request->bitmask_monitor_pin;
  1210. t.len = sizeof(tx_buf);
  1211. t.bits_per_word = EPM_ADC_ADS_SPI_BITS_PER_WORD;
  1212. rc = spi_sync(epm_adc->epm_spi_client, &m);
  1213. if (rc)
  1214. return rc;
  1215. rc = spi_sync(epm_adc->epm_spi_client, &m);
  1216. if (rc)
  1217. return rc;
  1218. gpio_request->cmd = rx_buf[0];
  1219. gpio_request->status = rx_buf[1];
  1220. return rc;
  1221. }
  1222. static long epm_adc_ioctl(struct file *file, unsigned int cmd,
  1223. unsigned long arg)
  1224. {
  1225. struct epm_adc_drv *epm_adc = epm_adc_drv;
  1226. switch (cmd) {
  1227. case EPM_ADC_REQUEST:
  1228. {
  1229. struct epm_chan_request conv;
  1230. int rc;
  1231. if (copy_from_user(&conv, (void __user *)arg,
  1232. sizeof(struct epm_chan_request)))
  1233. return -EFAULT;
  1234. rc = epm_adc_blocking_conversion(epm_adc, &conv);
  1235. if (rc) {
  1236. pr_err("Failed EPM conversion:%d\n", rc);
  1237. return rc;
  1238. }
  1239. if (copy_to_user((void __user *)arg, &conv,
  1240. sizeof(struct epm_chan_request)))
  1241. return -EFAULT;
  1242. break;
  1243. }
  1244. case EPM_ADC_INIT:
  1245. {
  1246. uint32_t result;
  1247. if (!epm_adc_expander_register) {
  1248. result = epm_adc_i2c_expander_register();
  1249. if (result) {
  1250. pr_err("Failed i2c register:%d\n",
  1251. result);
  1252. return result;
  1253. }
  1254. epm_adc_expander_register = true;
  1255. }
  1256. result = epm_adc_hw_init(epm_adc);
  1257. if (copy_to_user((void __user *)arg, &result,
  1258. sizeof(uint32_t)))
  1259. return -EFAULT;
  1260. break;
  1261. }
  1262. case EPM_ADC_DEINIT:
  1263. {
  1264. uint32_t result;
  1265. result = epm_adc_hw_deinit(epm_adc);
  1266. if (copy_to_user((void __user *)arg, &result,
  1267. sizeof(uint32_t)))
  1268. return -EFAULT;
  1269. break;
  1270. }
  1271. case EPM_MARKER1_REQUEST:
  1272. {
  1273. struct epm_marker_level marker_init;
  1274. uint32_t result;
  1275. if (copy_from_user(&marker_init, (void __user *)arg,
  1276. sizeof(struct epm_marker_level)))
  1277. return -EFAULT;
  1278. result = epm_set_marker1(&marker_init);
  1279. if (copy_to_user((void __user *)arg, &result,
  1280. sizeof(uint32_t)))
  1281. return -EFAULT;
  1282. break;
  1283. }
  1284. case EPM_MARKER2_REQUEST:
  1285. {
  1286. struct epm_marker_level marker_init;
  1287. uint32_t result;
  1288. if (copy_from_user(&marker_init, (void __user *)arg,
  1289. sizeof(struct epm_marker_level)))
  1290. return -EFAULT;
  1291. result = epm_set_marker2(&marker_init);
  1292. if (copy_to_user((void __user *)arg, &result,
  1293. sizeof(uint32_t)))
  1294. return -EFAULT;
  1295. break;
  1296. }
  1297. case EPM_MARKER1_RELEASE:
  1298. {
  1299. uint32_t result;
  1300. result = epm_marker1_release();
  1301. if (copy_to_user((void __user *)arg, &result,
  1302. sizeof(uint32_t)))
  1303. return -EFAULT;
  1304. break;
  1305. }
  1306. case EPM_MARKER2_RELEASE:
  1307. {
  1308. uint32_t result;
  1309. result = epm_marker2_release();
  1310. if (copy_to_user((void __user *)arg, &result,
  1311. sizeof(uint32_t)))
  1312. return -EFAULT;
  1313. break;
  1314. }
  1315. case EPM_PSOC_ADC_INIT:
  1316. {
  1317. struct epm_psoc_init_resp psoc_init;
  1318. int rc;
  1319. if (copy_from_user(&psoc_init, (void __user *)arg,
  1320. sizeof(struct epm_psoc_init_resp)))
  1321. return -EFAULT;
  1322. psoc_init.cmd = EPM_PSOC_INIT_CMD;
  1323. rc = epm_psoc_init(epm_adc, &psoc_init);
  1324. if (rc) {
  1325. pr_err("PSOC initialization failed\n");
  1326. return -EINVAL;
  1327. }
  1328. if (!rc) {
  1329. rc = epm_adc_psoc_gpio_init(true);
  1330. if (rc) {
  1331. pr_err("GPIO init failed\n");
  1332. return -EINVAL;
  1333. }
  1334. }
  1335. if (copy_to_user((void __user *)arg, &psoc_init,
  1336. sizeof(struct epm_psoc_init_resp)))
  1337. return -EFAULT;
  1338. break;
  1339. }
  1340. case EPM_PSOC_ADC_DEINIT:
  1341. {
  1342. uint32_t result;
  1343. result = epm_adc_psoc_gpio_init(false);
  1344. if (copy_to_user((void __user *)arg, &result,
  1345. sizeof(uint32_t)))
  1346. return -EFAULT;
  1347. break;
  1348. }
  1349. case EPM_PSOC_ADC_CHANNEL_ENABLE:
  1350. case EPM_PSOC_ADC_CHANNEL_DISABLE:
  1351. {
  1352. struct epm_psoc_channel_configure psoc_chan_configure;
  1353. int rc;
  1354. if (copy_from_user(&psoc_chan_configure,
  1355. (void __user *)arg,
  1356. sizeof(struct epm_psoc_channel_configure)))
  1357. return -EFAULT;
  1358. psoc_chan_configure.cmd =
  1359. EPM_PSOC_CHANNEL_ENABLE_DISABLE_CMD;
  1360. rc = epm_psoc_channel_configure(epm_adc,
  1361. &psoc_chan_configure);
  1362. if (rc) {
  1363. pr_err("PSOC channel configure failed\n");
  1364. return -EINVAL;
  1365. }
  1366. if (copy_to_user((void __user *)arg,
  1367. &psoc_chan_configure,
  1368. sizeof(struct epm_psoc_channel_configure)))
  1369. return -EFAULT;
  1370. break;
  1371. }
  1372. case EPM_PSOC_ADC_SET_AVERAGING:
  1373. {
  1374. struct epm_psoc_set_avg psoc_set_avg;
  1375. int rc;
  1376. if (copy_from_user(&psoc_set_avg, (void __user *)arg,
  1377. sizeof(struct epm_psoc_set_avg)))
  1378. return -EFAULT;
  1379. psoc_set_avg.cmd = EPM_PSOC_SET_AVERAGING_CMD;
  1380. rc = epm_psoc_set_averaging(epm_adc, &psoc_set_avg);
  1381. if (rc) {
  1382. pr_err("PSOC averaging failed\n");
  1383. return -EINVAL;
  1384. }
  1385. if (copy_to_user((void __user *)arg, &psoc_set_avg,
  1386. sizeof(struct epm_psoc_set_avg)))
  1387. return -EFAULT;
  1388. break;
  1389. }
  1390. case EPM_PSOC_ADC_GET_LAST_MEASUREMENT:
  1391. {
  1392. struct epm_psoc_get_data psoc_get_data;
  1393. int rc;
  1394. if (copy_from_user(&psoc_get_data,
  1395. (void __user *)arg,
  1396. sizeof(struct epm_psoc_get_data)))
  1397. return -EFAULT;
  1398. psoc_get_data.cmd = EPM_PSOC_GET_LAST_MEASUREMENT_CMD;
  1399. rc = epm_psoc_get_data(epm_adc, &psoc_get_data);
  1400. if (rc) {
  1401. pr_err("PSOC last measured data failed\n");
  1402. return -EINVAL;
  1403. }
  1404. psoc_get_data.reading_value = epm_psoc_scale_result(
  1405. psoc_get_data.reading_raw,
  1406. psoc_get_data.chan_num);
  1407. if (copy_to_user((void __user *)arg, &psoc_get_data,
  1408. sizeof(struct epm_psoc_get_data)))
  1409. return -EFAULT;
  1410. break;
  1411. }
  1412. case EPM_PSOC_ADC_GET_BUFFERED_DATA:
  1413. {
  1414. struct epm_psoc_get_buffered_data psoc_get_data;
  1415. int rc;
  1416. if (copy_from_user(&psoc_get_data,
  1417. (void __user *)arg,
  1418. sizeof(struct epm_psoc_get_buffered_data)))
  1419. return -EFAULT;
  1420. psoc_get_data.cmd = EPM_PSOC_GET_BUFFERED_DATA_CMD;
  1421. rc = epm_psoc_get_buffered_data(epm_adc,
  1422. &psoc_get_data);
  1423. if (rc) {
  1424. pr_err("PSOC buffered measurement failed\n");
  1425. return -EINVAL;
  1426. }
  1427. if (copy_to_user((void __user *)arg, &psoc_get_data,
  1428. sizeof(struct epm_psoc_get_buffered_data)))
  1429. return -EFAULT;
  1430. break;
  1431. }
  1432. case EPM_PSOC_ADC_GET_SYSTEM_TIMESTAMP:
  1433. {
  1434. struct epm_psoc_system_time_stamp psoc_timestamp;
  1435. int rc;
  1436. if (copy_from_user(&psoc_timestamp,
  1437. (void __user *)arg,
  1438. sizeof(struct epm_psoc_system_time_stamp)))
  1439. return -EFAULT;
  1440. rc = epm_psoc_get_timestamp(epm_adc, &psoc_timestamp);
  1441. if (rc) {
  1442. pr_err("PSOC get timestamp failed\n");
  1443. return -EINVAL;
  1444. }
  1445. if (copy_to_user((void __user *)arg, &psoc_timestamp,
  1446. sizeof(struct epm_psoc_system_time_stamp)))
  1447. return -EFAULT;
  1448. break;
  1449. }
  1450. case EPM_PSOC_ADC_SET_SYSTEM_TIMESTAMP:
  1451. {
  1452. struct epm_psoc_system_time_stamp psoc_timestamp;
  1453. int rc;
  1454. if (copy_from_user(&psoc_timestamp,
  1455. (void __user *)arg,
  1456. sizeof(struct epm_psoc_system_time_stamp)))
  1457. return -EFAULT;
  1458. rc = epm_psoc_set_timestamp(epm_adc, &psoc_timestamp);
  1459. if (rc) {
  1460. pr_err("PSOC set timestamp failed\n");
  1461. return -EINVAL;
  1462. }
  1463. if (copy_to_user((void __user *)arg, &psoc_timestamp,
  1464. sizeof(struct epm_psoc_system_time_stamp)))
  1465. return -EFAULT;
  1466. break;
  1467. }
  1468. case EPM_PSOC_ADC_GET_AVERAGE_DATA:
  1469. {
  1470. struct epm_psoc_get_avg_buffered_switch_data
  1471. psoc_get_data;
  1472. int rc;
  1473. if (copy_from_user(&psoc_get_data,
  1474. (void __user *)arg,
  1475. sizeof(struct
  1476. epm_psoc_get_avg_buffered_switch_data)))
  1477. return -EFAULT;
  1478. psoc_get_data.cmd = EPM_PSOC_GET_AVERAGED_DATA_CMD;
  1479. rc = epm_psoc_get_avg_buffered_switch_data(epm_adc,
  1480. &psoc_get_data);
  1481. if (rc) {
  1482. pr_err("Get averaged buffered data failed\n");
  1483. return -EINVAL;
  1484. }
  1485. if (copy_to_user((void __user *)arg, &psoc_get_data,
  1486. sizeof(struct
  1487. epm_psoc_get_avg_buffered_switch_data)))
  1488. return -EFAULT;
  1489. break;
  1490. }
  1491. case EPM_PSOC_SET_CHANNEL_SWITCH:
  1492. {
  1493. struct epm_psoc_set_channel_switch psoc_channel_switch;
  1494. int rc;
  1495. if (copy_from_user(&psoc_channel_switch,
  1496. (void __user *)arg,
  1497. sizeof(struct epm_psoc_set_channel_switch)))
  1498. return -EFAULT;
  1499. rc = epm_psoc_set_channel_switch(epm_adc,
  1500. &psoc_channel_switch);
  1501. if (rc) {
  1502. pr_err("PSOC channel switch failed\n");
  1503. return -EINVAL;
  1504. }
  1505. if (copy_to_user((void __user *)arg,
  1506. &psoc_channel_switch,
  1507. sizeof(struct epm_psoc_set_channel_switch)))
  1508. return -EFAULT;
  1509. break;
  1510. }
  1511. case EPM_PSOC_CLEAR_BUFFER:
  1512. {
  1513. int rc;
  1514. rc = epm_psoc_clear_buffer(epm_adc);
  1515. if (rc) {
  1516. pr_err("PSOC clear buffer failed\n");
  1517. return -EINVAL;
  1518. }
  1519. if (copy_to_user((void __user *)arg, &rc,
  1520. sizeof(uint32_t)))
  1521. return -EFAULT;
  1522. break;
  1523. }
  1524. case EPM_PSOC_ADC_SET_VADC_REFERENCE:
  1525. {
  1526. struct epm_psoc_set_vadc psoc_set_vadc;
  1527. int rc;
  1528. if (copy_from_user(&psoc_set_vadc,
  1529. (void __user *)arg,
  1530. sizeof(struct epm_psoc_set_vadc)))
  1531. return -EFAULT;
  1532. rc = epm_psoc_set_vadc(epm_adc, &psoc_set_vadc);
  1533. if (rc) {
  1534. pr_err("PSOC set VADC failed\n");
  1535. return -EINVAL;
  1536. }
  1537. if (copy_to_user((void __user *)arg, &psoc_set_vadc,
  1538. sizeof(struct epm_psoc_set_vadc)))
  1539. return -EFAULT;
  1540. break;
  1541. }
  1542. case EPM_PSOC_GPIO_BUFFER_REQUEST:
  1543. {
  1544. struct epm_gpio_buffer_request gpio_request;
  1545. int rc;
  1546. if (copy_from_user(&gpio_request,
  1547. (void __user *)arg,
  1548. sizeof(struct epm_gpio_buffer_request)))
  1549. return -EFAULT;
  1550. rc = epm_psoc_gpio_buffer_request_configure(epm_adc,
  1551. &gpio_request);
  1552. if (rc) {
  1553. pr_err("PSOC buffer request failed\n");
  1554. return -EINVAL;
  1555. }
  1556. if (copy_to_user((void __user *)arg, &gpio_request,
  1557. sizeof(struct epm_gpio_buffer_request)))
  1558. return -EFAULT;
  1559. break;
  1560. }
  1561. case EPM_PSOC_GET_GPIO_BUFFER_DATA:
  1562. {
  1563. struct epm_get_gpio_buffer_resp gpio_resp_pkt;
  1564. int rc;
  1565. if (copy_from_user(&gpio_resp_pkt,
  1566. (void __user *)arg,
  1567. sizeof(struct epm_get_gpio_buffer_resp)))
  1568. return -EFAULT;
  1569. rc = epm_psoc_get_gpio_buffer_data(epm_adc,
  1570. &gpio_resp_pkt);
  1571. if (rc) {
  1572. pr_err("PSOC get buffer data failed\n");
  1573. return -EINVAL;
  1574. }
  1575. if (copy_to_user((void __user *)arg, &gpio_resp_pkt,
  1576. sizeof(struct epm_get_gpio_buffer_resp)))
  1577. return -EFAULT;
  1578. break;
  1579. }
  1580. case EPM_PSOC_PAUSE_CONVERSION_REQUEST:
  1581. {
  1582. uint32_t result;
  1583. result = epm_psoc_pause_conversion(epm_adc);
  1584. if (copy_to_user((void __user *)arg, &result,
  1585. sizeof(uint32_t)))
  1586. return -EFAULT;
  1587. break;
  1588. }
  1589. case EPM_PSOC_UNPAUSE_CONVERSION_REQUEST:
  1590. {
  1591. uint32_t result;
  1592. result = epm_psoc_unpause_conversion(epm_adc);
  1593. if (copy_to_user((void __user *)arg, &result,
  1594. sizeof(uint32_t)))
  1595. return -EFAULT;
  1596. break;
  1597. }
  1598. default:
  1599. return -EINVAL;
  1600. }
  1601. return 0;
  1602. }
  1603. const struct file_operations epm_adc_fops = {
  1604. .unlocked_ioctl = epm_adc_ioctl,
  1605. };
  1606. static ssize_t epm_adc_psoc_show_in(struct device *dev,
  1607. struct device_attribute *devattr, char *buf)
  1608. {
  1609. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  1610. struct epm_adc_drv *epm_adc = epm_adc_drv;
  1611. struct epm_psoc_init_resp init_resp;
  1612. struct epm_psoc_channel_configure psoc_chan_configure;
  1613. struct epm_psoc_get_data psoc_get_meas;
  1614. int rc = 0;
  1615. rc = epm_adc_psoc_gpio_init(true);
  1616. if (rc) {
  1617. pr_err("GPIO init failed\n");
  1618. return 0;
  1619. }
  1620. usleep_range(EPM_GLOBAL_ENABLE_MIN_DELAY,
  1621. EPM_GLOBAL_ENABLE_MAX_DELAY);
  1622. init_resp.cmd = EPM_PSOC_INIT_CMD;
  1623. rc = epm_psoc_init(epm_adc, &init_resp);
  1624. if (rc) {
  1625. pr_err("PSOC init failed %d\n", rc);
  1626. return 0;
  1627. }
  1628. psoc_chan_configure.channel_num = (1 << attr->index);
  1629. psoc_chan_configure.cmd = EPM_PSOC_CHANNEL_ENABLE_DISABLE_CMD;
  1630. rc = epm_psoc_channel_configure(epm_adc, &psoc_chan_configure);
  1631. if (rc) {
  1632. pr_err("PSOC channel configure failed\n");
  1633. return 0;
  1634. }
  1635. usleep_range(EPM_GLOBAL_ENABLE_MIN_DELAY,
  1636. EPM_GLOBAL_ENABLE_MAX_DELAY);
  1637. psoc_get_meas.cmd = EPM_PSOC_GET_LAST_MEASUREMENT_CMD;
  1638. psoc_get_meas.dev_num = 0;
  1639. psoc_get_meas.chan_num = attr->index;
  1640. rc = epm_psoc_get_data(epm_adc, &psoc_get_meas);
  1641. if (rc) {
  1642. pr_err("PSOC get data failed\n");
  1643. return 0;
  1644. }
  1645. psoc_get_meas.reading_value = epm_psoc_scale_result(
  1646. psoc_get_meas.reading_value,
  1647. attr->index);
  1648. rc = epm_adc_psoc_gpio_init(false);
  1649. if (rc) {
  1650. pr_err("GPIO de-init failed\n");
  1651. return 0;
  1652. }
  1653. return snprintf(buf, 16, "Result: %d\n", psoc_get_meas.reading_value);
  1654. }
  1655. static struct sensor_device_attribute epm_adc_psoc_in_attrs[] = {
  1656. SENSOR_ATTR(psoc0_chan0, S_IRUGO, epm_adc_psoc_show_in, NULL, 0),
  1657. SENSOR_ATTR(psoc0_chan1, S_IRUGO, epm_adc_psoc_show_in, NULL, 1),
  1658. SENSOR_ATTR(psoc0_chan2, S_IRUGO, epm_adc_psoc_show_in, NULL, 2),
  1659. SENSOR_ATTR(psoc0_chan3, S_IRUGO, epm_adc_psoc_show_in, NULL, 3),
  1660. SENSOR_ATTR(psoc0_chan4, S_IRUGO, epm_adc_psoc_show_in, NULL, 4),
  1661. SENSOR_ATTR(psoc0_chan5, S_IRUGO, epm_adc_psoc_show_in, NULL, 5),
  1662. SENSOR_ATTR(psoc0_chan6, S_IRUGO, epm_adc_psoc_show_in, NULL, 6),
  1663. SENSOR_ATTR(psoc0_chan7, S_IRUGO, epm_adc_psoc_show_in, NULL, 7),
  1664. SENSOR_ATTR(psoc0_chan8, S_IRUGO, epm_adc_psoc_show_in, NULL, 8),
  1665. SENSOR_ATTR(psoc0_chan9, S_IRUGO, epm_adc_psoc_show_in, NULL, 9),
  1666. SENSOR_ATTR(psoc0_chan10, S_IRUGO, epm_adc_psoc_show_in, NULL, 10),
  1667. SENSOR_ATTR(psoc0_chan11, S_IRUGO, epm_adc_psoc_show_in, NULL, 11),
  1668. SENSOR_ATTR(psoc0_chan12, S_IRUGO, epm_adc_psoc_show_in, NULL, 12),
  1669. SENSOR_ATTR(psoc0_chan13, S_IRUGO, epm_adc_psoc_show_in, NULL, 13),
  1670. SENSOR_ATTR(psoc0_chan14, S_IRUGO, epm_adc_psoc_show_in, NULL, 14),
  1671. SENSOR_ATTR(psoc0_chan15, S_IRUGO, epm_adc_psoc_show_in, NULL, 15),
  1672. SENSOR_ATTR(psoc0_chan16, S_IRUGO, epm_adc_psoc_show_in, NULL, 16),
  1673. SENSOR_ATTR(psoc0_chan17, S_IRUGO, epm_adc_psoc_show_in, NULL, 17),
  1674. SENSOR_ATTR(psoc0_chan18, S_IRUGO, epm_adc_psoc_show_in, NULL, 18),
  1675. SENSOR_ATTR(psoc0_chan19, S_IRUGO, epm_adc_psoc_show_in, NULL, 19),
  1676. SENSOR_ATTR(psoc0_chan20, S_IRUGO, epm_adc_psoc_show_in, NULL, 20),
  1677. SENSOR_ATTR(psoc0_chan21, S_IRUGO, epm_adc_psoc_show_in, NULL, 21),
  1678. SENSOR_ATTR(psoc0_chan22, S_IRUGO, epm_adc_psoc_show_in, NULL, 22),
  1679. SENSOR_ATTR(psoc0_chan23, S_IRUGO, epm_adc_psoc_show_in, NULL, 23),
  1680. SENSOR_ATTR(psoc0_chan24, S_IRUGO, epm_adc_psoc_show_in, NULL, 24),
  1681. SENSOR_ATTR(psoc0_chan25, S_IRUGO, epm_adc_psoc_show_in, NULL, 25),
  1682. SENSOR_ATTR(psoc0_chan26, S_IRUGO, epm_adc_psoc_show_in, NULL, 26),
  1683. SENSOR_ATTR(psoc0_chan27, S_IRUGO, epm_adc_psoc_show_in, NULL, 27),
  1684. SENSOR_ATTR(psoc0_chan28, S_IRUGO, epm_adc_psoc_show_in, NULL, 28),
  1685. SENSOR_ATTR(psoc0_chan29, S_IRUGO, epm_adc_psoc_show_in, NULL, 29),
  1686. SENSOR_ATTR(psoc0_chan30, S_IRUGO, epm_adc_psoc_show_in, NULL, 30),
  1687. SENSOR_ATTR(psoc0_chan31, S_IRUGO, epm_adc_psoc_show_in, NULL, 31),
  1688. };
  1689. static int __devinit epm_adc_psoc_init_hwmon(struct spi_device *spi,
  1690. struct epm_adc_drv *epm_adc)
  1691. {
  1692. int i, rc, num_chans = 31;
  1693. for (i = 0; i < num_chans; i++) {
  1694. rc = device_create_file(&spi->dev,
  1695. &epm_adc_psoc_in_attrs[i].dev_attr);
  1696. if (rc) {
  1697. dev_err(&spi->dev, "device_create_file failed\n");
  1698. return rc;
  1699. }
  1700. }
  1701. return 0;
  1702. }
  1703. static int get_device_tree_data(struct spi_device *spi)
  1704. {
  1705. const struct device_node *node = spi->dev.of_node;
  1706. struct epm_adc_drv *epm_adc;
  1707. u32 *epm_ch_gain, *epm_ch_rsense;
  1708. u32 rc = 0, epm_num_channels, i, channel_mask;
  1709. if (!node)
  1710. return -EINVAL;
  1711. rc = of_property_read_u32(node,
  1712. "qcom,channels", &epm_num_channels);
  1713. if (rc) {
  1714. dev_err(&spi->dev, "missing channel numbers\n");
  1715. return -ENODEV;
  1716. }
  1717. epm_ch_gain = devm_kzalloc(&spi->dev,
  1718. epm_num_channels * sizeof(u32), GFP_KERNEL);
  1719. if (!epm_ch_gain) {
  1720. dev_err(&spi->dev, "cannot allocate gain\n");
  1721. return -ENOMEM;
  1722. }
  1723. epm_ch_rsense = devm_kzalloc(&spi->dev,
  1724. epm_num_channels * sizeof(u32), GFP_KERNEL);
  1725. if (!epm_ch_rsense) {
  1726. dev_err(&spi->dev, "cannot allocate rsense\n");
  1727. return -ENOMEM;
  1728. }
  1729. rc = of_property_read_u32_array(node,
  1730. "qcom,gain", epm_ch_gain, epm_num_channels);
  1731. if (rc) {
  1732. dev_err(&spi->dev, "invalid gain property:%d\n", rc);
  1733. return rc;
  1734. }
  1735. rc = of_property_read_u32_array(node,
  1736. "qcom,rsense", epm_ch_rsense, epm_num_channels);
  1737. if (rc) {
  1738. dev_err(&spi->dev, "invalid rsense property:%d\n", rc);
  1739. return rc;
  1740. }
  1741. rc = of_property_read_u32(node,
  1742. "qcom,channel-type", &channel_mask);
  1743. if (rc) {
  1744. dev_err(&spi->dev, "missing channel mask\n");
  1745. return -ENODEV;
  1746. }
  1747. epm_adc = devm_kzalloc(&spi->dev,
  1748. sizeof(struct epm_adc_drv) +
  1749. (epm_num_channels *
  1750. sizeof(struct epm_chan_properties)),
  1751. GFP_KERNEL);
  1752. if (!epm_adc) {
  1753. dev_err(&spi->dev, "Unable to allocate memory\n");
  1754. return -ENOMEM;
  1755. }
  1756. for (i = 0; i < epm_num_channels; i++) {
  1757. epm_adc->epm_psoc_ch_prop[i].resistorvalue =
  1758. epm_ch_rsense[i];
  1759. epm_adc->epm_psoc_ch_prop[i].gain =
  1760. epm_ch_gain[i];
  1761. }
  1762. epm_adc->channel_mask = channel_mask;
  1763. epm_adc_drv = epm_adc;
  1764. return 0;
  1765. }
  1766. static int __devinit epm_adc_psoc_spi_probe(struct spi_device *spi)
  1767. {
  1768. struct epm_adc_drv *epm_adc;
  1769. struct device_node *node = spi->dev.of_node;
  1770. int rc = 0;
  1771. if (node) {
  1772. rc = get_device_tree_data(spi);
  1773. if (rc)
  1774. return rc;
  1775. } else {
  1776. epm_adc = epm_adc_drv;
  1777. epm_adc_drv->epm_spi_client = spi;
  1778. epm_adc_drv->epm_spi_client->bits_per_word =
  1779. EPM_ADC_ADS_SPI_BITS_PER_WORD;
  1780. return rc;
  1781. }
  1782. epm_adc = epm_adc_drv;
  1783. epm_adc->misc.name = EPM_ADC_DRIVER_NAME;
  1784. epm_adc->misc.minor = MISC_DYNAMIC_MINOR;
  1785. if (node) {
  1786. epm_adc->misc.fops = &epm_adc_fops;
  1787. if (misc_register(&epm_adc->misc)) {
  1788. pr_err("Unable to register misc device!\n");
  1789. return -EFAULT;
  1790. }
  1791. }
  1792. epm_adc_drv->epm_spi_client = spi;
  1793. epm_adc_drv->epm_spi_client->bits_per_word =
  1794. EPM_ADC_ADS_SPI_BITS_PER_WORD;
  1795. rc = epm_adc_psoc_init_hwmon(spi, epm_adc);
  1796. if (rc) {
  1797. dev_err(&spi->dev, "msm_adc_dev_init failed\n");
  1798. return rc;
  1799. }
  1800. epm_adc->hwmon = hwmon_device_register(&spi->dev);
  1801. if (IS_ERR(epm_adc->hwmon)) {
  1802. dev_err(&spi->dev, "hwmon_device_register failed\n");
  1803. return rc;
  1804. }
  1805. mutex_init(&epm_adc->conv_lock);
  1806. return rc;
  1807. }
  1808. static int __devexit epm_adc_psoc_spi_remove(struct spi_device *spi)
  1809. {
  1810. epm_adc_drv->epm_spi_client = NULL;
  1811. return 0;
  1812. }
  1813. static const struct of_device_id epm_adc_psoc_match_table[] = {
  1814. { .compatible = "cy,epm-adc-cy8c5568lti-114",
  1815. },
  1816. {}
  1817. };
  1818. static struct spi_driver epm_spi_driver = {
  1819. .probe = epm_adc_psoc_spi_probe,
  1820. .remove = __devexit_p(epm_adc_psoc_spi_remove),
  1821. .driver = {
  1822. .name = EPM_ADC_DRIVER_NAME,
  1823. .of_match_table = epm_adc_psoc_match_table,
  1824. },
  1825. };
  1826. static ssize_t epm_adc_show_in(struct device *dev,
  1827. struct device_attribute *devattr, char *buf)
  1828. {
  1829. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  1830. struct epm_adc_drv *epm_adc = dev_get_drvdata(dev);
  1831. struct epm_adc_platform_data *pdata = epm_adc->pdev->dev.platform_data;
  1832. struct epm_chan_request conv;
  1833. int rc = 0;
  1834. conv.device_idx = attr->index / pdata->chan_per_adc;
  1835. conv.channel_idx = attr->index % pdata->chan_per_adc;
  1836. conv.physical = 0;
  1837. if (!epm_adc_expander_register) {
  1838. rc = epm_adc_i2c_expander_register();
  1839. if (rc) {
  1840. pr_err("I2C expander register failed:%d\n", rc);
  1841. return rc;
  1842. }
  1843. epm_adc_expander_register = true;
  1844. }
  1845. rc = epm_adc_hw_init(epm_adc);
  1846. if (rc) {
  1847. pr_err("%s: epm_adc_hw_init() failed, rc = %d",
  1848. __func__, rc);
  1849. return 0;
  1850. }
  1851. rc = epm_adc_blocking_conversion(epm_adc, &conv);
  1852. if (rc) {
  1853. pr_err("%s: epm_adc_blocking_conversion() failed, rc = %d\n",
  1854. __func__, rc);
  1855. return 0;
  1856. }
  1857. rc = epm_adc_hw_deinit(epm_adc);
  1858. if (rc) {
  1859. pr_err("%s: epm_adc_hw_deinit() failed, rc = %d",
  1860. __func__, rc);
  1861. return 0;
  1862. }
  1863. return snprintf(buf, 16, "Result: %d\n", conv.physical);
  1864. }
  1865. static struct sensor_device_attribute epm_adc_in_attrs[] = {
  1866. SENSOR_ATTR(ads0_chan0, S_IRUGO, epm_adc_show_in, NULL, 0),
  1867. SENSOR_ATTR(ads0_chan1, S_IRUGO, epm_adc_show_in, NULL, 1),
  1868. SENSOR_ATTR(ads0_chan2, S_IRUGO, epm_adc_show_in, NULL, 2),
  1869. SENSOR_ATTR(ads0_chan3, S_IRUGO, epm_adc_show_in, NULL, 3),
  1870. SENSOR_ATTR(ads0_chan4, S_IRUGO, epm_adc_show_in, NULL, 4),
  1871. SENSOR_ATTR(ads0_chan5, S_IRUGO, epm_adc_show_in, NULL, 5),
  1872. SENSOR_ATTR(ads0_chan6, S_IRUGO, epm_adc_show_in, NULL, 6),
  1873. SENSOR_ATTR(ads0_chan7, S_IRUGO, epm_adc_show_in, NULL, 7),
  1874. SENSOR_ATTR(ads0_chan8, S_IRUGO, epm_adc_show_in, NULL, 8),
  1875. SENSOR_ATTR(ads0_chan9, S_IRUGO, epm_adc_show_in, NULL, 9),
  1876. SENSOR_ATTR(ads0_chan10, S_IRUGO, epm_adc_show_in, NULL, 10),
  1877. SENSOR_ATTR(ads0_chan11, S_IRUGO, epm_adc_show_in, NULL, 11),
  1878. SENSOR_ATTR(ads0_chan12, S_IRUGO, epm_adc_show_in, NULL, 12),
  1879. SENSOR_ATTR(ads0_chan13, S_IRUGO, epm_adc_show_in, NULL, 13),
  1880. SENSOR_ATTR(ads0_chan14, S_IRUGO, epm_adc_show_in, NULL, 14),
  1881. SENSOR_ATTR(ads0_chan15, S_IRUGO, epm_adc_show_in, NULL, 15),
  1882. SENSOR_ATTR(ads1_chan0, S_IRUGO, epm_adc_show_in, NULL, 16),
  1883. SENSOR_ATTR(ads1_chan1, S_IRUGO, epm_adc_show_in, NULL, 17),
  1884. SENSOR_ATTR(ads1_chan2, S_IRUGO, epm_adc_show_in, NULL, 18),
  1885. SENSOR_ATTR(ads1_chan3, S_IRUGO, epm_adc_show_in, NULL, 19),
  1886. SENSOR_ATTR(ads1_chan4, S_IRUGO, epm_adc_show_in, NULL, 20),
  1887. SENSOR_ATTR(ads1_chan5, S_IRUGO, epm_adc_show_in, NULL, 21),
  1888. SENSOR_ATTR(ads1_chan6, S_IRUGO, epm_adc_show_in, NULL, 22),
  1889. SENSOR_ATTR(ads1_chan7, S_IRUGO, epm_adc_show_in, NULL, 23),
  1890. SENSOR_ATTR(ads1_chan8, S_IRUGO, epm_adc_show_in, NULL, 24),
  1891. SENSOR_ATTR(ads1_chan9, S_IRUGO, epm_adc_show_in, NULL, 25),
  1892. SENSOR_ATTR(ads1_chan10, S_IRUGO, epm_adc_show_in, NULL, 26),
  1893. SENSOR_ATTR(ads1_chan11, S_IRUGO, epm_adc_show_in, NULL, 27),
  1894. SENSOR_ATTR(ads1_chan12, S_IRUGO, epm_adc_show_in, NULL, 28),
  1895. SENSOR_ATTR(ads1_chan13, S_IRUGO, epm_adc_show_in, NULL, 29),
  1896. SENSOR_ATTR(ads1_chan14, S_IRUGO, epm_adc_show_in, NULL, 30),
  1897. SENSOR_ATTR(ads1_chan15, S_IRUGO, epm_adc_show_in, NULL, 31),
  1898. };
  1899. static int __devinit epm_adc_init_hwmon(struct platform_device *pdev,
  1900. struct epm_adc_drv *epm_adc)
  1901. {
  1902. struct epm_adc_platform_data *pdata = pdev->dev.platform_data;
  1903. int i, rc, num_chans = pdata->num_channels;
  1904. for (i = 0; i < num_chans; i++) {
  1905. rc = device_create_file(&pdev->dev,
  1906. &epm_adc_in_attrs[i].dev_attr);
  1907. if (rc) {
  1908. dev_err(&pdev->dev, "device_create_file failed\n");
  1909. return rc;
  1910. }
  1911. }
  1912. return 0;
  1913. }
  1914. static int __devinit epm_adc_probe(struct platform_device *pdev)
  1915. {
  1916. struct epm_adc_drv *epm_adc;
  1917. struct epm_adc_platform_data *pdata = pdev->dev.platform_data;
  1918. int rc = 0;
  1919. if (!pdata) {
  1920. dev_err(&pdev->dev, "no platform data?\n");
  1921. return -EINVAL;
  1922. }
  1923. epm_adc = kzalloc(sizeof(struct epm_adc_drv), GFP_KERNEL);
  1924. if (!epm_adc) {
  1925. dev_err(&pdev->dev, "Unable to allocate memory\n");
  1926. return -ENOMEM;
  1927. }
  1928. platform_set_drvdata(pdev, epm_adc);
  1929. epm_adc_drv = epm_adc;
  1930. epm_adc->pdev = pdev;
  1931. epm_adc->misc.name = EPM_ADC_DRIVER_NAME;
  1932. epm_adc->misc.minor = MISC_DYNAMIC_MINOR;
  1933. epm_adc->misc.fops = &epm_adc_fops;
  1934. if (misc_register(&epm_adc->misc)) {
  1935. dev_err(&pdev->dev, "Unable to register misc device!\n");
  1936. kfree(epm_adc);
  1937. return -EFAULT;
  1938. }
  1939. rc = epm_adc_init_hwmon(pdev, epm_adc);
  1940. if (rc) {
  1941. dev_err(&pdev->dev, "msm_adc_dev_init failed\n");
  1942. misc_deregister(&epm_adc->misc);
  1943. kfree(epm_adc);
  1944. return rc;
  1945. }
  1946. epm_adc->hwmon = hwmon_device_register(&pdev->dev);
  1947. if (IS_ERR(epm_adc->hwmon)) {
  1948. dev_err(&pdev->dev, "hwmon_device_register failed\n");
  1949. misc_deregister(&epm_adc->misc);
  1950. rc = PTR_ERR(epm_adc->hwmon);
  1951. kfree(epm_adc);
  1952. return rc;
  1953. }
  1954. mutex_init(&epm_adc->conv_lock);
  1955. epm_i2c_info = &pdata->epm_i2c_board_info;
  1956. epm_adc->bus_id = pdata->bus_id;
  1957. epm_gpio_expander_base_addr = pdata->gpio_expander_base_addr;
  1958. epm_adc_expander_register = false;
  1959. return rc;
  1960. }
  1961. static int __devexit epm_adc_remove(struct platform_device *pdev)
  1962. {
  1963. struct epm_adc_drv *epm_adc = platform_get_drvdata(pdev);
  1964. struct epm_adc_platform_data *pdata = pdev->dev.platform_data;
  1965. int num_chans = pdata->num_channels;
  1966. int i = 0;
  1967. for (i = 0; i < num_chans; i++)
  1968. device_remove_file(&pdev->dev, &epm_adc_in_attrs[i].dev_attr);
  1969. hwmon_device_unregister(epm_adc->hwmon);
  1970. misc_deregister(&epm_adc->misc);
  1971. epm_adc = NULL;
  1972. return 0;
  1973. }
  1974. static struct platform_driver epm_adc_driver = {
  1975. .probe = epm_adc_probe,
  1976. .remove = __devexit_p(epm_adc_remove),
  1977. .driver = {
  1978. .name = EPM_ADC_DRIVER_NAME,
  1979. .owner = THIS_MODULE,
  1980. },
  1981. };
  1982. static int __init epm_adc_init(void)
  1983. {
  1984. int ret = 0;
  1985. ret = platform_driver_register(&epm_adc_driver);
  1986. if (ret) {
  1987. pr_err("%s: driver register failed, rc=%d\n", __func__, ret);
  1988. return ret;
  1989. }
  1990. ret = spi_register_driver(&epm_spi_driver);
  1991. if (ret)
  1992. pr_err("%s: spi register failed: rc=%d\n", __func__, ret);
  1993. return ret;
  1994. }
  1995. static void __exit epm_adc_exit(void)
  1996. {
  1997. spi_unregister_driver(&epm_spi_driver);
  1998. platform_driver_unregister(&epm_adc_driver);
  1999. }
  2000. module_init(epm_adc_init);
  2001. module_exit(epm_adc_exit);
  2002. MODULE_DESCRIPTION("EPM ADC Driver");
  2003. MODULE_ALIAS("platform:epm_adc");
  2004. MODULE_LICENSE("GPL v2");