cleanup.c 25 KB

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  1. /*
  2. * MTRR (Memory Type Range Register) cleanup
  3. *
  4. * Copyright (C) 2009 Yinghai Lu
  5. *
  6. * This library is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU Library General Public
  8. * License as published by the Free Software Foundation; either
  9. * version 2 of the License, or (at your option) any later version.
  10. *
  11. * This library is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * Library General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU Library General Public
  17. * License along with this library; if not, write to the Free
  18. * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/pci.h>
  23. #include <linux/smp.h>
  24. #include <linux/cpu.h>
  25. #include <linux/mutex.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/kvm_para.h>
  28. #include <linux/range.h>
  29. #include <asm/processor.h>
  30. #include <asm/e820.h>
  31. #include <asm/mtrr.h>
  32. #include <asm/msr.h>
  33. #include "mtrr.h"
  34. struct var_mtrr_range_state {
  35. unsigned long base_pfn;
  36. unsigned long size_pfn;
  37. mtrr_type type;
  38. };
  39. struct var_mtrr_state {
  40. unsigned long range_startk;
  41. unsigned long range_sizek;
  42. unsigned long chunk_sizek;
  43. unsigned long gran_sizek;
  44. unsigned int reg;
  45. };
  46. /* Should be related to MTRR_VAR_RANGES nums */
  47. #define RANGE_NUM 256
  48. static struct range __initdata range[RANGE_NUM];
  49. static int __initdata nr_range;
  50. static struct var_mtrr_range_state __initdata range_state[RANGE_NUM];
  51. static int __initdata debug_print;
  52. #define Dprintk(x...) do { if (debug_print) printk(KERN_DEBUG x); } while (0)
  53. #define BIOS_BUG_MSG KERN_WARNING \
  54. "WARNING: BIOS bug: VAR MTRR %d contains strange UC entry under 1M, check with your system vendor!\n"
  55. static int __init
  56. x86_get_mtrr_mem_range(struct range *range, int nr_range,
  57. unsigned long extra_remove_base,
  58. unsigned long extra_remove_size)
  59. {
  60. unsigned long base, size;
  61. mtrr_type type;
  62. int i;
  63. for (i = 0; i < num_var_ranges; i++) {
  64. type = range_state[i].type;
  65. if (type != MTRR_TYPE_WRBACK)
  66. continue;
  67. base = range_state[i].base_pfn;
  68. size = range_state[i].size_pfn;
  69. nr_range = add_range_with_merge(range, RANGE_NUM, nr_range,
  70. base, base + size);
  71. }
  72. if (debug_print) {
  73. printk(KERN_DEBUG "After WB checking\n");
  74. for (i = 0; i < nr_range; i++)
  75. printk(KERN_DEBUG "MTRR MAP PFN: %016llx - %016llx\n",
  76. range[i].start, range[i].end);
  77. }
  78. /* Take out UC ranges: */
  79. for (i = 0; i < num_var_ranges; i++) {
  80. type = range_state[i].type;
  81. if (type != MTRR_TYPE_UNCACHABLE &&
  82. type != MTRR_TYPE_WRPROT)
  83. continue;
  84. size = range_state[i].size_pfn;
  85. if (!size)
  86. continue;
  87. base = range_state[i].base_pfn;
  88. if (base < (1<<(20-PAGE_SHIFT)) && mtrr_state.have_fixed &&
  89. (mtrr_state.enabled & 1)) {
  90. /* Var MTRR contains UC entry below 1M? Skip it: */
  91. printk(BIOS_BUG_MSG, i);
  92. if (base + size <= (1<<(20-PAGE_SHIFT)))
  93. continue;
  94. size -= (1<<(20-PAGE_SHIFT)) - base;
  95. base = 1<<(20-PAGE_SHIFT);
  96. }
  97. subtract_range(range, RANGE_NUM, base, base + size);
  98. }
  99. if (extra_remove_size)
  100. subtract_range(range, RANGE_NUM, extra_remove_base,
  101. extra_remove_base + extra_remove_size);
  102. if (debug_print) {
  103. printk(KERN_DEBUG "After UC checking\n");
  104. for (i = 0; i < RANGE_NUM; i++) {
  105. if (!range[i].end)
  106. continue;
  107. printk(KERN_DEBUG "MTRR MAP PFN: %016llx - %016llx\n",
  108. range[i].start, range[i].end);
  109. }
  110. }
  111. /* sort the ranges */
  112. nr_range = clean_sort_range(range, RANGE_NUM);
  113. if (debug_print) {
  114. printk(KERN_DEBUG "After sorting\n");
  115. for (i = 0; i < nr_range; i++)
  116. printk(KERN_DEBUG "MTRR MAP PFN: %016llx - %016llx\n",
  117. range[i].start, range[i].end);
  118. }
  119. return nr_range;
  120. }
  121. #ifdef CONFIG_MTRR_SANITIZER
  122. static unsigned long __init sum_ranges(struct range *range, int nr_range)
  123. {
  124. unsigned long sum = 0;
  125. int i;
  126. for (i = 0; i < nr_range; i++)
  127. sum += range[i].end - range[i].start;
  128. return sum;
  129. }
  130. static int enable_mtrr_cleanup __initdata =
  131. CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT;
  132. static int __init disable_mtrr_cleanup_setup(char *str)
  133. {
  134. enable_mtrr_cleanup = 0;
  135. return 0;
  136. }
  137. early_param("disable_mtrr_cleanup", disable_mtrr_cleanup_setup);
  138. static int __init enable_mtrr_cleanup_setup(char *str)
  139. {
  140. enable_mtrr_cleanup = 1;
  141. return 0;
  142. }
  143. early_param("enable_mtrr_cleanup", enable_mtrr_cleanup_setup);
  144. static int __init mtrr_cleanup_debug_setup(char *str)
  145. {
  146. debug_print = 1;
  147. return 0;
  148. }
  149. early_param("mtrr_cleanup_debug", mtrr_cleanup_debug_setup);
  150. static void __init
  151. set_var_mtrr(unsigned int reg, unsigned long basek, unsigned long sizek,
  152. unsigned char type, unsigned int address_bits)
  153. {
  154. u32 base_lo, base_hi, mask_lo, mask_hi;
  155. u64 base, mask;
  156. if (!sizek) {
  157. fill_mtrr_var_range(reg, 0, 0, 0, 0);
  158. return;
  159. }
  160. mask = (1ULL << address_bits) - 1;
  161. mask &= ~((((u64)sizek) << 10) - 1);
  162. base = ((u64)basek) << 10;
  163. base |= type;
  164. mask |= 0x800;
  165. base_lo = base & ((1ULL<<32) - 1);
  166. base_hi = base >> 32;
  167. mask_lo = mask & ((1ULL<<32) - 1);
  168. mask_hi = mask >> 32;
  169. fill_mtrr_var_range(reg, base_lo, base_hi, mask_lo, mask_hi);
  170. }
  171. static void __init
  172. save_var_mtrr(unsigned int reg, unsigned long basek, unsigned long sizek,
  173. unsigned char type)
  174. {
  175. range_state[reg].base_pfn = basek >> (PAGE_SHIFT - 10);
  176. range_state[reg].size_pfn = sizek >> (PAGE_SHIFT - 10);
  177. range_state[reg].type = type;
  178. }
  179. static void __init set_var_mtrr_all(unsigned int address_bits)
  180. {
  181. unsigned long basek, sizek;
  182. unsigned char type;
  183. unsigned int reg;
  184. for (reg = 0; reg < num_var_ranges; reg++) {
  185. basek = range_state[reg].base_pfn << (PAGE_SHIFT - 10);
  186. sizek = range_state[reg].size_pfn << (PAGE_SHIFT - 10);
  187. type = range_state[reg].type;
  188. set_var_mtrr(reg, basek, sizek, type, address_bits);
  189. }
  190. }
  191. static unsigned long to_size_factor(unsigned long sizek, char *factorp)
  192. {
  193. unsigned long base = sizek;
  194. char factor;
  195. if (base & ((1<<10) - 1)) {
  196. /* Not MB-aligned: */
  197. factor = 'K';
  198. } else if (base & ((1<<20) - 1)) {
  199. factor = 'M';
  200. base >>= 10;
  201. } else {
  202. factor = 'G';
  203. base >>= 20;
  204. }
  205. *factorp = factor;
  206. return base;
  207. }
  208. static unsigned int __init
  209. range_to_mtrr(unsigned int reg, unsigned long range_startk,
  210. unsigned long range_sizek, unsigned char type)
  211. {
  212. if (!range_sizek || (reg >= num_var_ranges))
  213. return reg;
  214. while (range_sizek) {
  215. unsigned long max_align, align;
  216. unsigned long sizek;
  217. /* Compute the maximum size with which we can make a range: */
  218. if (range_startk)
  219. max_align = ffs(range_startk) - 1;
  220. else
  221. max_align = 32;
  222. align = fls(range_sizek) - 1;
  223. if (align > max_align)
  224. align = max_align;
  225. sizek = 1 << align;
  226. if (debug_print) {
  227. char start_factor = 'K', size_factor = 'K';
  228. unsigned long start_base, size_base;
  229. start_base = to_size_factor(range_startk, &start_factor);
  230. size_base = to_size_factor(sizek, &size_factor);
  231. Dprintk("Setting variable MTRR %d, "
  232. "base: %ld%cB, range: %ld%cB, type %s\n",
  233. reg, start_base, start_factor,
  234. size_base, size_factor,
  235. (type == MTRR_TYPE_UNCACHABLE) ? "UC" :
  236. ((type == MTRR_TYPE_WRBACK) ? "WB" : "Other")
  237. );
  238. }
  239. save_var_mtrr(reg++, range_startk, sizek, type);
  240. range_startk += sizek;
  241. range_sizek -= sizek;
  242. if (reg >= num_var_ranges)
  243. break;
  244. }
  245. return reg;
  246. }
  247. static unsigned __init
  248. range_to_mtrr_with_hole(struct var_mtrr_state *state, unsigned long basek,
  249. unsigned long sizek)
  250. {
  251. unsigned long hole_basek, hole_sizek;
  252. unsigned long second_basek, second_sizek;
  253. unsigned long range0_basek, range0_sizek;
  254. unsigned long range_basek, range_sizek;
  255. unsigned long chunk_sizek;
  256. unsigned long gran_sizek;
  257. hole_basek = 0;
  258. hole_sizek = 0;
  259. second_basek = 0;
  260. second_sizek = 0;
  261. chunk_sizek = state->chunk_sizek;
  262. gran_sizek = state->gran_sizek;
  263. /* Align with gran size, prevent small block used up MTRRs: */
  264. range_basek = ALIGN(state->range_startk, gran_sizek);
  265. if ((range_basek > basek) && basek)
  266. return second_sizek;
  267. state->range_sizek -= (range_basek - state->range_startk);
  268. range_sizek = ALIGN(state->range_sizek, gran_sizek);
  269. while (range_sizek > state->range_sizek) {
  270. range_sizek -= gran_sizek;
  271. if (!range_sizek)
  272. return 0;
  273. }
  274. state->range_sizek = range_sizek;
  275. /* Try to append some small hole: */
  276. range0_basek = state->range_startk;
  277. range0_sizek = ALIGN(state->range_sizek, chunk_sizek);
  278. /* No increase: */
  279. if (range0_sizek == state->range_sizek) {
  280. Dprintk("rangeX: %016lx - %016lx\n",
  281. range0_basek<<10,
  282. (range0_basek + state->range_sizek)<<10);
  283. state->reg = range_to_mtrr(state->reg, range0_basek,
  284. state->range_sizek, MTRR_TYPE_WRBACK);
  285. return 0;
  286. }
  287. /* Only cut back when it is not the last: */
  288. if (sizek) {
  289. while (range0_basek + range0_sizek > (basek + sizek)) {
  290. if (range0_sizek >= chunk_sizek)
  291. range0_sizek -= chunk_sizek;
  292. else
  293. range0_sizek = 0;
  294. if (!range0_sizek)
  295. break;
  296. }
  297. }
  298. second_try:
  299. range_basek = range0_basek + range0_sizek;
  300. /* One hole in the middle: */
  301. if (range_basek > basek && range_basek <= (basek + sizek))
  302. second_sizek = range_basek - basek;
  303. if (range0_sizek > state->range_sizek) {
  304. /* One hole in middle or at the end: */
  305. hole_sizek = range0_sizek - state->range_sizek - second_sizek;
  306. /* Hole size should be less than half of range0 size: */
  307. if (hole_sizek >= (range0_sizek >> 1) &&
  308. range0_sizek >= chunk_sizek) {
  309. range0_sizek -= chunk_sizek;
  310. second_sizek = 0;
  311. hole_sizek = 0;
  312. goto second_try;
  313. }
  314. }
  315. if (range0_sizek) {
  316. Dprintk("range0: %016lx - %016lx\n",
  317. range0_basek<<10,
  318. (range0_basek + range0_sizek)<<10);
  319. state->reg = range_to_mtrr(state->reg, range0_basek,
  320. range0_sizek, MTRR_TYPE_WRBACK);
  321. }
  322. if (range0_sizek < state->range_sizek) {
  323. /* Need to handle left over range: */
  324. range_sizek = state->range_sizek - range0_sizek;
  325. Dprintk("range: %016lx - %016lx\n",
  326. range_basek<<10,
  327. (range_basek + range_sizek)<<10);
  328. state->reg = range_to_mtrr(state->reg, range_basek,
  329. range_sizek, MTRR_TYPE_WRBACK);
  330. }
  331. if (hole_sizek) {
  332. hole_basek = range_basek - hole_sizek - second_sizek;
  333. Dprintk("hole: %016lx - %016lx\n",
  334. hole_basek<<10,
  335. (hole_basek + hole_sizek)<<10);
  336. state->reg = range_to_mtrr(state->reg, hole_basek,
  337. hole_sizek, MTRR_TYPE_UNCACHABLE);
  338. }
  339. return second_sizek;
  340. }
  341. static void __init
  342. set_var_mtrr_range(struct var_mtrr_state *state, unsigned long base_pfn,
  343. unsigned long size_pfn)
  344. {
  345. unsigned long basek, sizek;
  346. unsigned long second_sizek = 0;
  347. if (state->reg >= num_var_ranges)
  348. return;
  349. basek = base_pfn << (PAGE_SHIFT - 10);
  350. sizek = size_pfn << (PAGE_SHIFT - 10);
  351. /* See if I can merge with the last range: */
  352. if ((basek <= 1024) ||
  353. (state->range_startk + state->range_sizek == basek)) {
  354. unsigned long endk = basek + sizek;
  355. state->range_sizek = endk - state->range_startk;
  356. return;
  357. }
  358. /* Write the range mtrrs: */
  359. if (state->range_sizek != 0)
  360. second_sizek = range_to_mtrr_with_hole(state, basek, sizek);
  361. /* Allocate an msr: */
  362. state->range_startk = basek + second_sizek;
  363. state->range_sizek = sizek - second_sizek;
  364. }
  365. /* Mininum size of mtrr block that can take hole: */
  366. static u64 mtrr_chunk_size __initdata = (256ULL<<20);
  367. static int __init parse_mtrr_chunk_size_opt(char *p)
  368. {
  369. if (!p)
  370. return -EINVAL;
  371. mtrr_chunk_size = memparse(p, &p);
  372. return 0;
  373. }
  374. early_param("mtrr_chunk_size", parse_mtrr_chunk_size_opt);
  375. /* Granularity of mtrr of block: */
  376. static u64 mtrr_gran_size __initdata;
  377. static int __init parse_mtrr_gran_size_opt(char *p)
  378. {
  379. if (!p)
  380. return -EINVAL;
  381. mtrr_gran_size = memparse(p, &p);
  382. return 0;
  383. }
  384. early_param("mtrr_gran_size", parse_mtrr_gran_size_opt);
  385. static unsigned long nr_mtrr_spare_reg __initdata =
  386. CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT;
  387. static int __init parse_mtrr_spare_reg(char *arg)
  388. {
  389. if (arg)
  390. nr_mtrr_spare_reg = simple_strtoul(arg, NULL, 0);
  391. return 0;
  392. }
  393. early_param("mtrr_spare_reg_nr", parse_mtrr_spare_reg);
  394. static int __init
  395. x86_setup_var_mtrrs(struct range *range, int nr_range,
  396. u64 chunk_size, u64 gran_size)
  397. {
  398. struct var_mtrr_state var_state;
  399. int num_reg;
  400. int i;
  401. var_state.range_startk = 0;
  402. var_state.range_sizek = 0;
  403. var_state.reg = 0;
  404. var_state.chunk_sizek = chunk_size >> 10;
  405. var_state.gran_sizek = gran_size >> 10;
  406. memset(range_state, 0, sizeof(range_state));
  407. /* Write the range: */
  408. for (i = 0; i < nr_range; i++) {
  409. set_var_mtrr_range(&var_state, range[i].start,
  410. range[i].end - range[i].start);
  411. }
  412. /* Write the last range: */
  413. if (var_state.range_sizek != 0)
  414. range_to_mtrr_with_hole(&var_state, 0, 0);
  415. num_reg = var_state.reg;
  416. /* Clear out the extra MTRR's: */
  417. while (var_state.reg < num_var_ranges) {
  418. save_var_mtrr(var_state.reg, 0, 0, 0);
  419. var_state.reg++;
  420. }
  421. return num_reg;
  422. }
  423. struct mtrr_cleanup_result {
  424. unsigned long gran_sizek;
  425. unsigned long chunk_sizek;
  426. unsigned long lose_cover_sizek;
  427. unsigned int num_reg;
  428. int bad;
  429. };
  430. /*
  431. * gran_size: 64K, 128K, 256K, 512K, 1M, 2M, ..., 2G
  432. * chunk size: gran_size, ..., 2G
  433. * so we need (1+16)*8
  434. */
  435. #define NUM_RESULT 136
  436. #define PSHIFT (PAGE_SHIFT - 10)
  437. static struct mtrr_cleanup_result __initdata result[NUM_RESULT];
  438. static unsigned long __initdata min_loss_pfn[RANGE_NUM];
  439. static void __init print_out_mtrr_range_state(void)
  440. {
  441. char start_factor = 'K', size_factor = 'K';
  442. unsigned long start_base, size_base;
  443. mtrr_type type;
  444. int i;
  445. for (i = 0; i < num_var_ranges; i++) {
  446. size_base = range_state[i].size_pfn << (PAGE_SHIFT - 10);
  447. if (!size_base)
  448. continue;
  449. size_base = to_size_factor(size_base, &size_factor),
  450. start_base = range_state[i].base_pfn << (PAGE_SHIFT - 10);
  451. start_base = to_size_factor(start_base, &start_factor),
  452. type = range_state[i].type;
  453. printk(KERN_DEBUG "reg %d, base: %ld%cB, range: %ld%cB, type %s\n",
  454. i, start_base, start_factor,
  455. size_base, size_factor,
  456. (type == MTRR_TYPE_UNCACHABLE) ? "UC" :
  457. ((type == MTRR_TYPE_WRPROT) ? "WP" :
  458. ((type == MTRR_TYPE_WRBACK) ? "WB" : "Other"))
  459. );
  460. }
  461. }
  462. static int __init mtrr_need_cleanup(void)
  463. {
  464. int i;
  465. mtrr_type type;
  466. unsigned long size;
  467. /* Extra one for all 0: */
  468. int num[MTRR_NUM_TYPES + 1];
  469. /* Check entries number: */
  470. memset(num, 0, sizeof(num));
  471. for (i = 0; i < num_var_ranges; i++) {
  472. type = range_state[i].type;
  473. size = range_state[i].size_pfn;
  474. if (type >= MTRR_NUM_TYPES)
  475. continue;
  476. if (!size)
  477. type = MTRR_NUM_TYPES;
  478. num[type]++;
  479. }
  480. /* Check if we got UC entries: */
  481. if (!num[MTRR_TYPE_UNCACHABLE])
  482. return 0;
  483. /* Check if we only had WB and UC */
  484. if (num[MTRR_TYPE_WRBACK] + num[MTRR_TYPE_UNCACHABLE] !=
  485. num_var_ranges - num[MTRR_NUM_TYPES])
  486. return 0;
  487. return 1;
  488. }
  489. static unsigned long __initdata range_sums;
  490. static void __init
  491. mtrr_calc_range_state(u64 chunk_size, u64 gran_size,
  492. unsigned long x_remove_base,
  493. unsigned long x_remove_size, int i)
  494. {
  495. static struct range range_new[RANGE_NUM];
  496. unsigned long range_sums_new;
  497. static int nr_range_new;
  498. int num_reg;
  499. /* Convert ranges to var ranges state: */
  500. num_reg = x86_setup_var_mtrrs(range, nr_range, chunk_size, gran_size);
  501. /* We got new setting in range_state, check it: */
  502. memset(range_new, 0, sizeof(range_new));
  503. nr_range_new = x86_get_mtrr_mem_range(range_new, 0,
  504. x_remove_base, x_remove_size);
  505. range_sums_new = sum_ranges(range_new, nr_range_new);
  506. result[i].chunk_sizek = chunk_size >> 10;
  507. result[i].gran_sizek = gran_size >> 10;
  508. result[i].num_reg = num_reg;
  509. if (range_sums < range_sums_new) {
  510. result[i].lose_cover_sizek = (range_sums_new - range_sums) << PSHIFT;
  511. result[i].bad = 1;
  512. } else {
  513. result[i].lose_cover_sizek = (range_sums - range_sums_new) << PSHIFT;
  514. }
  515. /* Double check it: */
  516. if (!result[i].bad && !result[i].lose_cover_sizek) {
  517. if (nr_range_new != nr_range || memcmp(range, range_new, sizeof(range)))
  518. result[i].bad = 1;
  519. }
  520. if (!result[i].bad && (range_sums - range_sums_new < min_loss_pfn[num_reg]))
  521. min_loss_pfn[num_reg] = range_sums - range_sums_new;
  522. }
  523. static void __init mtrr_print_out_one_result(int i)
  524. {
  525. unsigned long gran_base, chunk_base, lose_base;
  526. char gran_factor, chunk_factor, lose_factor;
  527. gran_base = to_size_factor(result[i].gran_sizek, &gran_factor);
  528. chunk_base = to_size_factor(result[i].chunk_sizek, &chunk_factor);
  529. lose_base = to_size_factor(result[i].lose_cover_sizek, &lose_factor);
  530. pr_info("%sgran_size: %ld%c \tchunk_size: %ld%c \t",
  531. result[i].bad ? "*BAD*" : " ",
  532. gran_base, gran_factor, chunk_base, chunk_factor);
  533. pr_cont("num_reg: %d \tlose cover RAM: %s%ld%c\n",
  534. result[i].num_reg, result[i].bad ? "-" : "",
  535. lose_base, lose_factor);
  536. }
  537. static int __init mtrr_search_optimal_index(void)
  538. {
  539. int num_reg_good;
  540. int index_good;
  541. int i;
  542. if (nr_mtrr_spare_reg >= num_var_ranges)
  543. nr_mtrr_spare_reg = num_var_ranges - 1;
  544. num_reg_good = -1;
  545. for (i = num_var_ranges - nr_mtrr_spare_reg; i > 0; i--) {
  546. if (!min_loss_pfn[i])
  547. num_reg_good = i;
  548. }
  549. index_good = -1;
  550. if (num_reg_good != -1) {
  551. for (i = 0; i < NUM_RESULT; i++) {
  552. if (!result[i].bad &&
  553. result[i].num_reg == num_reg_good &&
  554. !result[i].lose_cover_sizek) {
  555. index_good = i;
  556. break;
  557. }
  558. }
  559. }
  560. return index_good;
  561. }
  562. int __init mtrr_cleanup(unsigned address_bits)
  563. {
  564. unsigned long x_remove_base, x_remove_size;
  565. unsigned long base, size, def, dummy;
  566. u64 chunk_size, gran_size;
  567. mtrr_type type;
  568. int index_good;
  569. int i;
  570. if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1)
  571. return 0;
  572. rdmsr(MSR_MTRRdefType, def, dummy);
  573. def &= 0xff;
  574. if (def != MTRR_TYPE_UNCACHABLE)
  575. return 0;
  576. /* Get it and store it aside: */
  577. memset(range_state, 0, sizeof(range_state));
  578. for (i = 0; i < num_var_ranges; i++) {
  579. mtrr_if->get(i, &base, &size, &type);
  580. range_state[i].base_pfn = base;
  581. range_state[i].size_pfn = size;
  582. range_state[i].type = type;
  583. }
  584. /* Check if we need handle it and can handle it: */
  585. if (!mtrr_need_cleanup())
  586. return 0;
  587. /* Print original var MTRRs at first, for debugging: */
  588. printk(KERN_DEBUG "original variable MTRRs\n");
  589. print_out_mtrr_range_state();
  590. memset(range, 0, sizeof(range));
  591. x_remove_size = 0;
  592. x_remove_base = 1 << (32 - PAGE_SHIFT);
  593. if (mtrr_tom2)
  594. x_remove_size = (mtrr_tom2 >> PAGE_SHIFT) - x_remove_base;
  595. nr_range = x86_get_mtrr_mem_range(range, 0, x_remove_base, x_remove_size);
  596. /*
  597. * [0, 1M) should always be covered by var mtrr with WB
  598. * and fixed mtrrs should take effect before var mtrr for it:
  599. */
  600. nr_range = add_range_with_merge(range, RANGE_NUM, nr_range, 0,
  601. 1ULL<<(20 - PAGE_SHIFT));
  602. /* Sort the ranges: */
  603. sort_range(range, nr_range);
  604. range_sums = sum_ranges(range, nr_range);
  605. printk(KERN_INFO "total RAM covered: %ldM\n",
  606. range_sums >> (20 - PAGE_SHIFT));
  607. if (mtrr_chunk_size && mtrr_gran_size) {
  608. i = 0;
  609. mtrr_calc_range_state(mtrr_chunk_size, mtrr_gran_size,
  610. x_remove_base, x_remove_size, i);
  611. mtrr_print_out_one_result(i);
  612. if (!result[i].bad) {
  613. set_var_mtrr_all(address_bits);
  614. printk(KERN_DEBUG "New variable MTRRs\n");
  615. print_out_mtrr_range_state();
  616. return 1;
  617. }
  618. printk(KERN_INFO "invalid mtrr_gran_size or mtrr_chunk_size, "
  619. "will find optimal one\n");
  620. }
  621. i = 0;
  622. memset(min_loss_pfn, 0xff, sizeof(min_loss_pfn));
  623. memset(result, 0, sizeof(result));
  624. for (gran_size = (1ULL<<16); gran_size < (1ULL<<32); gran_size <<= 1) {
  625. for (chunk_size = gran_size; chunk_size < (1ULL<<32);
  626. chunk_size <<= 1) {
  627. if (i >= NUM_RESULT)
  628. continue;
  629. mtrr_calc_range_state(chunk_size, gran_size,
  630. x_remove_base, x_remove_size, i);
  631. if (debug_print) {
  632. mtrr_print_out_one_result(i);
  633. printk(KERN_INFO "\n");
  634. }
  635. i++;
  636. }
  637. }
  638. /* Try to find the optimal index: */
  639. index_good = mtrr_search_optimal_index();
  640. if (index_good != -1) {
  641. printk(KERN_INFO "Found optimal setting for mtrr clean up\n");
  642. i = index_good;
  643. mtrr_print_out_one_result(i);
  644. /* Convert ranges to var ranges state: */
  645. chunk_size = result[i].chunk_sizek;
  646. chunk_size <<= 10;
  647. gran_size = result[i].gran_sizek;
  648. gran_size <<= 10;
  649. x86_setup_var_mtrrs(range, nr_range, chunk_size, gran_size);
  650. set_var_mtrr_all(address_bits);
  651. printk(KERN_DEBUG "New variable MTRRs\n");
  652. print_out_mtrr_range_state();
  653. return 1;
  654. } else {
  655. /* print out all */
  656. for (i = 0; i < NUM_RESULT; i++)
  657. mtrr_print_out_one_result(i);
  658. }
  659. printk(KERN_INFO "mtrr_cleanup: can not find optimal value\n");
  660. printk(KERN_INFO "please specify mtrr_gran_size/mtrr_chunk_size\n");
  661. return 0;
  662. }
  663. #else
  664. int __init mtrr_cleanup(unsigned address_bits)
  665. {
  666. return 0;
  667. }
  668. #endif
  669. static int disable_mtrr_trim;
  670. static int __init disable_mtrr_trim_setup(char *str)
  671. {
  672. disable_mtrr_trim = 1;
  673. return 0;
  674. }
  675. early_param("disable_mtrr_trim", disable_mtrr_trim_setup);
  676. /*
  677. * Newer AMD K8s and later CPUs have a special magic MSR way to force WB
  678. * for memory >4GB. Check for that here.
  679. * Note this won't check if the MTRRs < 4GB where the magic bit doesn't
  680. * apply to are wrong, but so far we don't know of any such case in the wild.
  681. */
  682. #define Tom2Enabled (1U << 21)
  683. #define Tom2ForceMemTypeWB (1U << 22)
  684. int __init amd_special_default_mtrr(void)
  685. {
  686. u32 l, h;
  687. if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
  688. return 0;
  689. if (boot_cpu_data.x86 < 0xf)
  690. return 0;
  691. /* In case some hypervisor doesn't pass SYSCFG through: */
  692. if (rdmsr_safe(MSR_K8_SYSCFG, &l, &h) < 0)
  693. return 0;
  694. /*
  695. * Memory between 4GB and top of mem is forced WB by this magic bit.
  696. * Reserved before K8RevF, but should be zero there.
  697. */
  698. if ((l & (Tom2Enabled | Tom2ForceMemTypeWB)) ==
  699. (Tom2Enabled | Tom2ForceMemTypeWB))
  700. return 1;
  701. return 0;
  702. }
  703. static u64 __init
  704. real_trim_memory(unsigned long start_pfn, unsigned long limit_pfn)
  705. {
  706. u64 trim_start, trim_size;
  707. trim_start = start_pfn;
  708. trim_start <<= PAGE_SHIFT;
  709. trim_size = limit_pfn;
  710. trim_size <<= PAGE_SHIFT;
  711. trim_size -= trim_start;
  712. return e820_update_range(trim_start, trim_size, E820_RAM, E820_RESERVED);
  713. }
  714. /**
  715. * mtrr_trim_uncached_memory - trim RAM not covered by MTRRs
  716. * @end_pfn: ending page frame number
  717. *
  718. * Some buggy BIOSes don't setup the MTRRs properly for systems with certain
  719. * memory configurations. This routine checks that the highest MTRR matches
  720. * the end of memory, to make sure the MTRRs having a write back type cover
  721. * all of the memory the kernel is intending to use. If not, it'll trim any
  722. * memory off the end by adjusting end_pfn, removing it from the kernel's
  723. * allocation pools, warning the user with an obnoxious message.
  724. */
  725. int __init mtrr_trim_uncached_memory(unsigned long end_pfn)
  726. {
  727. unsigned long i, base, size, highest_pfn = 0, def, dummy;
  728. mtrr_type type;
  729. u64 total_trim_size;
  730. /* extra one for all 0 */
  731. int num[MTRR_NUM_TYPES + 1];
  732. /*
  733. * Make sure we only trim uncachable memory on machines that
  734. * support the Intel MTRR architecture:
  735. */
  736. if (!is_cpu(INTEL) || disable_mtrr_trim)
  737. return 0;
  738. rdmsr(MSR_MTRRdefType, def, dummy);
  739. def &= 0xff;
  740. if (def != MTRR_TYPE_UNCACHABLE)
  741. return 0;
  742. /* Get it and store it aside: */
  743. memset(range_state, 0, sizeof(range_state));
  744. for (i = 0; i < num_var_ranges; i++) {
  745. mtrr_if->get(i, &base, &size, &type);
  746. range_state[i].base_pfn = base;
  747. range_state[i].size_pfn = size;
  748. range_state[i].type = type;
  749. }
  750. /* Find highest cached pfn: */
  751. for (i = 0; i < num_var_ranges; i++) {
  752. type = range_state[i].type;
  753. if (type != MTRR_TYPE_WRBACK)
  754. continue;
  755. base = range_state[i].base_pfn;
  756. size = range_state[i].size_pfn;
  757. if (highest_pfn < base + size)
  758. highest_pfn = base + size;
  759. }
  760. /* kvm/qemu doesn't have mtrr set right, don't trim them all: */
  761. if (!highest_pfn) {
  762. printk(KERN_INFO "CPU MTRRs all blank - virtualized system.\n");
  763. return 0;
  764. }
  765. /* Check entries number: */
  766. memset(num, 0, sizeof(num));
  767. for (i = 0; i < num_var_ranges; i++) {
  768. type = range_state[i].type;
  769. if (type >= MTRR_NUM_TYPES)
  770. continue;
  771. size = range_state[i].size_pfn;
  772. if (!size)
  773. type = MTRR_NUM_TYPES;
  774. num[type]++;
  775. }
  776. /* No entry for WB? */
  777. if (!num[MTRR_TYPE_WRBACK])
  778. return 0;
  779. /* Check if we only had WB and UC: */
  780. if (num[MTRR_TYPE_WRBACK] + num[MTRR_TYPE_UNCACHABLE] !=
  781. num_var_ranges - num[MTRR_NUM_TYPES])
  782. return 0;
  783. memset(range, 0, sizeof(range));
  784. nr_range = 0;
  785. if (mtrr_tom2) {
  786. range[nr_range].start = (1ULL<<(32 - PAGE_SHIFT));
  787. range[nr_range].end = mtrr_tom2 >> PAGE_SHIFT;
  788. if (highest_pfn < range[nr_range].end)
  789. highest_pfn = range[nr_range].end;
  790. nr_range++;
  791. }
  792. nr_range = x86_get_mtrr_mem_range(range, nr_range, 0, 0);
  793. /* Check the head: */
  794. total_trim_size = 0;
  795. if (range[0].start)
  796. total_trim_size += real_trim_memory(0, range[0].start);
  797. /* Check the holes: */
  798. for (i = 0; i < nr_range - 1; i++) {
  799. if (range[i].end < range[i+1].start)
  800. total_trim_size += real_trim_memory(range[i].end,
  801. range[i+1].start);
  802. }
  803. /* Check the top: */
  804. i = nr_range - 1;
  805. if (range[i].end < end_pfn)
  806. total_trim_size += real_trim_memory(range[i].end,
  807. end_pfn);
  808. if (total_trim_size) {
  809. pr_warning("WARNING: BIOS bug: CPU MTRRs don't cover all of memory, losing %lluMB of RAM.\n", total_trim_size >> 20);
  810. if (!changed_by_mtrr_cleanup)
  811. WARN_ON(1);
  812. pr_info("update e820 for mtrr\n");
  813. update_e820();
  814. return 1;
  815. }
  816. return 0;
  817. }