mc146818rtc.h 2.8 KB

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  1. /*
  2. * Machine dependent access functions for RTC registers.
  3. */
  4. #ifndef _ASM_X86_MC146818RTC_H
  5. #define _ASM_X86_MC146818RTC_H
  6. #include <asm/io.h>
  7. #include <asm/processor.h>
  8. #include <linux/mc146818rtc.h>
  9. #ifndef RTC_PORT
  10. #define RTC_PORT(x) (0x70 + (x))
  11. #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
  12. #endif
  13. #if defined(CONFIG_X86_32) && defined(__HAVE_ARCH_CMPXCHG)
  14. /*
  15. * This lock provides nmi access to the CMOS/RTC registers. It has some
  16. * special properties. It is owned by a CPU and stores the index register
  17. * currently being accessed (if owned). The idea here is that it works
  18. * like a normal lock (normally). However, in an NMI, the NMI code will
  19. * first check to see if its CPU owns the lock, meaning that the NMI
  20. * interrupted during the read/write of the device. If it does, it goes ahead
  21. * and performs the access and then restores the index register. If it does
  22. * not, it locks normally.
  23. *
  24. * Note that since we are working with NMIs, we need this lock even in
  25. * a non-SMP machine just to mark that the lock is owned.
  26. *
  27. * This only works with compare-and-swap. There is no other way to
  28. * atomically claim the lock and set the owner.
  29. */
  30. #include <linux/smp.h>
  31. extern volatile unsigned long cmos_lock;
  32. /*
  33. * All of these below must be called with interrupts off, preempt
  34. * disabled, etc.
  35. */
  36. static inline void lock_cmos(unsigned char reg)
  37. {
  38. unsigned long new;
  39. new = ((smp_processor_id() + 1) << 8) | reg;
  40. for (;;) {
  41. if (cmos_lock) {
  42. cpu_relax();
  43. continue;
  44. }
  45. if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
  46. return;
  47. }
  48. }
  49. static inline void unlock_cmos(void)
  50. {
  51. cmos_lock = 0;
  52. }
  53. static inline int do_i_have_lock_cmos(void)
  54. {
  55. return (cmos_lock >> 8) == (smp_processor_id() + 1);
  56. }
  57. static inline unsigned char current_lock_cmos_reg(void)
  58. {
  59. return cmos_lock & 0xff;
  60. }
  61. #define lock_cmos_prefix(reg) \
  62. do { \
  63. unsigned long cmos_flags; \
  64. local_irq_save(cmos_flags); \
  65. lock_cmos(reg)
  66. #define lock_cmos_suffix(reg) \
  67. unlock_cmos(); \
  68. local_irq_restore(cmos_flags); \
  69. } while (0)
  70. #else
  71. #define lock_cmos_prefix(reg) do {} while (0)
  72. #define lock_cmos_suffix(reg) do {} while (0)
  73. #define lock_cmos(reg) do { } while (0)
  74. #define unlock_cmos() do { } while (0)
  75. #define do_i_have_lock_cmos() 0
  76. #define current_lock_cmos_reg() 0
  77. #endif
  78. /*
  79. * The yet supported machines all access the RTC index register via
  80. * an ISA port access but the way to access the date register differs ...
  81. */
  82. #define CMOS_READ(addr) rtc_cmos_read(addr)
  83. #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
  84. unsigned char rtc_cmos_read(unsigned char addr);
  85. void rtc_cmos_write(unsigned char val, unsigned char addr);
  86. extern int mach_set_rtc_mmss(unsigned long nowtime);
  87. extern unsigned long mach_get_cmos_time(void);
  88. #define RTC_IRQ 8
  89. #endif /* _ASM_X86_MC146818RTC_H */