mach_timer.h 1.5 KB

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  1. /*
  2. * Machine specific calibrate_tsc() for generic.
  3. * Split out from timer_tsc.c by Osamu Tomita <tomita@cinet.co.jp>
  4. */
  5. /* ------ Calibrate the TSC -------
  6. * Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset().
  7. * Too much 64-bit arithmetic here to do this cleanly in C, and for
  8. * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2)
  9. * output busy loop as low as possible. We avoid reading the CTC registers
  10. * directly because of the awkward 8-bit access mechanism of the 82C54
  11. * device.
  12. */
  13. #ifndef _ASM_X86_MACH_DEFAULT_MACH_TIMER_H
  14. #define _ASM_X86_MACH_DEFAULT_MACH_TIMER_H
  15. #define CALIBRATE_TIME_MSEC 30 /* 30 msecs */
  16. #define CALIBRATE_LATCH \
  17. ((PIT_TICK_RATE * CALIBRATE_TIME_MSEC + 1000/2)/1000)
  18. static inline void mach_prepare_counter(void)
  19. {
  20. /* Set the Gate high, disable speaker */
  21. outb((inb(0x61) & ~0x02) | 0x01, 0x61);
  22. /*
  23. * Now let's take care of CTC channel 2
  24. *
  25. * Set the Gate high, program CTC channel 2 for mode 0,
  26. * (interrupt on terminal count mode), binary count,
  27. * load 5 * LATCH count, (LSB and MSB) to begin countdown.
  28. *
  29. * Some devices need a delay here.
  30. */
  31. outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */
  32. outb_p(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */
  33. outb_p(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */
  34. }
  35. static inline void mach_countup(unsigned long *count_p)
  36. {
  37. unsigned long count = 0;
  38. do {
  39. count++;
  40. } while ((inb_p(0x61) & 0x20) == 0);
  41. *count_p = count;
  42. }
  43. #endif /* _ASM_X86_MACH_DEFAULT_MACH_TIMER_H */