setup.c 16 KB

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  1. /*
  2. * Renesas - AP-325RXA
  3. * (Compatible with Algo System ., LTD. - AP-320A)
  4. *
  5. * Copyright (C) 2008 Renesas Solutions Corp.
  6. * Author : Yusuke Goda <goda.yuske@renesas.com>
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/mmc/host.h>
  17. #include <linux/mmc/sh_mobile_sdhi.h>
  18. #include <linux/mtd/physmap.h>
  19. #include <linux/mtd/sh_flctl.h>
  20. #include <linux/delay.h>
  21. #include <linux/i2c.h>
  22. #include <linux/smsc911x.h>
  23. #include <linux/gpio.h>
  24. #include <linux/videodev2.h>
  25. #include <media/ov772x.h>
  26. #include <media/soc_camera.h>
  27. #include <media/soc_camera_platform.h>
  28. #include <media/sh_mobile_ceu.h>
  29. #include <video/sh_mobile_lcdc.h>
  30. #include <asm/io.h>
  31. #include <asm/clock.h>
  32. #include <asm/suspend.h>
  33. #include <cpu/sh7723.h>
  34. static struct smsc911x_platform_config smsc911x_config = {
  35. .phy_interface = PHY_INTERFACE_MODE_MII,
  36. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  37. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  38. .flags = SMSC911X_USE_32BIT,
  39. };
  40. static struct resource smsc9118_resources[] = {
  41. [0] = {
  42. .start = 0xb6080000,
  43. .end = 0xb60fffff,
  44. .flags = IORESOURCE_MEM,
  45. },
  46. [1] = {
  47. .start = 35,
  48. .end = 35,
  49. .flags = IORESOURCE_IRQ,
  50. }
  51. };
  52. static struct platform_device smsc9118_device = {
  53. .name = "smsc911x",
  54. .id = -1,
  55. .num_resources = ARRAY_SIZE(smsc9118_resources),
  56. .resource = smsc9118_resources,
  57. .dev = {
  58. .platform_data = &smsc911x_config,
  59. },
  60. };
  61. /*
  62. * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
  63. * If this area erased, this board can not boot.
  64. */
  65. static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
  66. {
  67. .name = "uboot",
  68. .offset = 0,
  69. .size = (1 * 1024 * 1024),
  70. .mask_flags = MTD_WRITEABLE, /* Read-only */
  71. }, {
  72. .name = "kernel",
  73. .offset = MTDPART_OFS_APPEND,
  74. .size = (2 * 1024 * 1024),
  75. }, {
  76. .name = "free-area0",
  77. .offset = MTDPART_OFS_APPEND,
  78. .size = ((7 * 1024 * 1024) + (512 * 1024)),
  79. }, {
  80. .name = "CPLD-Data",
  81. .offset = MTDPART_OFS_APPEND,
  82. .mask_flags = MTD_WRITEABLE, /* Read-only */
  83. .size = (1024 * 128 * 2),
  84. }, {
  85. .name = "free-area1",
  86. .offset = MTDPART_OFS_APPEND,
  87. .size = MTDPART_SIZ_FULL,
  88. },
  89. };
  90. static struct physmap_flash_data ap325rxa_nor_flash_data = {
  91. .width = 2,
  92. .parts = ap325rxa_nor_flash_partitions,
  93. .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
  94. };
  95. static struct resource ap325rxa_nor_flash_resources[] = {
  96. [0] = {
  97. .name = "NOR Flash",
  98. .start = 0x00000000,
  99. .end = 0x00ffffff,
  100. .flags = IORESOURCE_MEM,
  101. }
  102. };
  103. static struct platform_device ap325rxa_nor_flash_device = {
  104. .name = "physmap-flash",
  105. .resource = ap325rxa_nor_flash_resources,
  106. .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
  107. .dev = {
  108. .platform_data = &ap325rxa_nor_flash_data,
  109. },
  110. };
  111. static struct mtd_partition nand_partition_info[] = {
  112. {
  113. .name = "nand_data",
  114. .offset = 0,
  115. .size = MTDPART_SIZ_FULL,
  116. },
  117. };
  118. static struct resource nand_flash_resources[] = {
  119. [0] = {
  120. .start = 0xa4530000,
  121. .end = 0xa45300ff,
  122. .flags = IORESOURCE_MEM,
  123. }
  124. };
  125. static struct sh_flctl_platform_data nand_flash_data = {
  126. .parts = nand_partition_info,
  127. .nr_parts = ARRAY_SIZE(nand_partition_info),
  128. .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
  129. .has_hwecc = 1,
  130. };
  131. static struct platform_device nand_flash_device = {
  132. .name = "sh_flctl",
  133. .resource = nand_flash_resources,
  134. .num_resources = ARRAY_SIZE(nand_flash_resources),
  135. .dev = {
  136. .platform_data = &nand_flash_data,
  137. },
  138. };
  139. #define FPGA_LCDREG 0xB4100180
  140. #define FPGA_BKLREG 0xB4100212
  141. #define FPGA_LCDREG_VAL 0x0018
  142. #define PORT_MSELCRB 0xA4050182
  143. #define PORT_HIZCRC 0xA405015C
  144. #define PORT_DRVCRA 0xA405018A
  145. #define PORT_DRVCRB 0xA405018C
  146. static int ap320_wvga_set_brightness(int brightness)
  147. {
  148. if (brightness) {
  149. gpio_set_value(GPIO_PTS3, 0);
  150. __raw_writew(0x100, FPGA_BKLREG);
  151. } else {
  152. __raw_writew(0, FPGA_BKLREG);
  153. gpio_set_value(GPIO_PTS3, 1);
  154. }
  155. return 0;
  156. }
  157. static int ap320_wvga_get_brightness(void)
  158. {
  159. return gpio_get_value(GPIO_PTS3);
  160. }
  161. static void ap320_wvga_power_on(void)
  162. {
  163. msleep(100);
  164. /* ASD AP-320/325 LCD ON */
  165. __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
  166. }
  167. static void ap320_wvga_power_off(void)
  168. {
  169. /* ASD AP-320/325 LCD OFF */
  170. __raw_writew(0, FPGA_LCDREG);
  171. }
  172. static const struct fb_videomode ap325rxa_lcdc_modes[] = {
  173. {
  174. .name = "LB070WV1",
  175. .xres = 800,
  176. .yres = 480,
  177. .left_margin = 32,
  178. .right_margin = 160,
  179. .hsync_len = 8,
  180. .upper_margin = 63,
  181. .lower_margin = 80,
  182. .vsync_len = 1,
  183. .sync = 0, /* hsync and vsync are active low */
  184. },
  185. };
  186. static struct sh_mobile_lcdc_info lcdc_info = {
  187. .clock_source = LCDC_CLK_EXTERNAL,
  188. .ch[0] = {
  189. .chan = LCDC_CHAN_MAINLCD,
  190. .fourcc = V4L2_PIX_FMT_RGB565,
  191. .interface_type = RGB18,
  192. .clock_divider = 1,
  193. .lcd_modes = ap325rxa_lcdc_modes,
  194. .num_modes = ARRAY_SIZE(ap325rxa_lcdc_modes),
  195. .panel_cfg = {
  196. .width = 152, /* 7.0 inch */
  197. .height = 91,
  198. .display_on = ap320_wvga_power_on,
  199. .display_off = ap320_wvga_power_off,
  200. },
  201. .bl_info = {
  202. .name = "sh_mobile_lcdc_bl",
  203. .max_brightness = 1,
  204. .set_brightness = ap320_wvga_set_brightness,
  205. .get_brightness = ap320_wvga_get_brightness,
  206. },
  207. }
  208. };
  209. static struct resource lcdc_resources[] = {
  210. [0] = {
  211. .name = "LCDC",
  212. .start = 0xfe940000, /* P4-only space */
  213. .end = 0xfe942fff,
  214. .flags = IORESOURCE_MEM,
  215. },
  216. [1] = {
  217. .start = 28,
  218. .flags = IORESOURCE_IRQ,
  219. },
  220. };
  221. static struct platform_device lcdc_device = {
  222. .name = "sh_mobile_lcdc_fb",
  223. .num_resources = ARRAY_SIZE(lcdc_resources),
  224. .resource = lcdc_resources,
  225. .dev = {
  226. .platform_data = &lcdc_info,
  227. },
  228. };
  229. static void camera_power(int val)
  230. {
  231. gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
  232. mdelay(10);
  233. }
  234. #ifdef CONFIG_I2C
  235. /* support for the old ncm03j camera */
  236. static unsigned char camera_ncm03j_magic[] =
  237. {
  238. 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
  239. 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
  240. 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
  241. 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
  242. 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
  243. 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
  244. 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
  245. 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
  246. 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
  247. 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
  248. 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
  249. 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
  250. 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
  251. 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
  252. 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
  253. 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
  254. };
  255. static int camera_probe(void)
  256. {
  257. struct i2c_adapter *a = i2c_get_adapter(0);
  258. struct i2c_msg msg;
  259. int ret;
  260. if (!a)
  261. return -ENODEV;
  262. camera_power(1);
  263. msg.addr = 0x6e;
  264. msg.buf = camera_ncm03j_magic;
  265. msg.len = 2;
  266. msg.flags = 0;
  267. ret = i2c_transfer(a, &msg, 1);
  268. camera_power(0);
  269. return ret;
  270. }
  271. static int camera_set_capture(struct soc_camera_platform_info *info,
  272. int enable)
  273. {
  274. struct i2c_adapter *a = i2c_get_adapter(0);
  275. struct i2c_msg msg;
  276. int ret = 0;
  277. int i;
  278. camera_power(0);
  279. if (!enable)
  280. return 0; /* no disable for now */
  281. camera_power(1);
  282. for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
  283. u_int8_t buf[8];
  284. msg.addr = 0x6e;
  285. msg.buf = buf;
  286. msg.len = 2;
  287. msg.flags = 0;
  288. buf[0] = camera_ncm03j_magic[i];
  289. buf[1] = camera_ncm03j_magic[i + 1];
  290. ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
  291. }
  292. return ret;
  293. }
  294. static int ap325rxa_camera_add(struct soc_camera_device *icd);
  295. static void ap325rxa_camera_del(struct soc_camera_device *icd);
  296. static struct soc_camera_platform_info camera_info = {
  297. .format_name = "UYVY",
  298. .format_depth = 16,
  299. .format = {
  300. .code = V4L2_MBUS_FMT_UYVY8_2X8,
  301. .colorspace = V4L2_COLORSPACE_SMPTE170M,
  302. .field = V4L2_FIELD_NONE,
  303. .width = 640,
  304. .height = 480,
  305. },
  306. .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
  307. V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
  308. V4L2_MBUS_DATA_ACTIVE_HIGH,
  309. .mbus_type = V4L2_MBUS_PARALLEL,
  310. .set_capture = camera_set_capture,
  311. };
  312. static struct soc_camera_link camera_link = {
  313. .bus_id = 0,
  314. .add_device = ap325rxa_camera_add,
  315. .del_device = ap325rxa_camera_del,
  316. .module_name = "soc_camera_platform",
  317. .priv = &camera_info,
  318. };
  319. static struct platform_device *camera_device;
  320. static void ap325rxa_camera_release(struct device *dev)
  321. {
  322. soc_camera_platform_release(&camera_device);
  323. }
  324. static int ap325rxa_camera_add(struct soc_camera_device *icd)
  325. {
  326. int ret = soc_camera_platform_add(icd, &camera_device, &camera_link,
  327. ap325rxa_camera_release, 0);
  328. if (ret < 0)
  329. return ret;
  330. ret = camera_probe();
  331. if (ret < 0)
  332. soc_camera_platform_del(icd, camera_device, &camera_link);
  333. return ret;
  334. }
  335. static void ap325rxa_camera_del(struct soc_camera_device *icd)
  336. {
  337. soc_camera_platform_del(icd, camera_device, &camera_link);
  338. }
  339. #endif /* CONFIG_I2C */
  340. static int ov7725_power(struct device *dev, int mode)
  341. {
  342. camera_power(0);
  343. if (mode)
  344. camera_power(1);
  345. return 0;
  346. }
  347. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  348. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  349. };
  350. static struct resource ceu_resources[] = {
  351. [0] = {
  352. .name = "CEU",
  353. .start = 0xfe910000,
  354. .end = 0xfe91009f,
  355. .flags = IORESOURCE_MEM,
  356. },
  357. [1] = {
  358. .start = 52,
  359. .flags = IORESOURCE_IRQ,
  360. },
  361. [2] = {
  362. /* place holder for contiguous memory */
  363. },
  364. };
  365. static struct platform_device ceu_device = {
  366. .name = "sh_mobile_ceu",
  367. .id = 0, /* "ceu0" clock */
  368. .num_resources = ARRAY_SIZE(ceu_resources),
  369. .resource = ceu_resources,
  370. .dev = {
  371. .platform_data = &sh_mobile_ceu_info,
  372. },
  373. };
  374. static struct resource sdhi0_cn3_resources[] = {
  375. [0] = {
  376. .name = "SDHI0",
  377. .start = 0x04ce0000,
  378. .end = 0x04ce00ff,
  379. .flags = IORESOURCE_MEM,
  380. },
  381. [1] = {
  382. .start = 100,
  383. .flags = IORESOURCE_IRQ,
  384. },
  385. };
  386. static struct sh_mobile_sdhi_info sdhi0_cn3_data = {
  387. .tmio_caps = MMC_CAP_SDIO_IRQ,
  388. };
  389. static struct platform_device sdhi0_cn3_device = {
  390. .name = "sh_mobile_sdhi",
  391. .id = 0, /* "sdhi0" clock */
  392. .num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
  393. .resource = sdhi0_cn3_resources,
  394. .dev = {
  395. .platform_data = &sdhi0_cn3_data,
  396. },
  397. };
  398. static struct resource sdhi1_cn7_resources[] = {
  399. [0] = {
  400. .name = "SDHI1",
  401. .start = 0x04cf0000,
  402. .end = 0x04cf00ff,
  403. .flags = IORESOURCE_MEM,
  404. },
  405. [1] = {
  406. .start = 23,
  407. .flags = IORESOURCE_IRQ,
  408. },
  409. };
  410. static struct sh_mobile_sdhi_info sdhi1_cn7_data = {
  411. .tmio_caps = MMC_CAP_SDIO_IRQ,
  412. };
  413. static struct platform_device sdhi1_cn7_device = {
  414. .name = "sh_mobile_sdhi",
  415. .id = 1, /* "sdhi1" clock */
  416. .num_resources = ARRAY_SIZE(sdhi1_cn7_resources),
  417. .resource = sdhi1_cn7_resources,
  418. .dev = {
  419. .platform_data = &sdhi1_cn7_data,
  420. },
  421. };
  422. static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
  423. {
  424. I2C_BOARD_INFO("pcf8563", 0x51),
  425. },
  426. };
  427. static struct i2c_board_info ap325rxa_i2c_camera[] = {
  428. {
  429. I2C_BOARD_INFO("ov772x", 0x21),
  430. },
  431. };
  432. static struct ov772x_camera_info ov7725_info = {
  433. .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
  434. .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
  435. };
  436. static struct soc_camera_link ov7725_link = {
  437. .bus_id = 0,
  438. .power = ov7725_power,
  439. .board_info = &ap325rxa_i2c_camera[0],
  440. .i2c_adapter_id = 0,
  441. .priv = &ov7725_info,
  442. };
  443. static struct platform_device ap325rxa_camera[] = {
  444. {
  445. .name = "soc-camera-pdrv",
  446. .id = 0,
  447. .dev = {
  448. .platform_data = &ov7725_link,
  449. },
  450. }, {
  451. .name = "soc-camera-pdrv",
  452. .id = 1,
  453. .dev = {
  454. .platform_data = &camera_link,
  455. },
  456. },
  457. };
  458. static struct platform_device *ap325rxa_devices[] __initdata = {
  459. &smsc9118_device,
  460. &ap325rxa_nor_flash_device,
  461. &lcdc_device,
  462. &ceu_device,
  463. &nand_flash_device,
  464. &sdhi0_cn3_device,
  465. &sdhi1_cn7_device,
  466. &ap325rxa_camera[0],
  467. &ap325rxa_camera[1],
  468. };
  469. extern char ap325rxa_sdram_enter_start;
  470. extern char ap325rxa_sdram_enter_end;
  471. extern char ap325rxa_sdram_leave_start;
  472. extern char ap325rxa_sdram_leave_end;
  473. static int __init ap325rxa_devices_setup(void)
  474. {
  475. /* register board specific self-refresh code */
  476. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
  477. &ap325rxa_sdram_enter_start,
  478. &ap325rxa_sdram_enter_end,
  479. &ap325rxa_sdram_leave_start,
  480. &ap325rxa_sdram_leave_end);
  481. /* LD3 and LD4 LEDs */
  482. gpio_request(GPIO_PTX5, NULL); /* RUN */
  483. gpio_direction_output(GPIO_PTX5, 1);
  484. gpio_export(GPIO_PTX5, 0);
  485. gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
  486. gpio_direction_output(GPIO_PTX4, 0);
  487. gpio_export(GPIO_PTX4, 0);
  488. /* SW1 input */
  489. gpio_request(GPIO_PTF7, NULL); /* MODE */
  490. gpio_direction_input(GPIO_PTF7);
  491. gpio_export(GPIO_PTF7, 0);
  492. /* LCDC */
  493. gpio_request(GPIO_FN_LCDD15, NULL);
  494. gpio_request(GPIO_FN_LCDD14, NULL);
  495. gpio_request(GPIO_FN_LCDD13, NULL);
  496. gpio_request(GPIO_FN_LCDD12, NULL);
  497. gpio_request(GPIO_FN_LCDD11, NULL);
  498. gpio_request(GPIO_FN_LCDD10, NULL);
  499. gpio_request(GPIO_FN_LCDD9, NULL);
  500. gpio_request(GPIO_FN_LCDD8, NULL);
  501. gpio_request(GPIO_FN_LCDD7, NULL);
  502. gpio_request(GPIO_FN_LCDD6, NULL);
  503. gpio_request(GPIO_FN_LCDD5, NULL);
  504. gpio_request(GPIO_FN_LCDD4, NULL);
  505. gpio_request(GPIO_FN_LCDD3, NULL);
  506. gpio_request(GPIO_FN_LCDD2, NULL);
  507. gpio_request(GPIO_FN_LCDD1, NULL);
  508. gpio_request(GPIO_FN_LCDD0, NULL);
  509. gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
  510. gpio_request(GPIO_FN_LCDDCK, NULL);
  511. gpio_request(GPIO_FN_LCDVEPWC, NULL);
  512. gpio_request(GPIO_FN_LCDVCPWC, NULL);
  513. gpio_request(GPIO_FN_LCDVSYN, NULL);
  514. gpio_request(GPIO_FN_LCDHSYN, NULL);
  515. gpio_request(GPIO_FN_LCDDISP, NULL);
  516. gpio_request(GPIO_FN_LCDDON, NULL);
  517. /* LCD backlight */
  518. gpio_request(GPIO_PTS3, NULL);
  519. gpio_direction_output(GPIO_PTS3, 1);
  520. /* CEU */
  521. gpio_request(GPIO_FN_VIO_CLK2, NULL);
  522. gpio_request(GPIO_FN_VIO_VD2, NULL);
  523. gpio_request(GPIO_FN_VIO_HD2, NULL);
  524. gpio_request(GPIO_FN_VIO_FLD, NULL);
  525. gpio_request(GPIO_FN_VIO_CKO, NULL);
  526. gpio_request(GPIO_FN_VIO_D15, NULL);
  527. gpio_request(GPIO_FN_VIO_D14, NULL);
  528. gpio_request(GPIO_FN_VIO_D13, NULL);
  529. gpio_request(GPIO_FN_VIO_D12, NULL);
  530. gpio_request(GPIO_FN_VIO_D11, NULL);
  531. gpio_request(GPIO_FN_VIO_D10, NULL);
  532. gpio_request(GPIO_FN_VIO_D9, NULL);
  533. gpio_request(GPIO_FN_VIO_D8, NULL);
  534. gpio_request(GPIO_PTZ7, NULL);
  535. gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
  536. gpio_request(GPIO_PTZ6, NULL);
  537. gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
  538. gpio_request(GPIO_PTZ5, NULL);
  539. gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
  540. gpio_request(GPIO_PTZ4, NULL);
  541. gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
  542. __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
  543. /* FLCTL */
  544. gpio_request(GPIO_FN_FCE, NULL);
  545. gpio_request(GPIO_FN_NAF7, NULL);
  546. gpio_request(GPIO_FN_NAF6, NULL);
  547. gpio_request(GPIO_FN_NAF5, NULL);
  548. gpio_request(GPIO_FN_NAF4, NULL);
  549. gpio_request(GPIO_FN_NAF3, NULL);
  550. gpio_request(GPIO_FN_NAF2, NULL);
  551. gpio_request(GPIO_FN_NAF1, NULL);
  552. gpio_request(GPIO_FN_NAF0, NULL);
  553. gpio_request(GPIO_FN_FCDE, NULL);
  554. gpio_request(GPIO_FN_FOE, NULL);
  555. gpio_request(GPIO_FN_FSC, NULL);
  556. gpio_request(GPIO_FN_FWE, NULL);
  557. gpio_request(GPIO_FN_FRB, NULL);
  558. __raw_writew(0, PORT_HIZCRC);
  559. __raw_writew(0xFFFF, PORT_DRVCRA);
  560. __raw_writew(0xFFFF, PORT_DRVCRB);
  561. platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
  562. /* SDHI0 - CN3 - SD CARD */
  563. gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
  564. gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
  565. gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
  566. gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
  567. gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
  568. gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
  569. gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
  570. gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
  571. /* SDHI1 - CN7 - MICRO SD CARD */
  572. gpio_request(GPIO_FN_SDHI1CD, NULL);
  573. gpio_request(GPIO_FN_SDHI1D3, NULL);
  574. gpio_request(GPIO_FN_SDHI1D2, NULL);
  575. gpio_request(GPIO_FN_SDHI1D1, NULL);
  576. gpio_request(GPIO_FN_SDHI1D0, NULL);
  577. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  578. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  579. i2c_register_board_info(0, ap325rxa_i2c_devices,
  580. ARRAY_SIZE(ap325rxa_i2c_devices));
  581. return platform_add_devices(ap325rxa_devices,
  582. ARRAY_SIZE(ap325rxa_devices));
  583. }
  584. arch_initcall(ap325rxa_devices_setup);
  585. /* Return the board specific boot mode pin configuration */
  586. static int ap325rxa_mode_pins(void)
  587. {
  588. /* MD0=0, MD1=0, MD2=0: Clock Mode 0
  589. * MD3=0: 16-bit Area0 Bus Width
  590. * MD5=1: Little Endian
  591. * TSTMD=1, MD8=1: Test Mode Disabled
  592. */
  593. return MODE_PIN5 | MODE_PIN8;
  594. }
  595. static struct sh_machine_vector mv_ap325rxa __initmv = {
  596. .mv_name = "AP-325RXA",
  597. .mv_mode_pins = ap325rxa_mode_pins,
  598. };