cpufreq.c 7.4 KB

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  1. /*
  2. * Copyright (C) 2007 PA Semi, Inc
  3. *
  4. * Authors: Egor Martovetsky <egor@pasemi.com>
  5. * Olof Johansson <olof@lixom.net>
  6. *
  7. * Maintained by: Olof Johansson <olof@lixom.net>
  8. *
  9. * Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
  10. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. */
  27. #include <linux/cpufreq.h>
  28. #include <linux/timer.h>
  29. #include <linux/module.h>
  30. #include <asm/hw_irq.h>
  31. #include <asm/io.h>
  32. #include <asm/prom.h>
  33. #include <asm/time.h>
  34. #include <asm/smp.h>
  35. #define SDCASR_REG 0x0100
  36. #define SDCASR_REG_STRIDE 0x1000
  37. #define SDCPWR_CFGA0_REG 0x0100
  38. #define SDCPWR_PWST0_REG 0x0000
  39. #define SDCPWR_GIZTIME_REG 0x0440
  40. /* SDCPWR_GIZTIME_REG fields */
  41. #define SDCPWR_GIZTIME_GR 0x80000000
  42. #define SDCPWR_GIZTIME_LONGLOCK 0x000000ff
  43. /* Offset of ASR registers from SDC base */
  44. #define SDCASR_OFFSET 0x120000
  45. static void __iomem *sdcpwr_mapbase;
  46. static void __iomem *sdcasr_mapbase;
  47. static DEFINE_MUTEX(pas_switch_mutex);
  48. /* Current astate, is used when waking up from power savings on
  49. * one core, in case the other core has switched states during
  50. * the idle time.
  51. */
  52. static int current_astate;
  53. /* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
  54. static struct cpufreq_frequency_table pas_freqs[] = {
  55. {0, 0},
  56. {1, 0},
  57. {2, 0},
  58. {3, 0},
  59. {4, 0},
  60. {0, CPUFREQ_TABLE_END},
  61. };
  62. static struct freq_attr *pas_cpu_freqs_attr[] = {
  63. &cpufreq_freq_attr_scaling_available_freqs,
  64. NULL,
  65. };
  66. /*
  67. * hardware specific functions
  68. */
  69. static int get_astate_freq(int astate)
  70. {
  71. u32 ret;
  72. ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));
  73. return ret & 0x3f;
  74. }
  75. static int get_cur_astate(int cpu)
  76. {
  77. u32 ret;
  78. ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
  79. ret = (ret >> (cpu * 4)) & 0x7;
  80. return ret;
  81. }
  82. static int get_gizmo_latency(void)
  83. {
  84. u32 giztime, ret;
  85. giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);
  86. /* just provide the upper bound */
  87. if (giztime & SDCPWR_GIZTIME_GR)
  88. ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
  89. else
  90. ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;
  91. return ret;
  92. }
  93. static void set_astate(int cpu, unsigned int astate)
  94. {
  95. unsigned long flags;
  96. /* Return if called before init has run */
  97. if (unlikely(!sdcasr_mapbase))
  98. return;
  99. local_irq_save(flags);
  100. out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);
  101. local_irq_restore(flags);
  102. }
  103. int check_astate(void)
  104. {
  105. return get_cur_astate(hard_smp_processor_id());
  106. }
  107. void restore_astate(int cpu)
  108. {
  109. set_astate(cpu, current_astate);
  110. }
  111. /*
  112. * cpufreq functions
  113. */
  114. static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
  115. {
  116. const u32 *max_freqp;
  117. u32 max_freq;
  118. int i, cur_astate;
  119. struct resource res;
  120. struct device_node *cpu, *dn;
  121. int err = -ENODEV;
  122. cpu = of_get_cpu_node(policy->cpu, NULL);
  123. if (!cpu)
  124. goto out;
  125. dn = of_find_compatible_node(NULL, NULL, "1682m-sdc");
  126. if (!dn)
  127. dn = of_find_compatible_node(NULL, NULL,
  128. "pasemi,pwrficient-sdc");
  129. if (!dn)
  130. goto out;
  131. err = of_address_to_resource(dn, 0, &res);
  132. of_node_put(dn);
  133. if (err)
  134. goto out;
  135. sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
  136. if (!sdcasr_mapbase) {
  137. err = -EINVAL;
  138. goto out;
  139. }
  140. dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo");
  141. if (!dn)
  142. dn = of_find_compatible_node(NULL, NULL,
  143. "pasemi,pwrficient-gizmo");
  144. if (!dn) {
  145. err = -ENODEV;
  146. goto out_unmap_sdcasr;
  147. }
  148. err = of_address_to_resource(dn, 0, &res);
  149. of_node_put(dn);
  150. if (err)
  151. goto out_unmap_sdcasr;
  152. sdcpwr_mapbase = ioremap(res.start, 0x1000);
  153. if (!sdcpwr_mapbase) {
  154. err = -EINVAL;
  155. goto out_unmap_sdcasr;
  156. }
  157. pr_debug("init cpufreq on CPU %d\n", policy->cpu);
  158. max_freqp = of_get_property(cpu, "clock-frequency", NULL);
  159. if (!max_freqp) {
  160. err = -EINVAL;
  161. goto out_unmap_sdcpwr;
  162. }
  163. /* we need the freq in kHz */
  164. max_freq = *max_freqp / 1000;
  165. pr_debug("max clock-frequency is at %u kHz\n", max_freq);
  166. pr_debug("initializing frequency table\n");
  167. /* initialize frequency table */
  168. for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
  169. pas_freqs[i].frequency = get_astate_freq(pas_freqs[i].index) * 100000;
  170. pr_debug("%d: %d\n", i, pas_freqs[i].frequency);
  171. }
  172. policy->cpuinfo.transition_latency = get_gizmo_latency();
  173. cur_astate = get_cur_astate(policy->cpu);
  174. pr_debug("current astate is at %d\n",cur_astate);
  175. policy->cur = pas_freqs[cur_astate].frequency;
  176. cpumask_copy(policy->cpus, cpu_online_mask);
  177. ppc_proc_freq = policy->cur * 1000ul;
  178. cpufreq_frequency_table_get_attr(pas_freqs, policy->cpu);
  179. /* this ensures that policy->cpuinfo_min and policy->cpuinfo_max
  180. * are set correctly
  181. */
  182. return cpufreq_frequency_table_cpuinfo(policy, pas_freqs);
  183. out_unmap_sdcpwr:
  184. iounmap(sdcpwr_mapbase);
  185. out_unmap_sdcasr:
  186. iounmap(sdcasr_mapbase);
  187. out:
  188. return err;
  189. }
  190. static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  191. {
  192. if (sdcasr_mapbase)
  193. iounmap(sdcasr_mapbase);
  194. if (sdcpwr_mapbase)
  195. iounmap(sdcpwr_mapbase);
  196. cpufreq_frequency_table_put_attr(policy->cpu);
  197. return 0;
  198. }
  199. static int pas_cpufreq_verify(struct cpufreq_policy *policy)
  200. {
  201. return cpufreq_frequency_table_verify(policy, pas_freqs);
  202. }
  203. static int pas_cpufreq_target(struct cpufreq_policy *policy,
  204. unsigned int target_freq,
  205. unsigned int relation)
  206. {
  207. struct cpufreq_freqs freqs;
  208. int pas_astate_new;
  209. int i;
  210. cpufreq_frequency_table_target(policy,
  211. pas_freqs,
  212. target_freq,
  213. relation,
  214. &pas_astate_new);
  215. freqs.old = policy->cur;
  216. freqs.new = pas_freqs[pas_astate_new].frequency;
  217. freqs.cpu = policy->cpu;
  218. mutex_lock(&pas_switch_mutex);
  219. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  220. pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
  221. policy->cpu,
  222. pas_freqs[pas_astate_new].frequency,
  223. pas_freqs[pas_astate_new].index);
  224. current_astate = pas_astate_new;
  225. for_each_online_cpu(i)
  226. set_astate(i, pas_astate_new);
  227. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  228. mutex_unlock(&pas_switch_mutex);
  229. ppc_proc_freq = freqs.new * 1000ul;
  230. return 0;
  231. }
  232. static struct cpufreq_driver pas_cpufreq_driver = {
  233. .name = "pas-cpufreq",
  234. .owner = THIS_MODULE,
  235. .flags = CPUFREQ_CONST_LOOPS,
  236. .init = pas_cpufreq_cpu_init,
  237. .exit = pas_cpufreq_cpu_exit,
  238. .verify = pas_cpufreq_verify,
  239. .target = pas_cpufreq_target,
  240. .attr = pas_cpu_freqs_attr,
  241. };
  242. /*
  243. * module init and destoy
  244. */
  245. static int __init pas_cpufreq_init(void)
  246. {
  247. if (!of_machine_is_compatible("PA6T-1682M") &&
  248. !of_machine_is_compatible("pasemi,pwrficient"))
  249. return -ENODEV;
  250. return cpufreq_register_driver(&pas_cpufreq_driver);
  251. }
  252. static void __exit pas_cpufreq_exit(void)
  253. {
  254. cpufreq_unregister_driver(&pas_cpufreq_driver);
  255. }
  256. module_init(pas_cpufreq_init);
  257. module_exit(pas_cpufreq_exit);
  258. MODULE_LICENSE("GPL");
  259. MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");