smp.c 28 KB

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  1. /* SMP support routines.
  2. *
  3. * Copyright (C) 2006-2008 Panasonic Corporation
  4. * All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/interrupt.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/init.h>
  18. #include <linux/jiffies.h>
  19. #include <linux/cpumask.h>
  20. #include <linux/err.h>
  21. #include <linux/kernel.h>
  22. #include <linux/delay.h>
  23. #include <linux/sched.h>
  24. #include <linux/profile.h>
  25. #include <linux/smp.h>
  26. #include <linux/cpu.h>
  27. #include <asm/tlbflush.h>
  28. #include <asm/bitops.h>
  29. #include <asm/processor.h>
  30. #include <asm/bug.h>
  31. #include <asm/exceptions.h>
  32. #include <asm/hardirq.h>
  33. #include <asm/fpu.h>
  34. #include <asm/mmu_context.h>
  35. #include <asm/thread_info.h>
  36. #include <asm/cpu-regs.h>
  37. #include <asm/intctl-regs.h>
  38. #include "internal.h"
  39. #ifdef CONFIG_HOTPLUG_CPU
  40. #include <asm/cacheflush.h>
  41. static unsigned long sleep_mode[NR_CPUS];
  42. static void run_sleep_cpu(unsigned int cpu);
  43. static void run_wakeup_cpu(unsigned int cpu);
  44. #endif /* CONFIG_HOTPLUG_CPU */
  45. /*
  46. * Debug Message function
  47. */
  48. #undef DEBUG_SMP
  49. #ifdef DEBUG_SMP
  50. #define Dprintk(fmt, ...) printk(KERN_DEBUG fmt, ##__VA_ARGS__)
  51. #else
  52. #define Dprintk(fmt, ...) no_printk(KERN_DEBUG fmt, ##__VA_ARGS__)
  53. #endif
  54. /* timeout value in msec for smp_nmi_call_function. zero is no timeout. */
  55. #define CALL_FUNCTION_NMI_IPI_TIMEOUT 0
  56. /*
  57. * Structure and data for smp_nmi_call_function().
  58. */
  59. struct nmi_call_data_struct {
  60. smp_call_func_t func;
  61. void *info;
  62. cpumask_t started;
  63. cpumask_t finished;
  64. int wait;
  65. char size_alignment[0]
  66. __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
  67. } __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
  68. static DEFINE_SPINLOCK(smp_nmi_call_lock);
  69. static struct nmi_call_data_struct *nmi_call_data;
  70. /*
  71. * Data structures and variables
  72. */
  73. static cpumask_t cpu_callin_map; /* Bitmask of callin CPUs */
  74. static cpumask_t cpu_callout_map; /* Bitmask of callout CPUs */
  75. cpumask_t cpu_boot_map; /* Bitmask of boot APs */
  76. unsigned long start_stack[NR_CPUS - 1];
  77. /*
  78. * Per CPU parameters
  79. */
  80. struct mn10300_cpuinfo cpu_data[NR_CPUS] __cacheline_aligned;
  81. static int cpucount; /* The count of boot CPUs */
  82. static cpumask_t smp_commenced_mask;
  83. cpumask_t cpu_initialized __initdata = CPU_MASK_NONE;
  84. /*
  85. * Function Prototypes
  86. */
  87. static int do_boot_cpu(int);
  88. static void smp_show_cpu_info(int cpu_id);
  89. static void smp_callin(void);
  90. static void smp_online(void);
  91. static void smp_store_cpu_info(int);
  92. static void smp_cpu_init(void);
  93. static void smp_tune_scheduling(void);
  94. static void send_IPI_mask(const cpumask_t *cpumask, int irq);
  95. static void init_ipi(void);
  96. /*
  97. * IPI Initialization interrupt definitions
  98. */
  99. static void mn10300_ipi_disable(unsigned int irq);
  100. static void mn10300_ipi_enable(unsigned int irq);
  101. static void mn10300_ipi_chip_disable(struct irq_data *d);
  102. static void mn10300_ipi_chip_enable(struct irq_data *d);
  103. static void mn10300_ipi_ack(struct irq_data *d);
  104. static void mn10300_ipi_nop(struct irq_data *d);
  105. static struct irq_chip mn10300_ipi_type = {
  106. .name = "cpu_ipi",
  107. .irq_disable = mn10300_ipi_chip_disable,
  108. .irq_enable = mn10300_ipi_chip_enable,
  109. .irq_ack = mn10300_ipi_ack,
  110. .irq_eoi = mn10300_ipi_nop
  111. };
  112. static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id);
  113. static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id);
  114. static struct irqaction reschedule_ipi = {
  115. .handler = smp_reschedule_interrupt,
  116. .name = "smp reschedule IPI"
  117. };
  118. static struct irqaction call_function_ipi = {
  119. .handler = smp_call_function_interrupt,
  120. .name = "smp call function IPI"
  121. };
  122. #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
  123. static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id);
  124. static struct irqaction local_timer_ipi = {
  125. .handler = smp_ipi_timer_interrupt,
  126. .flags = IRQF_DISABLED,
  127. .name = "smp local timer IPI"
  128. };
  129. #endif
  130. /**
  131. * init_ipi - Initialise the IPI mechanism
  132. */
  133. static void init_ipi(void)
  134. {
  135. unsigned long flags;
  136. u16 tmp16;
  137. /* set up the reschedule IPI */
  138. irq_set_chip_and_handler(RESCHEDULE_IPI, &mn10300_ipi_type,
  139. handle_percpu_irq);
  140. setup_irq(RESCHEDULE_IPI, &reschedule_ipi);
  141. set_intr_level(RESCHEDULE_IPI, RESCHEDULE_GxICR_LV);
  142. mn10300_ipi_enable(RESCHEDULE_IPI);
  143. /* set up the call function IPI */
  144. irq_set_chip_and_handler(CALL_FUNC_SINGLE_IPI, &mn10300_ipi_type,
  145. handle_percpu_irq);
  146. setup_irq(CALL_FUNC_SINGLE_IPI, &call_function_ipi);
  147. set_intr_level(CALL_FUNC_SINGLE_IPI, CALL_FUNCTION_GxICR_LV);
  148. mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
  149. /* set up the local timer IPI */
  150. #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
  151. defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
  152. irq_set_chip_and_handler(LOCAL_TIMER_IPI, &mn10300_ipi_type,
  153. handle_percpu_irq);
  154. setup_irq(LOCAL_TIMER_IPI, &local_timer_ipi);
  155. set_intr_level(LOCAL_TIMER_IPI, LOCAL_TIMER_GxICR_LV);
  156. mn10300_ipi_enable(LOCAL_TIMER_IPI);
  157. #endif
  158. #ifdef CONFIG_MN10300_CACHE_ENABLED
  159. /* set up the cache flush IPI */
  160. flags = arch_local_cli_save();
  161. __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(FLUSH_CACHE_GxICR_LV),
  162. mn10300_low_ipi_handler);
  163. GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
  164. mn10300_ipi_enable(FLUSH_CACHE_IPI);
  165. arch_local_irq_restore(flags);
  166. #endif
  167. /* set up the NMI call function IPI */
  168. flags = arch_local_cli_save();
  169. GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
  170. tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
  171. arch_local_irq_restore(flags);
  172. /* set up the SMP boot IPI */
  173. flags = arch_local_cli_save();
  174. __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(SMP_BOOT_GxICR_LV),
  175. mn10300_low_ipi_handler);
  176. arch_local_irq_restore(flags);
  177. }
  178. /**
  179. * mn10300_ipi_shutdown - Shut down handling of an IPI
  180. * @irq: The IPI to be shut down.
  181. */
  182. static void mn10300_ipi_shutdown(unsigned int irq)
  183. {
  184. unsigned long flags;
  185. u16 tmp;
  186. flags = arch_local_cli_save();
  187. tmp = GxICR(irq);
  188. GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
  189. tmp = GxICR(irq);
  190. arch_local_irq_restore(flags);
  191. }
  192. /**
  193. * mn10300_ipi_enable - Enable an IPI
  194. * @irq: The IPI to be enabled.
  195. */
  196. static void mn10300_ipi_enable(unsigned int irq)
  197. {
  198. unsigned long flags;
  199. u16 tmp;
  200. flags = arch_local_cli_save();
  201. tmp = GxICR(irq);
  202. GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
  203. tmp = GxICR(irq);
  204. arch_local_irq_restore(flags);
  205. }
  206. static void mn10300_ipi_chip_enable(struct irq_data *d)
  207. {
  208. mn10300_ipi_enable(d->irq);
  209. }
  210. /**
  211. * mn10300_ipi_disable - Disable an IPI
  212. * @irq: The IPI to be disabled.
  213. */
  214. static void mn10300_ipi_disable(unsigned int irq)
  215. {
  216. unsigned long flags;
  217. u16 tmp;
  218. flags = arch_local_cli_save();
  219. tmp = GxICR(irq);
  220. GxICR(irq) = tmp & GxICR_LEVEL;
  221. tmp = GxICR(irq);
  222. arch_local_irq_restore(flags);
  223. }
  224. static void mn10300_ipi_chip_disable(struct irq_data *d)
  225. {
  226. mn10300_ipi_disable(d->irq);
  227. }
  228. /**
  229. * mn10300_ipi_ack - Acknowledge an IPI interrupt in the PIC
  230. * @irq: The IPI to be acknowledged.
  231. *
  232. * Clear the interrupt detection flag for the IPI on the appropriate interrupt
  233. * channel in the PIC.
  234. */
  235. static void mn10300_ipi_ack(struct irq_data *d)
  236. {
  237. unsigned int irq = d->irq;
  238. unsigned long flags;
  239. u16 tmp;
  240. flags = arch_local_cli_save();
  241. GxICR_u8(irq) = GxICR_DETECT;
  242. tmp = GxICR(irq);
  243. arch_local_irq_restore(flags);
  244. }
  245. /**
  246. * mn10300_ipi_nop - Dummy IPI action
  247. * @irq: The IPI to be acted upon.
  248. */
  249. static void mn10300_ipi_nop(struct irq_data *d)
  250. {
  251. }
  252. /**
  253. * send_IPI_mask - Send IPIs to all CPUs in list
  254. * @cpumask: The list of CPUs to target.
  255. * @irq: The IPI request to be sent.
  256. *
  257. * Send the specified IPI to all the CPUs in the list, not waiting for them to
  258. * finish before returning. The caller is responsible for synchronisation if
  259. * that is needed.
  260. */
  261. static void send_IPI_mask(const cpumask_t *cpumask, int irq)
  262. {
  263. int i;
  264. u16 tmp;
  265. for (i = 0; i < NR_CPUS; i++) {
  266. if (cpumask_test_cpu(i, cpumask)) {
  267. /* send IPI */
  268. tmp = CROSS_GxICR(irq, i);
  269. CROSS_GxICR(irq, i) =
  270. tmp | GxICR_REQUEST | GxICR_DETECT;
  271. tmp = CROSS_GxICR(irq, i); /* flush write buffer */
  272. }
  273. }
  274. }
  275. /**
  276. * send_IPI_self - Send an IPI to this CPU.
  277. * @irq: The IPI request to be sent.
  278. *
  279. * Send the specified IPI to the current CPU.
  280. */
  281. void send_IPI_self(int irq)
  282. {
  283. send_IPI_mask(cpumask_of(smp_processor_id()), irq);
  284. }
  285. /**
  286. * send_IPI_allbutself - Send IPIs to all the other CPUs.
  287. * @irq: The IPI request to be sent.
  288. *
  289. * Send the specified IPI to all CPUs in the system barring the current one,
  290. * not waiting for them to finish before returning. The caller is responsible
  291. * for synchronisation if that is needed.
  292. */
  293. void send_IPI_allbutself(int irq)
  294. {
  295. cpumask_t cpumask;
  296. cpumask_copy(&cpumask, cpu_online_mask);
  297. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  298. send_IPI_mask(&cpumask, irq);
  299. }
  300. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  301. {
  302. BUG();
  303. /*send_IPI_mask(mask, CALL_FUNCTION_IPI);*/
  304. }
  305. void arch_send_call_function_single_ipi(int cpu)
  306. {
  307. send_IPI_mask(cpumask_of(cpu), CALL_FUNC_SINGLE_IPI);
  308. }
  309. /**
  310. * smp_send_reschedule - Send reschedule IPI to a CPU
  311. * @cpu: The CPU to target.
  312. */
  313. void smp_send_reschedule(int cpu)
  314. {
  315. send_IPI_mask(cpumask_of(cpu), RESCHEDULE_IPI);
  316. }
  317. /**
  318. * smp_nmi_call_function - Send a call function NMI IPI to all CPUs
  319. * @func: The function to ask to be run.
  320. * @info: The context data to pass to that function.
  321. * @wait: If true, wait (atomically) until function is run on all CPUs.
  322. *
  323. * Send a non-maskable request to all CPUs in the system, requesting them to
  324. * run the specified function with the given context data, and, potentially, to
  325. * wait for completion of that function on all CPUs.
  326. *
  327. * Returns 0 if successful, -ETIMEDOUT if we were asked to wait, but hit the
  328. * timeout.
  329. */
  330. int smp_nmi_call_function(smp_call_func_t func, void *info, int wait)
  331. {
  332. struct nmi_call_data_struct data;
  333. unsigned long flags;
  334. unsigned int cnt;
  335. int cpus, ret = 0;
  336. cpus = num_online_cpus() - 1;
  337. if (cpus < 1)
  338. return 0;
  339. data.func = func;
  340. data.info = info;
  341. cpumask_copy(&data.started, cpu_online_mask);
  342. cpumask_clear_cpu(smp_processor_id(), &data.started);
  343. data.wait = wait;
  344. if (wait)
  345. data.finished = data.started;
  346. spin_lock_irqsave(&smp_nmi_call_lock, flags);
  347. nmi_call_data = &data;
  348. smp_mb();
  349. /* Send a message to all other CPUs and wait for them to respond */
  350. send_IPI_allbutself(CALL_FUNCTION_NMI_IPI);
  351. /* Wait for response */
  352. if (CALL_FUNCTION_NMI_IPI_TIMEOUT > 0) {
  353. for (cnt = 0;
  354. cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
  355. !cpumask_empty(&data.started);
  356. cnt++)
  357. mdelay(1);
  358. if (wait && cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT) {
  359. for (cnt = 0;
  360. cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
  361. !cpumask_empty(&data.finished);
  362. cnt++)
  363. mdelay(1);
  364. }
  365. if (cnt >= CALL_FUNCTION_NMI_IPI_TIMEOUT)
  366. ret = -ETIMEDOUT;
  367. } else {
  368. /* If timeout value is zero, wait until cpumask has been
  369. * cleared */
  370. while (!cpumask_empty(&data.started))
  371. barrier();
  372. if (wait)
  373. while (!cpumask_empty(&data.finished))
  374. barrier();
  375. }
  376. spin_unlock_irqrestore(&smp_nmi_call_lock, flags);
  377. return ret;
  378. }
  379. /**
  380. * smp_jump_to_debugger - Make other CPUs enter the debugger by sending an IPI
  381. *
  382. * Send a non-maskable request to all other CPUs in the system, instructing
  383. * them to jump into the debugger. The caller is responsible for checking that
  384. * the other CPUs responded to the instruction.
  385. *
  386. * The caller should make sure that this CPU's debugger IPI is disabled.
  387. */
  388. void smp_jump_to_debugger(void)
  389. {
  390. if (num_online_cpus() > 1)
  391. /* Send a message to all other CPUs */
  392. send_IPI_allbutself(DEBUGGER_NMI_IPI);
  393. }
  394. /**
  395. * stop_this_cpu - Callback to stop a CPU.
  396. * @unused: Callback context (ignored).
  397. */
  398. void stop_this_cpu(void *unused)
  399. {
  400. static volatile int stopflag;
  401. unsigned long flags;
  402. #ifdef CONFIG_GDBSTUB
  403. /* In case of single stepping smp_send_stop by other CPU,
  404. * clear procindebug to avoid deadlock.
  405. */
  406. atomic_set(&procindebug[smp_processor_id()], 0);
  407. #endif /* CONFIG_GDBSTUB */
  408. flags = arch_local_cli_save();
  409. set_cpu_online(smp_processor_id(), false);
  410. while (!stopflag)
  411. cpu_relax();
  412. set_cpu_online(smp_processor_id(), true);
  413. arch_local_irq_restore(flags);
  414. }
  415. /**
  416. * smp_send_stop - Send a stop request to all CPUs.
  417. */
  418. void smp_send_stop(void)
  419. {
  420. smp_nmi_call_function(stop_this_cpu, NULL, 0);
  421. }
  422. /**
  423. * smp_reschedule_interrupt - Reschedule IPI handler
  424. * @irq: The interrupt number.
  425. * @dev_id: The device ID.
  426. *
  427. * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
  428. */
  429. static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id)
  430. {
  431. scheduler_ipi();
  432. return IRQ_HANDLED;
  433. }
  434. /**
  435. * smp_call_function_interrupt - Call function IPI handler
  436. * @irq: The interrupt number.
  437. * @dev_id: The device ID.
  438. *
  439. * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
  440. */
  441. static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id)
  442. {
  443. /* generic_smp_call_function_interrupt(); */
  444. generic_smp_call_function_single_interrupt();
  445. return IRQ_HANDLED;
  446. }
  447. /**
  448. * smp_nmi_call_function_interrupt - Non-maskable call function IPI handler
  449. */
  450. void smp_nmi_call_function_interrupt(void)
  451. {
  452. smp_call_func_t func = nmi_call_data->func;
  453. void *info = nmi_call_data->info;
  454. int wait = nmi_call_data->wait;
  455. /* Notify the initiating CPU that I've grabbed the data and am about to
  456. * execute the function
  457. */
  458. smp_mb();
  459. cpumask_clear_cpu(smp_processor_id(), &nmi_call_data->started);
  460. (*func)(info);
  461. if (wait) {
  462. smp_mb();
  463. cpumask_clear_cpu(smp_processor_id(),
  464. &nmi_call_data->finished);
  465. }
  466. }
  467. #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
  468. defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
  469. /**
  470. * smp_ipi_timer_interrupt - Local timer IPI handler
  471. * @irq: The interrupt number.
  472. * @dev_id: The device ID.
  473. *
  474. * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
  475. */
  476. static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id)
  477. {
  478. return local_timer_interrupt();
  479. }
  480. #endif
  481. void __init smp_init_cpus(void)
  482. {
  483. int i;
  484. for (i = 0; i < NR_CPUS; i++) {
  485. set_cpu_possible(i, true);
  486. set_cpu_present(i, true);
  487. }
  488. }
  489. /**
  490. * smp_cpu_init - Initialise AP in start_secondary.
  491. *
  492. * For this Application Processor, set up init_mm, initialise FPU and set
  493. * interrupt level 0-6 setting.
  494. */
  495. static void __init smp_cpu_init(void)
  496. {
  497. unsigned long flags;
  498. int cpu_id = smp_processor_id();
  499. u16 tmp16;
  500. if (test_and_set_bit(cpu_id, &cpu_initialized)) {
  501. printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
  502. for (;;)
  503. local_irq_enable();
  504. }
  505. printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);
  506. atomic_inc(&init_mm.mm_count);
  507. current->active_mm = &init_mm;
  508. BUG_ON(current->mm);
  509. enter_lazy_tlb(&init_mm, current);
  510. /* Force FPU initialization */
  511. clear_using_fpu(current);
  512. GxICR(CALL_FUNC_SINGLE_IPI) = CALL_FUNCTION_GxICR_LV | GxICR_DETECT;
  513. mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
  514. GxICR(LOCAL_TIMER_IPI) = LOCAL_TIMER_GxICR_LV | GxICR_DETECT;
  515. mn10300_ipi_enable(LOCAL_TIMER_IPI);
  516. GxICR(RESCHEDULE_IPI) = RESCHEDULE_GxICR_LV | GxICR_DETECT;
  517. mn10300_ipi_enable(RESCHEDULE_IPI);
  518. #ifdef CONFIG_MN10300_CACHE_ENABLED
  519. GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
  520. mn10300_ipi_enable(FLUSH_CACHE_IPI);
  521. #endif
  522. mn10300_ipi_shutdown(SMP_BOOT_IRQ);
  523. /* Set up the non-maskable call function IPI */
  524. flags = arch_local_cli_save();
  525. GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
  526. tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
  527. arch_local_irq_restore(flags);
  528. }
  529. /**
  530. * smp_prepare_cpu_init - Initialise CPU in startup_secondary
  531. *
  532. * Set interrupt level 0-6 setting and init ICR of the kernel debugger.
  533. */
  534. void smp_prepare_cpu_init(void)
  535. {
  536. int loop;
  537. /* Set the interrupt vector registers */
  538. IVAR0 = EXCEP_IRQ_LEVEL0;
  539. IVAR1 = EXCEP_IRQ_LEVEL1;
  540. IVAR2 = EXCEP_IRQ_LEVEL2;
  541. IVAR3 = EXCEP_IRQ_LEVEL3;
  542. IVAR4 = EXCEP_IRQ_LEVEL4;
  543. IVAR5 = EXCEP_IRQ_LEVEL5;
  544. IVAR6 = EXCEP_IRQ_LEVEL6;
  545. /* Disable all interrupts and set to priority 6 (lowest) */
  546. for (loop = 0; loop < GxICR_NUM_IRQS; loop++)
  547. GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
  548. #ifdef CONFIG_KERNEL_DEBUGGER
  549. /* initialise the kernel debugger interrupt */
  550. do {
  551. unsigned long flags;
  552. u16 tmp16;
  553. flags = arch_local_cli_save();
  554. GxICR(DEBUGGER_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
  555. tmp16 = GxICR(DEBUGGER_NMI_IPI);
  556. arch_local_irq_restore(flags);
  557. } while (0);
  558. #endif
  559. }
  560. /**
  561. * start_secondary - Activate a secondary CPU (AP)
  562. * @unused: Thread parameter (ignored).
  563. */
  564. int __init start_secondary(void *unused)
  565. {
  566. smp_cpu_init();
  567. smp_callin();
  568. while (!cpumask_test_cpu(smp_processor_id(), &smp_commenced_mask))
  569. cpu_relax();
  570. local_flush_tlb();
  571. preempt_disable();
  572. smp_online();
  573. #ifdef CONFIG_GENERIC_CLOCKEVENTS
  574. init_clockevents();
  575. #endif
  576. cpu_idle();
  577. return 0;
  578. }
  579. /**
  580. * smp_prepare_cpus - Boot up secondary CPUs (APs)
  581. * @max_cpus: Maximum number of CPUs to boot.
  582. *
  583. * Call do_boot_cpu, and boot up APs.
  584. */
  585. void __init smp_prepare_cpus(unsigned int max_cpus)
  586. {
  587. int phy_id;
  588. /* Setup boot CPU information */
  589. smp_store_cpu_info(0);
  590. smp_tune_scheduling();
  591. init_ipi();
  592. /* If SMP should be disabled, then finish */
  593. if (max_cpus == 0) {
  594. printk(KERN_INFO "SMP mode deactivated.\n");
  595. goto smp_done;
  596. }
  597. /* Boot secondary CPUs (for which phy_id > 0) */
  598. for (phy_id = 0; phy_id < NR_CPUS; phy_id++) {
  599. /* Don't boot primary CPU */
  600. if (max_cpus <= cpucount + 1)
  601. continue;
  602. if (phy_id != 0)
  603. do_boot_cpu(phy_id);
  604. set_cpu_possible(phy_id, true);
  605. smp_show_cpu_info(phy_id);
  606. }
  607. smp_done:
  608. Dprintk("Boot done.\n");
  609. }
  610. /**
  611. * smp_store_cpu_info - Save a CPU's information
  612. * @cpu: The CPU to save for.
  613. *
  614. * Save boot_cpu_data and jiffy for the specified CPU.
  615. */
  616. static void __init smp_store_cpu_info(int cpu)
  617. {
  618. struct mn10300_cpuinfo *ci = &cpu_data[cpu];
  619. *ci = boot_cpu_data;
  620. ci->loops_per_jiffy = loops_per_jiffy;
  621. ci->type = CPUREV;
  622. }
  623. /**
  624. * smp_tune_scheduling - Set time slice value
  625. *
  626. * Nothing to do here.
  627. */
  628. static void __init smp_tune_scheduling(void)
  629. {
  630. }
  631. /**
  632. * do_boot_cpu: Boot up one CPU
  633. * @phy_id: Physical ID of CPU to boot.
  634. *
  635. * Send an IPI to a secondary CPU to boot it. Returns 0 on success, 1
  636. * otherwise.
  637. */
  638. static int __init do_boot_cpu(int phy_id)
  639. {
  640. struct task_struct *idle;
  641. unsigned long send_status, callin_status;
  642. int timeout, cpu_id;
  643. send_status = GxICR_REQUEST;
  644. callin_status = 0;
  645. timeout = 0;
  646. cpu_id = phy_id;
  647. cpucount++;
  648. /* Create idle thread for this CPU */
  649. idle = fork_idle(cpu_id);
  650. if (IS_ERR(idle))
  651. panic("Failed fork for CPU#%d.", cpu_id);
  652. idle->thread.pc = (unsigned long)start_secondary;
  653. printk(KERN_NOTICE "Booting CPU#%d\n", cpu_id);
  654. start_stack[cpu_id - 1] = idle->thread.sp;
  655. task_thread_info(idle)->cpu = cpu_id;
  656. /* Send boot IPI to AP */
  657. send_IPI_mask(cpumask_of(phy_id), SMP_BOOT_IRQ);
  658. Dprintk("Waiting for send to finish...\n");
  659. /* Wait for AP's IPI receive in 100[ms] */
  660. do {
  661. udelay(1000);
  662. send_status =
  663. CROSS_GxICR(SMP_BOOT_IRQ, phy_id) & GxICR_REQUEST;
  664. } while (send_status == GxICR_REQUEST && timeout++ < 100);
  665. Dprintk("Waiting for cpu_callin_map.\n");
  666. if (send_status == 0) {
  667. /* Allow AP to start initializing */
  668. cpumask_set_cpu(cpu_id, &cpu_callout_map);
  669. /* Wait for setting cpu_callin_map */
  670. timeout = 0;
  671. do {
  672. udelay(1000);
  673. callin_status = cpumask_test_cpu(cpu_id,
  674. &cpu_callin_map);
  675. } while (callin_status == 0 && timeout++ < 5000);
  676. if (callin_status == 0)
  677. Dprintk("Not responding.\n");
  678. } else {
  679. printk(KERN_WARNING "IPI not delivered.\n");
  680. }
  681. if (send_status == GxICR_REQUEST || callin_status == 0) {
  682. cpumask_clear_cpu(cpu_id, &cpu_callout_map);
  683. cpumask_clear_cpu(cpu_id, &cpu_callin_map);
  684. cpumask_clear_cpu(cpu_id, &cpu_initialized);
  685. cpucount--;
  686. return 1;
  687. }
  688. return 0;
  689. }
  690. /**
  691. * smp_show_cpu_info - Show SMP CPU information
  692. * @cpu: The CPU of interest.
  693. */
  694. static void __init smp_show_cpu_info(int cpu)
  695. {
  696. struct mn10300_cpuinfo *ci = &cpu_data[cpu];
  697. printk(KERN_INFO
  698. "CPU#%d : ioclk speed: %lu.%02luMHz : bogomips : %lu.%02lu\n",
  699. cpu,
  700. MN10300_IOCLK / 1000000,
  701. (MN10300_IOCLK / 10000) % 100,
  702. ci->loops_per_jiffy / (500000 / HZ),
  703. (ci->loops_per_jiffy / (5000 / HZ)) % 100);
  704. }
  705. /**
  706. * smp_callin - Set cpu_callin_map of the current CPU ID
  707. */
  708. static void __init smp_callin(void)
  709. {
  710. unsigned long timeout;
  711. int cpu;
  712. cpu = smp_processor_id();
  713. timeout = jiffies + (2 * HZ);
  714. if (cpumask_test_cpu(cpu, &cpu_callin_map)) {
  715. printk(KERN_ERR "CPU#%d already present.\n", cpu);
  716. BUG();
  717. }
  718. Dprintk("CPU#%d waiting for CALLOUT\n", cpu);
  719. /* Wait for AP startup 2s total */
  720. while (time_before(jiffies, timeout)) {
  721. if (cpumask_test_cpu(cpu, &cpu_callout_map))
  722. break;
  723. cpu_relax();
  724. }
  725. if (!time_before(jiffies, timeout)) {
  726. printk(KERN_ERR
  727. "BUG: CPU#%d started up but did not get a callout!\n",
  728. cpu);
  729. BUG();
  730. }
  731. #ifdef CONFIG_CALIBRATE_DELAY
  732. calibrate_delay(); /* Get our bogomips */
  733. #endif
  734. /* Save our processor parameters */
  735. smp_store_cpu_info(cpu);
  736. /* Allow the boot processor to continue */
  737. cpumask_set_cpu(cpu, &cpu_callin_map);
  738. }
  739. /**
  740. * smp_online - Set cpu_online_mask
  741. */
  742. static void __init smp_online(void)
  743. {
  744. int cpu;
  745. cpu = smp_processor_id();
  746. notify_cpu_starting(cpu);
  747. ipi_call_lock();
  748. set_cpu_online(cpu, true);
  749. ipi_call_unlock();
  750. local_irq_enable();
  751. }
  752. /**
  753. * smp_cpus_done -
  754. * @max_cpus: Maximum CPU count.
  755. *
  756. * Do nothing.
  757. */
  758. void __init smp_cpus_done(unsigned int max_cpus)
  759. {
  760. }
  761. /*
  762. * smp_prepare_boot_cpu - Set up stuff for the boot processor.
  763. *
  764. * Set up the cpu_online_mask, cpu_callout_map and cpu_callin_map of the boot
  765. * processor (CPU 0).
  766. */
  767. void __devinit smp_prepare_boot_cpu(void)
  768. {
  769. cpumask_set_cpu(0, &cpu_callout_map);
  770. cpumask_set_cpu(0, &cpu_callin_map);
  771. current_thread_info()->cpu = 0;
  772. }
  773. /*
  774. * initialize_secondary - Initialise a secondary CPU (Application Processor).
  775. *
  776. * Set SP register and jump to thread's PC address.
  777. */
  778. void initialize_secondary(void)
  779. {
  780. asm volatile (
  781. "mov %0,sp \n"
  782. "jmp (%1) \n"
  783. :
  784. : "a"(current->thread.sp), "a"(current->thread.pc));
  785. }
  786. /**
  787. * __cpu_up - Set smp_commenced_mask for the nominated CPU
  788. * @cpu: The target CPU.
  789. */
  790. int __devinit __cpu_up(unsigned int cpu)
  791. {
  792. int timeout;
  793. #ifdef CONFIG_HOTPLUG_CPU
  794. if (num_online_cpus() == 1)
  795. disable_hlt();
  796. if (sleep_mode[cpu])
  797. run_wakeup_cpu(cpu);
  798. #endif /* CONFIG_HOTPLUG_CPU */
  799. cpumask_set_cpu(cpu, &smp_commenced_mask);
  800. /* Wait 5s total for a response */
  801. for (timeout = 0 ; timeout < 5000 ; timeout++) {
  802. if (cpu_online(cpu))
  803. break;
  804. udelay(1000);
  805. }
  806. BUG_ON(!cpu_online(cpu));
  807. return 0;
  808. }
  809. /**
  810. * setup_profiling_timer - Set up the profiling timer
  811. * @multiplier - The frequency multiplier to use
  812. *
  813. * The frequency of the profiling timer can be changed by writing a multiplier
  814. * value into /proc/profile.
  815. */
  816. int setup_profiling_timer(unsigned int multiplier)
  817. {
  818. return -EINVAL;
  819. }
  820. /*
  821. * CPU hotplug routines
  822. */
  823. #ifdef CONFIG_HOTPLUG_CPU
  824. static DEFINE_PER_CPU(struct cpu, cpu_devices);
  825. static int __init topology_init(void)
  826. {
  827. int cpu, ret;
  828. for_each_cpu(cpu) {
  829. ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL);
  830. if (ret)
  831. printk(KERN_WARNING
  832. "topology_init: register_cpu %d failed (%d)\n",
  833. cpu, ret);
  834. }
  835. return 0;
  836. }
  837. subsys_initcall(topology_init);
  838. int __cpu_disable(void)
  839. {
  840. int cpu = smp_processor_id();
  841. if (cpu == 0)
  842. return -EBUSY;
  843. migrate_irqs();
  844. cpumask_clear_cpu(cpu, &mm_cpumask(current->active_mm));
  845. return 0;
  846. }
  847. void __cpu_die(unsigned int cpu)
  848. {
  849. run_sleep_cpu(cpu);
  850. if (num_online_cpus() == 1)
  851. enable_hlt();
  852. }
  853. #ifdef CONFIG_MN10300_CACHE_ENABLED
  854. static inline void hotplug_cpu_disable_cache(void)
  855. {
  856. int tmp;
  857. asm volatile(
  858. " movhu (%1),%0 \n"
  859. " and %2,%0 \n"
  860. " movhu %0,(%1) \n"
  861. "1: movhu (%1),%0 \n"
  862. " btst %3,%0 \n"
  863. " bne 1b \n"
  864. : "=&r"(tmp)
  865. : "a"(&CHCTR),
  866. "i"(~(CHCTR_ICEN | CHCTR_DCEN)),
  867. "i"(CHCTR_ICBUSY | CHCTR_DCBUSY)
  868. : "memory", "cc");
  869. }
  870. static inline void hotplug_cpu_enable_cache(void)
  871. {
  872. int tmp;
  873. asm volatile(
  874. "movhu (%1),%0 \n"
  875. "or %2,%0 \n"
  876. "movhu %0,(%1) \n"
  877. : "=&r"(tmp)
  878. : "a"(&CHCTR),
  879. "i"(CHCTR_ICEN | CHCTR_DCEN)
  880. : "memory", "cc");
  881. }
  882. static inline void hotplug_cpu_invalidate_cache(void)
  883. {
  884. int tmp;
  885. asm volatile (
  886. "movhu (%1),%0 \n"
  887. "or %2,%0 \n"
  888. "movhu %0,(%1) \n"
  889. : "=&r"(tmp)
  890. : "a"(&CHCTR),
  891. "i"(CHCTR_ICINV | CHCTR_DCINV)
  892. : "cc");
  893. }
  894. #else /* CONFIG_MN10300_CACHE_ENABLED */
  895. #define hotplug_cpu_disable_cache() do {} while (0)
  896. #define hotplug_cpu_enable_cache() do {} while (0)
  897. #define hotplug_cpu_invalidate_cache() do {} while (0)
  898. #endif /* CONFIG_MN10300_CACHE_ENABLED */
  899. /**
  900. * hotplug_cpu_nmi_call_function - Call a function on other CPUs for hotplug
  901. * @cpumask: List of target CPUs.
  902. * @func: The function to call on those CPUs.
  903. * @info: The context data for the function to be called.
  904. * @wait: Whether to wait for the calls to complete.
  905. *
  906. * Non-maskably call a function on another CPU for hotplug purposes.
  907. *
  908. * This function must be called with maskable interrupts disabled.
  909. */
  910. static int hotplug_cpu_nmi_call_function(cpumask_t cpumask,
  911. smp_call_func_t func, void *info,
  912. int wait)
  913. {
  914. /*
  915. * The address and the size of nmi_call_func_mask_data
  916. * need to be aligned on L1_CACHE_BYTES.
  917. */
  918. static struct nmi_call_data_struct nmi_call_func_mask_data
  919. __cacheline_aligned;
  920. unsigned long start, end;
  921. start = (unsigned long)&nmi_call_func_mask_data;
  922. end = start + sizeof(struct nmi_call_data_struct);
  923. nmi_call_func_mask_data.func = func;
  924. nmi_call_func_mask_data.info = info;
  925. nmi_call_func_mask_data.started = cpumask;
  926. nmi_call_func_mask_data.wait = wait;
  927. if (wait)
  928. nmi_call_func_mask_data.finished = cpumask;
  929. spin_lock(&smp_nmi_call_lock);
  930. nmi_call_data = &nmi_call_func_mask_data;
  931. mn10300_local_dcache_flush_range(start, end);
  932. smp_wmb();
  933. send_IPI_mask(cpumask, CALL_FUNCTION_NMI_IPI);
  934. do {
  935. mn10300_local_dcache_inv_range(start, end);
  936. barrier();
  937. } while (!cpumask_empty(&nmi_call_func_mask_data.started));
  938. if (wait) {
  939. do {
  940. mn10300_local_dcache_inv_range(start, end);
  941. barrier();
  942. } while (!cpumask_empty(&nmi_call_func_mask_data.finished));
  943. }
  944. spin_unlock(&smp_nmi_call_lock);
  945. return 0;
  946. }
  947. static void restart_wakeup_cpu(void)
  948. {
  949. unsigned int cpu = smp_processor_id();
  950. cpumask_set_cpu(cpu, &cpu_callin_map);
  951. local_flush_tlb();
  952. set_cpu_online(cpu, true);
  953. smp_wmb();
  954. }
  955. static void prepare_sleep_cpu(void *unused)
  956. {
  957. sleep_mode[smp_processor_id()] = 1;
  958. smp_mb();
  959. mn10300_local_dcache_flush_inv();
  960. hotplug_cpu_disable_cache();
  961. hotplug_cpu_invalidate_cache();
  962. }
  963. /* when this function called, IE=0, NMID=0. */
  964. static void sleep_cpu(void *unused)
  965. {
  966. unsigned int cpu_id = smp_processor_id();
  967. /*
  968. * CALL_FUNCTION_NMI_IPI for wakeup_cpu() shall not be requested,
  969. * before this cpu goes in SLEEP mode.
  970. */
  971. do {
  972. smp_mb();
  973. __sleep_cpu();
  974. } while (sleep_mode[cpu_id]);
  975. restart_wakeup_cpu();
  976. }
  977. static void run_sleep_cpu(unsigned int cpu)
  978. {
  979. unsigned long flags;
  980. cpumask_t cpumask;
  981. cpumask_copy(&cpumask, &cpumask_of(cpu));
  982. flags = arch_local_cli_save();
  983. hotplug_cpu_nmi_call_function(cpumask, prepare_sleep_cpu, NULL, 1);
  984. hotplug_cpu_nmi_call_function(cpumask, sleep_cpu, NULL, 0);
  985. udelay(1); /* delay for the cpu to sleep. */
  986. arch_local_irq_restore(flags);
  987. }
  988. static void wakeup_cpu(void)
  989. {
  990. hotplug_cpu_invalidate_cache();
  991. hotplug_cpu_enable_cache();
  992. smp_mb();
  993. sleep_mode[smp_processor_id()] = 0;
  994. }
  995. static void run_wakeup_cpu(unsigned int cpu)
  996. {
  997. unsigned long flags;
  998. flags = arch_local_cli_save();
  999. #if NR_CPUS == 2
  1000. mn10300_local_dcache_flush_inv();
  1001. #else
  1002. /*
  1003. * Before waking up the cpu,
  1004. * all online cpus should stop and flush D-Cache for global data.
  1005. */
  1006. #error not support NR_CPUS > 2, when CONFIG_HOTPLUG_CPU=y.
  1007. #endif
  1008. hotplug_cpu_nmi_call_function(cpumask_of(cpu), wakeup_cpu, NULL, 1);
  1009. arch_local_irq_restore(flags);
  1010. }
  1011. #endif /* CONFIG_HOTPLUG_CPU */