mn10300-serial.c 42 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711
  1. /* MN10300 On-chip serial port UART driver
  2. *
  3. * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public Licence
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the Licence, or (at your option) any later version.
  10. */
  11. static const char serial_name[] = "MN10300 Serial driver";
  12. static const char serial_version[] = "mn10300_serial-1.0";
  13. static const char serial_revdate[] = "2007-11-06";
  14. #if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  15. #define SUPPORT_SYSRQ
  16. #endif
  17. #include <linux/module.h>
  18. #include <linux/serial.h>
  19. #include <linux/circ_buf.h>
  20. #include <linux/errno.h>
  21. #include <linux/signal.h>
  22. #include <linux/sched.h>
  23. #include <linux/timer.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/tty.h>
  26. #include <linux/tty_flip.h>
  27. #include <linux/major.h>
  28. #include <linux/string.h>
  29. #include <linux/ioport.h>
  30. #include <linux/mm.h>
  31. #include <linux/slab.h>
  32. #include <linux/init.h>
  33. #include <linux/console.h>
  34. #include <linux/sysrq.h>
  35. #include <asm/io.h>
  36. #include <asm/irq.h>
  37. #include <asm/bitops.h>
  38. #include <asm/serial-regs.h>
  39. #include <unit/timex.h>
  40. #include "mn10300-serial.h"
  41. #ifdef CONFIG_SMP
  42. #undef GxICR
  43. #define GxICR(X) CROSS_GxICR(X, 0)
  44. #endif /* CONFIG_SMP */
  45. #define kenter(FMT, ...) \
  46. printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  47. #define _enter(FMT, ...) \
  48. no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  49. #define kdebug(FMT, ...) \
  50. printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  51. #define _debug(FMT, ...) \
  52. no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  53. #define kproto(FMT, ...) \
  54. printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  55. #define _proto(FMT, ...) \
  56. no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  57. #ifndef CODMSB
  58. /* c_cflag bit meaning */
  59. #define CODMSB 004000000000 /* change Transfer bit-order */
  60. #endif
  61. #define NR_UARTS 3
  62. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  63. static void mn10300_serial_console_write(struct console *co,
  64. const char *s, unsigned count);
  65. static int __init mn10300_serial_console_setup(struct console *co,
  66. char *options);
  67. static struct uart_driver mn10300_serial_driver;
  68. static struct console mn10300_serial_console = {
  69. .name = "ttySM",
  70. .write = mn10300_serial_console_write,
  71. .device = uart_console_device,
  72. .setup = mn10300_serial_console_setup,
  73. .flags = CON_PRINTBUFFER,
  74. .index = -1,
  75. .data = &mn10300_serial_driver,
  76. };
  77. #endif
  78. static struct uart_driver mn10300_serial_driver = {
  79. .owner = NULL,
  80. .driver_name = "mn10300-serial",
  81. .dev_name = "ttySM",
  82. .major = TTY_MAJOR,
  83. .minor = 128,
  84. .nr = NR_UARTS,
  85. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  86. .cons = &mn10300_serial_console,
  87. #endif
  88. };
  89. static unsigned int mn10300_serial_tx_empty(struct uart_port *);
  90. static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl);
  91. static unsigned int mn10300_serial_get_mctrl(struct uart_port *);
  92. static void mn10300_serial_stop_tx(struct uart_port *);
  93. static void mn10300_serial_start_tx(struct uart_port *);
  94. static void mn10300_serial_send_xchar(struct uart_port *, char ch);
  95. static void mn10300_serial_stop_rx(struct uart_port *);
  96. static void mn10300_serial_enable_ms(struct uart_port *);
  97. static void mn10300_serial_break_ctl(struct uart_port *, int ctl);
  98. static int mn10300_serial_startup(struct uart_port *);
  99. static void mn10300_serial_shutdown(struct uart_port *);
  100. static void mn10300_serial_set_termios(struct uart_port *,
  101. struct ktermios *new,
  102. struct ktermios *old);
  103. static const char *mn10300_serial_type(struct uart_port *);
  104. static void mn10300_serial_release_port(struct uart_port *);
  105. static int mn10300_serial_request_port(struct uart_port *);
  106. static void mn10300_serial_config_port(struct uart_port *, int);
  107. static int mn10300_serial_verify_port(struct uart_port *,
  108. struct serial_struct *);
  109. #ifdef CONFIG_CONSOLE_POLL
  110. static void mn10300_serial_poll_put_char(struct uart_port *, unsigned char);
  111. static int mn10300_serial_poll_get_char(struct uart_port *);
  112. #endif
  113. static const struct uart_ops mn10300_serial_ops = {
  114. .tx_empty = mn10300_serial_tx_empty,
  115. .set_mctrl = mn10300_serial_set_mctrl,
  116. .get_mctrl = mn10300_serial_get_mctrl,
  117. .stop_tx = mn10300_serial_stop_tx,
  118. .start_tx = mn10300_serial_start_tx,
  119. .send_xchar = mn10300_serial_send_xchar,
  120. .stop_rx = mn10300_serial_stop_rx,
  121. .enable_ms = mn10300_serial_enable_ms,
  122. .break_ctl = mn10300_serial_break_ctl,
  123. .startup = mn10300_serial_startup,
  124. .shutdown = mn10300_serial_shutdown,
  125. .set_termios = mn10300_serial_set_termios,
  126. .type = mn10300_serial_type,
  127. .release_port = mn10300_serial_release_port,
  128. .request_port = mn10300_serial_request_port,
  129. .config_port = mn10300_serial_config_port,
  130. .verify_port = mn10300_serial_verify_port,
  131. #ifdef CONFIG_CONSOLE_POLL
  132. .poll_put_char = mn10300_serial_poll_put_char,
  133. .poll_get_char = mn10300_serial_poll_get_char,
  134. #endif
  135. };
  136. static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id);
  137. /*
  138. * the first on-chip serial port: ttySM0 (aka SIF0)
  139. */
  140. #ifdef CONFIG_MN10300_TTYSM0
  141. struct mn10300_serial_port mn10300_serial_port_sif0 = {
  142. .uart.ops = &mn10300_serial_ops,
  143. .uart.membase = (void __iomem *) &SC0CTR,
  144. .uart.mapbase = (unsigned long) &SC0CTR,
  145. .uart.iotype = UPIO_MEM,
  146. .uart.irq = 0,
  147. .uart.uartclk = 0, /* MN10300_IOCLK, */
  148. .uart.fifosize = 1,
  149. .uart.flags = UPF_BOOT_AUTOCONF,
  150. .uart.line = 0,
  151. .uart.type = PORT_MN10300,
  152. .uart.lock =
  153. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock),
  154. .name = "ttySM0",
  155. ._iobase = &SC0CTR,
  156. ._control = &SC0CTR,
  157. ._status = (volatile u8 *)&SC0STR,
  158. ._intr = &SC0ICR,
  159. ._rxb = &SC0RXB,
  160. ._txb = &SC0TXB,
  161. .rx_name = "ttySM0:Rx",
  162. .tx_name = "ttySM0:Tx",
  163. #if defined(CONFIG_MN10300_TTYSM0_TIMER8)
  164. .tm_name = "ttySM0:Timer8",
  165. ._tmxmd = &TM8MD,
  166. ._tmxbr = &TM8BR,
  167. ._tmicr = &TM8ICR,
  168. .tm_irq = TM8IRQ,
  169. .div_timer = MNSCx_DIV_TIMER_16BIT,
  170. #elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
  171. .tm_name = "ttySM0:Timer0",
  172. ._tmxmd = &TM0MD,
  173. ._tmxbr = (volatile u16 *)&TM0BR,
  174. ._tmicr = &TM0ICR,
  175. .tm_irq = TM0IRQ,
  176. .div_timer = MNSCx_DIV_TIMER_8BIT,
  177. #elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
  178. .tm_name = "ttySM0:Timer2",
  179. ._tmxmd = &TM2MD,
  180. ._tmxbr = (volatile u16 *)&TM2BR,
  181. ._tmicr = &TM2ICR,
  182. .tm_irq = TM2IRQ,
  183. .div_timer = MNSCx_DIV_TIMER_8BIT,
  184. #else
  185. #error "Unknown config for ttySM0"
  186. #endif
  187. .rx_irq = SC0RXIRQ,
  188. .tx_irq = SC0TXIRQ,
  189. .rx_icr = &GxICR(SC0RXIRQ),
  190. .tx_icr = &GxICR(SC0TXIRQ),
  191. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  192. .options = 0,
  193. #ifdef CONFIG_GDBSTUB_ON_TTYSM0
  194. .gdbstub = 1,
  195. #endif
  196. };
  197. #endif /* CONFIG_MN10300_TTYSM0 */
  198. /*
  199. * the second on-chip serial port: ttySM1 (aka SIF1)
  200. */
  201. #ifdef CONFIG_MN10300_TTYSM1
  202. struct mn10300_serial_port mn10300_serial_port_sif1 = {
  203. .uart.ops = &mn10300_serial_ops,
  204. .uart.membase = (void __iomem *) &SC1CTR,
  205. .uart.mapbase = (unsigned long) &SC1CTR,
  206. .uart.iotype = UPIO_MEM,
  207. .uart.irq = 0,
  208. .uart.uartclk = 0, /* MN10300_IOCLK, */
  209. .uart.fifosize = 1,
  210. .uart.flags = UPF_BOOT_AUTOCONF,
  211. .uart.line = 1,
  212. .uart.type = PORT_MN10300,
  213. .uart.lock =
  214. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock),
  215. .name = "ttySM1",
  216. ._iobase = &SC1CTR,
  217. ._control = &SC1CTR,
  218. ._status = (volatile u8 *)&SC1STR,
  219. ._intr = &SC1ICR,
  220. ._rxb = &SC1RXB,
  221. ._txb = &SC1TXB,
  222. .rx_name = "ttySM1:Rx",
  223. .tx_name = "ttySM1:Tx",
  224. #if defined(CONFIG_MN10300_TTYSM1_TIMER9)
  225. .tm_name = "ttySM1:Timer9",
  226. ._tmxmd = &TM9MD,
  227. ._tmxbr = &TM9BR,
  228. ._tmicr = &TM9ICR,
  229. .tm_irq = TM9IRQ,
  230. .div_timer = MNSCx_DIV_TIMER_16BIT,
  231. #elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
  232. .tm_name = "ttySM1:Timer3",
  233. ._tmxmd = &TM3MD,
  234. ._tmxbr = (volatile u16 *)&TM3BR,
  235. ._tmicr = &TM3ICR,
  236. .tm_irq = TM3IRQ,
  237. .div_timer = MNSCx_DIV_TIMER_8BIT,
  238. #elif defined(CONFIG_MN10300_TTYSM1_TIMER12)
  239. .tm_name = "ttySM1/Timer12",
  240. ._tmxmd = &TM12MD,
  241. ._tmxbr = &TM12BR,
  242. ._tmicr = &TM12ICR,
  243. .tm_irq = TM12IRQ,
  244. .div_timer = MNSCx_DIV_TIMER_16BIT,
  245. #else
  246. #error "Unknown config for ttySM1"
  247. #endif
  248. .rx_irq = SC1RXIRQ,
  249. .tx_irq = SC1TXIRQ,
  250. .rx_icr = &GxICR(SC1RXIRQ),
  251. .tx_icr = &GxICR(SC1TXIRQ),
  252. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  253. .options = 0,
  254. #ifdef CONFIG_GDBSTUB_ON_TTYSM1
  255. .gdbstub = 1,
  256. #endif
  257. };
  258. #endif /* CONFIG_MN10300_TTYSM1 */
  259. /*
  260. * the third on-chip serial port: ttySM2 (aka SIF2)
  261. */
  262. #ifdef CONFIG_MN10300_TTYSM2
  263. struct mn10300_serial_port mn10300_serial_port_sif2 = {
  264. .uart.ops = &mn10300_serial_ops,
  265. .uart.membase = (void __iomem *) &SC2CTR,
  266. .uart.mapbase = (unsigned long) &SC2CTR,
  267. .uart.iotype = UPIO_MEM,
  268. .uart.irq = 0,
  269. .uart.uartclk = 0, /* MN10300_IOCLK, */
  270. .uart.fifosize = 1,
  271. .uart.flags = UPF_BOOT_AUTOCONF,
  272. .uart.line = 2,
  273. #ifdef CONFIG_MN10300_TTYSM2_CTS
  274. .uart.type = PORT_MN10300_CTS,
  275. #else
  276. .uart.type = PORT_MN10300,
  277. #endif
  278. .uart.lock =
  279. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock),
  280. .name = "ttySM2",
  281. ._iobase = &SC2CTR,
  282. ._control = &SC2CTR,
  283. ._status = (volatile u8 *)&SC2STR,
  284. ._intr = &SC2ICR,
  285. ._rxb = &SC2RXB,
  286. ._txb = &SC2TXB,
  287. .rx_name = "ttySM2:Rx",
  288. .tx_name = "ttySM2:Tx",
  289. #if defined(CONFIG_MN10300_TTYSM2_TIMER10)
  290. .tm_name = "ttySM2/Timer10",
  291. ._tmxmd = &TM10MD,
  292. ._tmxbr = &TM10BR,
  293. ._tmicr = &TM10ICR,
  294. .tm_irq = TM10IRQ,
  295. .div_timer = MNSCx_DIV_TIMER_16BIT,
  296. #elif defined(CONFIG_MN10300_TTYSM2_TIMER9)
  297. .tm_name = "ttySM2/Timer9",
  298. ._tmxmd = &TM9MD,
  299. ._tmxbr = &TM9BR,
  300. ._tmicr = &TM9ICR,
  301. .tm_irq = TM9IRQ,
  302. .div_timer = MNSCx_DIV_TIMER_16BIT,
  303. #elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
  304. .tm_name = "ttySM2/Timer1",
  305. ._tmxmd = &TM1MD,
  306. ._tmxbr = (volatile u16 *)&TM1BR,
  307. ._tmicr = &TM1ICR,
  308. .tm_irq = TM1IRQ,
  309. .div_timer = MNSCx_DIV_TIMER_8BIT,
  310. #elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
  311. .tm_name = "ttySM2/Timer3",
  312. ._tmxmd = &TM3MD,
  313. ._tmxbr = (volatile u16 *)&TM3BR,
  314. ._tmicr = &TM3ICR,
  315. .tm_irq = TM3IRQ,
  316. .div_timer = MNSCx_DIV_TIMER_8BIT,
  317. #else
  318. #error "Unknown config for ttySM2"
  319. #endif
  320. .rx_irq = SC2RXIRQ,
  321. .tx_irq = SC2TXIRQ,
  322. .rx_icr = &GxICR(SC2RXIRQ),
  323. .tx_icr = &GxICR(SC2TXIRQ),
  324. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  325. #ifdef CONFIG_MN10300_TTYSM2_CTS
  326. .options = MNSCx_OPT_CTS,
  327. #else
  328. .options = 0,
  329. #endif
  330. #ifdef CONFIG_GDBSTUB_ON_TTYSM2
  331. .gdbstub = 1,
  332. #endif
  333. };
  334. #endif /* CONFIG_MN10300_TTYSM2 */
  335. /*
  336. * list of available serial ports
  337. */
  338. struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = {
  339. #ifdef CONFIG_MN10300_TTYSM0
  340. [0] = &mn10300_serial_port_sif0,
  341. #endif
  342. #ifdef CONFIG_MN10300_TTYSM1
  343. [1] = &mn10300_serial_port_sif1,
  344. #endif
  345. #ifdef CONFIG_MN10300_TTYSM2
  346. [2] = &mn10300_serial_port_sif2,
  347. #endif
  348. [NR_UARTS] = NULL,
  349. };
  350. /*
  351. * we abuse the serial ports' baud timers' interrupt lines to get the ability
  352. * to deliver interrupts to userspace as we use the ports' interrupt lines to
  353. * do virtual DMA on account of the ports having no hardware FIFOs
  354. *
  355. * we can generate an interrupt manually in the assembly stubs by writing to
  356. * the enable and detect bits in the interrupt control register, so all we need
  357. * to do here is disable the interrupt line
  358. *
  359. * note that we can't just leave the line enabled as the baud rate timer *also*
  360. * generates interrupts
  361. */
  362. static void mn10300_serial_mask_ack(unsigned int irq)
  363. {
  364. unsigned long flags;
  365. u16 tmp;
  366. flags = arch_local_cli_save();
  367. GxICR(irq) = GxICR_LEVEL_6;
  368. tmp = GxICR(irq); /* flush write buffer */
  369. arch_local_irq_restore(flags);
  370. }
  371. static void mn10300_serial_chip_mask_ack(struct irq_data *d)
  372. {
  373. mn10300_serial_mask_ack(d->irq);
  374. }
  375. static void mn10300_serial_nop(struct irq_data *d)
  376. {
  377. }
  378. static struct irq_chip mn10300_serial_pic = {
  379. .name = "mnserial",
  380. .irq_ack = mn10300_serial_chip_mask_ack,
  381. .irq_mask = mn10300_serial_chip_mask_ack,
  382. .irq_mask_ack = mn10300_serial_chip_mask_ack,
  383. .irq_unmask = mn10300_serial_nop,
  384. };
  385. /*
  386. * serial virtual DMA interrupt jump table
  387. */
  388. struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS];
  389. static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port)
  390. {
  391. unsigned long flags;
  392. u16 x;
  393. flags = arch_local_cli_save();
  394. *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
  395. x = *port->tx_icr;
  396. arch_local_irq_restore(flags);
  397. }
  398. static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port)
  399. {
  400. unsigned long flags;
  401. u16 x;
  402. flags = arch_local_cli_save();
  403. *port->tx_icr =
  404. NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL) | GxICR_ENABLE;
  405. x = *port->tx_icr;
  406. arch_local_irq_restore(flags);
  407. }
  408. static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port)
  409. {
  410. unsigned long flags;
  411. u16 x;
  412. flags = arch_local_cli_save();
  413. *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
  414. x = *port->rx_icr;
  415. arch_local_irq_restore(flags);
  416. }
  417. /*
  418. * multi-bit equivalent of test_and_clear_bit()
  419. */
  420. static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
  421. {
  422. u32 epsw;
  423. asm volatile(" bclr %1,(%2) \n"
  424. " mov epsw,%0 \n"
  425. : "=d"(epsw) : "d"(mask), "a"(ptr)
  426. : "cc", "memory");
  427. return !(epsw & EPSW_FLAG_Z);
  428. }
  429. /*
  430. * receive chars from the ring buffer for this serial port
  431. * - must do break detection here (not done in the UART)
  432. */
  433. static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port)
  434. {
  435. struct uart_icount *icount = &port->uart.icount;
  436. struct tty_struct *tty = port->uart.state->port.tty;
  437. unsigned ix;
  438. int count;
  439. u8 st, ch, push, status, overrun;
  440. _enter("%s", port->name);
  441. push = 0;
  442. count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE);
  443. count = tty_buffer_request_room(tty, count);
  444. if (count == 0) {
  445. if (!tty->low_latency)
  446. tty_flip_buffer_push(tty);
  447. return;
  448. }
  449. try_again:
  450. /* pull chars out of the hat */
  451. ix = port->rx_outp;
  452. if (ix == port->rx_inp) {
  453. if (push && !tty->low_latency)
  454. tty_flip_buffer_push(tty);
  455. return;
  456. }
  457. ch = port->rx_buffer[ix++];
  458. st = port->rx_buffer[ix++];
  459. smp_rmb();
  460. port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
  461. port->uart.icount.rx++;
  462. st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF;
  463. status = 0;
  464. overrun = 0;
  465. /* the UART doesn't detect BREAK, so we have to do that ourselves
  466. * - it starts as a framing error on a NUL character
  467. * - then we count another two NUL characters before issuing TTY_BREAK
  468. * - then we end on a normal char or one that has all the bottom bits
  469. * zero and the top bits set
  470. */
  471. switch (port->rx_brk) {
  472. case 0:
  473. /* not breaking at the moment */
  474. break;
  475. case 1:
  476. if (st & SC01STR_FEF && ch == 0) {
  477. port->rx_brk = 2;
  478. goto try_again;
  479. }
  480. goto not_break;
  481. case 2:
  482. if (st & SC01STR_FEF && ch == 0) {
  483. port->rx_brk = 3;
  484. _proto("Rx Break Detected");
  485. icount->brk++;
  486. if (uart_handle_break(&port->uart))
  487. goto ignore_char;
  488. status |= 1 << TTY_BREAK;
  489. goto insert;
  490. }
  491. goto not_break;
  492. default:
  493. if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
  494. goto try_again; /* still breaking */
  495. port->rx_brk = 0; /* end of the break */
  496. switch (ch) {
  497. case 0xFF:
  498. case 0xFE:
  499. case 0xFC:
  500. case 0xF8:
  501. case 0xF0:
  502. case 0xE0:
  503. case 0xC0:
  504. case 0x80:
  505. case 0x00:
  506. /* discard char at probable break end */
  507. goto try_again;
  508. }
  509. break;
  510. }
  511. process_errors:
  512. /* handle framing error */
  513. if (st & SC01STR_FEF) {
  514. if (ch == 0) {
  515. /* framing error with NUL char is probably a BREAK */
  516. port->rx_brk = 1;
  517. goto try_again;
  518. }
  519. _proto("Rx Framing Error");
  520. icount->frame++;
  521. status |= 1 << TTY_FRAME;
  522. }
  523. /* handle parity error */
  524. if (st & SC01STR_PEF) {
  525. _proto("Rx Parity Error");
  526. icount->parity++;
  527. status = TTY_PARITY;
  528. }
  529. /* handle normal char */
  530. if (status == 0) {
  531. if (uart_handle_sysrq_char(&port->uart, ch))
  532. goto ignore_char;
  533. status = (1 << TTY_NORMAL);
  534. }
  535. /* handle overrun error */
  536. if (st & SC01STR_OEF) {
  537. if (port->rx_brk)
  538. goto try_again;
  539. _proto("Rx Overrun Error");
  540. icount->overrun++;
  541. overrun = 1;
  542. }
  543. insert:
  544. status &= port->uart.read_status_mask;
  545. if (!overrun && !(status & port->uart.ignore_status_mask)) {
  546. int flag;
  547. if (status & (1 << TTY_BREAK))
  548. flag = TTY_BREAK;
  549. else if (status & (1 << TTY_PARITY))
  550. flag = TTY_PARITY;
  551. else if (status & (1 << TTY_FRAME))
  552. flag = TTY_FRAME;
  553. else
  554. flag = TTY_NORMAL;
  555. tty_insert_flip_char(tty, ch, flag);
  556. }
  557. /* overrun is special, since it's reported immediately, and doesn't
  558. * affect the current character
  559. */
  560. if (overrun)
  561. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  562. count--;
  563. if (count <= 0) {
  564. if (!tty->low_latency)
  565. tty_flip_buffer_push(tty);
  566. return;
  567. }
  568. ignore_char:
  569. push = 1;
  570. goto try_again;
  571. not_break:
  572. port->rx_brk = 0;
  573. goto process_errors;
  574. }
  575. /*
  576. * handle an interrupt from the serial transmission "virtual DMA" driver
  577. * - note: the interrupt routine will disable its own interrupts when the Tx
  578. * buffer is empty
  579. */
  580. static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port)
  581. {
  582. _enter("%s", port->name);
  583. if (!port->uart.state || !port->uart.state->port.tty) {
  584. mn10300_serial_dis_tx_intr(port);
  585. return;
  586. }
  587. if (uart_tx_stopped(&port->uart) ||
  588. uart_circ_empty(&port->uart.state->xmit))
  589. mn10300_serial_dis_tx_intr(port);
  590. if (uart_circ_chars_pending(&port->uart.state->xmit) < WAKEUP_CHARS)
  591. uart_write_wakeup(&port->uart);
  592. }
  593. /*
  594. * deal with a change in the status of the CTS line
  595. */
  596. static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st)
  597. {
  598. u16 ctr;
  599. port->tx_cts = st;
  600. port->uart.icount.cts++;
  601. /* flip the CTS state selector flag to interrupt when it changes
  602. * back */
  603. ctr = *port->_control;
  604. ctr ^= SC2CTR_TWS;
  605. *port->_control = ctr;
  606. uart_handle_cts_change(&port->uart, st & SC2STR_CTS);
  607. wake_up_interruptible(&port->uart.state->port.delta_msr_wait);
  608. }
  609. /*
  610. * handle a virtual interrupt generated by the lower level "virtual DMA"
  611. * routines (irq is the baud timer interrupt)
  612. */
  613. static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id)
  614. {
  615. struct mn10300_serial_port *port = dev_id;
  616. u8 st;
  617. spin_lock(&port->uart.lock);
  618. if (port->intr_flags) {
  619. _debug("INT %s: %x", port->name, port->intr_flags);
  620. if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL))
  621. mn10300_serial_receive_interrupt(port);
  622. if (mask_test_and_clear(&port->intr_flags,
  623. MNSCx_TX_SPACE | MNSCx_TX_EMPTY))
  624. mn10300_serial_transmit_interrupt(port);
  625. }
  626. /* the only modem control line amongst the whole lot is CTS on
  627. * serial port 2 */
  628. if (port->type == PORT_MN10300_CTS) {
  629. st = *port->_status;
  630. if ((port->tx_cts ^ st) & SC2STR_CTS)
  631. mn10300_serial_cts_changed(port, st);
  632. }
  633. spin_unlock(&port->uart.lock);
  634. return IRQ_HANDLED;
  635. }
  636. /*
  637. * return indication of whether the hardware transmit buffer is empty
  638. */
  639. static unsigned int mn10300_serial_tx_empty(struct uart_port *_port)
  640. {
  641. struct mn10300_serial_port *port =
  642. container_of(_port, struct mn10300_serial_port, uart);
  643. _enter("%s", port->name);
  644. return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ?
  645. 0 : TIOCSER_TEMT;
  646. }
  647. /*
  648. * set the modem control lines (we don't have any)
  649. */
  650. static void mn10300_serial_set_mctrl(struct uart_port *_port,
  651. unsigned int mctrl)
  652. {
  653. struct mn10300_serial_port *port __attribute__ ((unused)) =
  654. container_of(_port, struct mn10300_serial_port, uart);
  655. _enter("%s,%x", port->name, mctrl);
  656. }
  657. /*
  658. * get the modem control line statuses
  659. */
  660. static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port)
  661. {
  662. struct mn10300_serial_port *port =
  663. container_of(_port, struct mn10300_serial_port, uart);
  664. _enter("%s", port->name);
  665. if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS))
  666. return TIOCM_CAR | TIOCM_DSR;
  667. return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
  668. }
  669. /*
  670. * stop transmitting characters
  671. */
  672. static void mn10300_serial_stop_tx(struct uart_port *_port)
  673. {
  674. struct mn10300_serial_port *port =
  675. container_of(_port, struct mn10300_serial_port, uart);
  676. _enter("%s", port->name);
  677. /* disable the virtual DMA */
  678. mn10300_serial_dis_tx_intr(port);
  679. }
  680. /*
  681. * start transmitting characters
  682. * - jump-start transmission if it has stalled
  683. * - enable the serial Tx interrupt (used by the virtual DMA controller)
  684. * - force an interrupt to happen if necessary
  685. */
  686. static void mn10300_serial_start_tx(struct uart_port *_port)
  687. {
  688. struct mn10300_serial_port *port =
  689. container_of(_port, struct mn10300_serial_port, uart);
  690. u16 x;
  691. _enter("%s{%lu}",
  692. port->name,
  693. CIRC_CNT(&port->uart.state->xmit.head,
  694. &port->uart.state->xmit.tail,
  695. UART_XMIT_SIZE));
  696. /* kick the virtual DMA controller */
  697. arch_local_cli();
  698. x = *port->tx_icr;
  699. x |= GxICR_ENABLE;
  700. if (*port->_status & SC01STR_TBF)
  701. x &= ~(GxICR_REQUEST | GxICR_DETECT);
  702. else
  703. x |= GxICR_REQUEST | GxICR_DETECT;
  704. _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx",
  705. *port->_control, *port->_intr, *port->_status,
  706. *port->_tmxmd,
  707. (port->div_timer == MNSCx_DIV_TIMER_8BIT) ?
  708. *(volatile u8 *)port->_tmxbr : *port->_tmxbr,
  709. *port->tx_icr);
  710. *port->tx_icr = x;
  711. x = *port->tx_icr;
  712. arch_local_sti();
  713. }
  714. /*
  715. * transmit a high-priority XON/XOFF character
  716. */
  717. static void mn10300_serial_send_xchar(struct uart_port *_port, char ch)
  718. {
  719. struct mn10300_serial_port *port =
  720. container_of(_port, struct mn10300_serial_port, uart);
  721. _enter("%s,%02x", port->name, ch);
  722. if (likely(port->gdbstub)) {
  723. port->tx_xchar = ch;
  724. if (ch)
  725. mn10300_serial_en_tx_intr(port);
  726. }
  727. }
  728. /*
  729. * stop receiving characters
  730. * - called whilst the port is being closed
  731. */
  732. static void mn10300_serial_stop_rx(struct uart_port *_port)
  733. {
  734. struct mn10300_serial_port *port =
  735. container_of(_port, struct mn10300_serial_port, uart);
  736. u16 ctr;
  737. _enter("%s", port->name);
  738. ctr = *port->_control;
  739. ctr &= ~SC01CTR_RXE;
  740. *port->_control = ctr;
  741. mn10300_serial_dis_rx_intr(port);
  742. }
  743. /*
  744. * enable modem status interrupts
  745. */
  746. static void mn10300_serial_enable_ms(struct uart_port *_port)
  747. {
  748. struct mn10300_serial_port *port =
  749. container_of(_port, struct mn10300_serial_port, uart);
  750. u16 ctr, cts;
  751. _enter("%s", port->name);
  752. if (port->type == PORT_MN10300_CTS) {
  753. /* want to interrupt when CTS goes low if CTS is now high and
  754. * vice versa
  755. */
  756. port->tx_cts = *port->_status;
  757. cts = (port->tx_cts & SC2STR_CTS) ?
  758. SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS;
  759. ctr = *port->_control;
  760. ctr &= ~SC2CTR_TWS;
  761. ctr |= cts;
  762. *port->_control = ctr;
  763. mn10300_serial_en_tx_intr(port);
  764. }
  765. }
  766. /*
  767. * transmit or cease transmitting a break signal
  768. */
  769. static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl)
  770. {
  771. struct mn10300_serial_port *port =
  772. container_of(_port, struct mn10300_serial_port, uart);
  773. _enter("%s,%d", port->name, ctl);
  774. if (ctl) {
  775. /* tell the virtual DMA handler to assert BREAK */
  776. port->tx_break = 1;
  777. mn10300_serial_en_tx_intr(port);
  778. } else {
  779. port->tx_break = 0;
  780. *port->_control &= ~SC01CTR_BKE;
  781. mn10300_serial_en_tx_intr(port);
  782. }
  783. }
  784. /*
  785. * grab the interrupts and enable the port for reception
  786. */
  787. static int mn10300_serial_startup(struct uart_port *_port)
  788. {
  789. struct mn10300_serial_port *port =
  790. container_of(_port, struct mn10300_serial_port, uart);
  791. struct mn10300_serial_int *pint;
  792. _enter("%s{%d}", port->name, port->gdbstub);
  793. if (unlikely(port->gdbstub))
  794. return -EBUSY;
  795. /* allocate an Rx buffer for the virtual DMA handler */
  796. port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL);
  797. if (!port->rx_buffer)
  798. return -ENOMEM;
  799. port->rx_inp = port->rx_outp = 0;
  800. /* finally, enable the device */
  801. *port->_intr = SC01ICR_TI;
  802. *port->_control |= SC01CTR_TXE | SC01CTR_RXE;
  803. pint = &mn10300_serial_int_tbl[port->rx_irq];
  804. pint->port = port;
  805. pint->vdma = mn10300_serial_vdma_rx_handler;
  806. pint = &mn10300_serial_int_tbl[port->tx_irq];
  807. pint->port = port;
  808. pint->vdma = mn10300_serial_vdma_tx_handler;
  809. set_intr_level(port->rx_irq,
  810. NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
  811. set_intr_level(port->tx_irq,
  812. NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
  813. irq_set_chip(port->tm_irq, &mn10300_serial_pic);
  814. if (request_irq(port->rx_irq, mn10300_serial_interrupt,
  815. IRQF_DISABLED, port->rx_name, port) < 0)
  816. goto error;
  817. if (request_irq(port->tx_irq, mn10300_serial_interrupt,
  818. IRQF_DISABLED, port->tx_name, port) < 0)
  819. goto error2;
  820. if (request_irq(port->tm_irq, mn10300_serial_interrupt,
  821. IRQF_DISABLED, port->tm_name, port) < 0)
  822. goto error3;
  823. mn10300_serial_mask_ack(port->tm_irq);
  824. return 0;
  825. error3:
  826. free_irq(port->tx_irq, port);
  827. error2:
  828. free_irq(port->rx_irq, port);
  829. error:
  830. kfree(port->rx_buffer);
  831. port->rx_buffer = NULL;
  832. return -EBUSY;
  833. }
  834. /*
  835. * shutdown the port and release interrupts
  836. */
  837. static void mn10300_serial_shutdown(struct uart_port *_port)
  838. {
  839. u16 x;
  840. struct mn10300_serial_port *port =
  841. container_of(_port, struct mn10300_serial_port, uart);
  842. _enter("%s", port->name);
  843. /* disable the serial port and its baud rate timer */
  844. port->tx_break = 0;
  845. *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
  846. *port->_tmxmd = 0;
  847. if (port->rx_buffer) {
  848. void *buf = port->rx_buffer;
  849. port->rx_buffer = NULL;
  850. kfree(buf);
  851. }
  852. /* disable all intrs */
  853. free_irq(port->tm_irq, port);
  854. free_irq(port->rx_irq, port);
  855. free_irq(port->tx_irq, port);
  856. arch_local_cli();
  857. *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
  858. x = *port->rx_icr;
  859. *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
  860. x = *port->tx_icr;
  861. arch_local_sti();
  862. }
  863. /*
  864. * this routine is called to set the UART divisor registers to match the
  865. * specified baud rate for a serial port.
  866. */
  867. static void mn10300_serial_change_speed(struct mn10300_serial_port *port,
  868. struct ktermios *new,
  869. struct ktermios *old)
  870. {
  871. unsigned long flags;
  872. unsigned long ioclk = port->ioclk;
  873. unsigned cflag;
  874. int baud, bits, xdiv, tmp;
  875. u16 tmxbr, scxctr;
  876. u8 tmxmd, battempt;
  877. u8 div_timer = port->div_timer;
  878. _enter("%s{%lu}", port->name, ioclk);
  879. /* byte size and parity */
  880. cflag = new->c_cflag;
  881. switch (cflag & CSIZE) {
  882. case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9; break;
  883. case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
  884. default: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
  885. }
  886. if (cflag & CSTOPB) {
  887. scxctr |= SC01CTR_STB_2BIT;
  888. bits++;
  889. }
  890. if (cflag & PARENB) {
  891. bits++;
  892. if (cflag & PARODD)
  893. scxctr |= SC01CTR_PB_ODD;
  894. #ifdef CMSPAR
  895. else if (cflag & CMSPAR)
  896. scxctr |= SC01CTR_PB_FIXED0;
  897. #endif
  898. else
  899. scxctr |= SC01CTR_PB_EVEN;
  900. }
  901. /* Determine divisor based on baud rate */
  902. battempt = 0;
  903. switch (port->uart.line) {
  904. #ifdef CONFIG_MN10300_TTYSM0
  905. case 0: /* ttySM0 */
  906. #if defined(CONFIG_MN10300_TTYSM0_TIMER8)
  907. scxctr |= SC0CTR_CK_TM8UFLOW_8;
  908. #elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
  909. scxctr |= SC0CTR_CK_TM0UFLOW_8;
  910. #elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
  911. scxctr |= SC0CTR_CK_TM2UFLOW_8;
  912. #else
  913. #error "Unknown config for ttySM0"
  914. #endif
  915. break;
  916. #endif /* CONFIG_MN10300_TTYSM0 */
  917. #ifdef CONFIG_MN10300_TTYSM1
  918. case 1: /* ttySM1 */
  919. #if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
  920. #if defined(CONFIG_MN10300_TTYSM1_TIMER9)
  921. scxctr |= SC1CTR_CK_TM9UFLOW_8;
  922. #elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
  923. scxctr |= SC1CTR_CK_TM3UFLOW_8;
  924. #else
  925. #error "Unknown config for ttySM1"
  926. #endif
  927. #else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
  928. #if defined(CONFIG_MN10300_TTYSM1_TIMER12)
  929. scxctr |= SC1CTR_CK_TM12UFLOW_8;
  930. #else
  931. #error "Unknown config for ttySM1"
  932. #endif
  933. #endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
  934. break;
  935. #endif /* CONFIG_MN10300_TTYSM1 */
  936. #ifdef CONFIG_MN10300_TTYSM2
  937. case 2: /* ttySM2 */
  938. #if defined(CONFIG_AM33_2)
  939. #if defined(CONFIG_MN10300_TTYSM2_TIMER10)
  940. scxctr |= SC2CTR_CK_TM10UFLOW;
  941. #else
  942. #error "Unknown config for ttySM2"
  943. #endif
  944. #else /* CONFIG_AM33_2 */
  945. #if defined(CONFIG_MN10300_TTYSM2_TIMER9)
  946. scxctr |= SC2CTR_CK_TM9UFLOW_8;
  947. #elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
  948. scxctr |= SC2CTR_CK_TM1UFLOW_8;
  949. #elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
  950. scxctr |= SC2CTR_CK_TM3UFLOW_8;
  951. #else
  952. #error "Unknown config for ttySM2"
  953. #endif
  954. #endif /* CONFIG_AM33_2 */
  955. break;
  956. #endif /* CONFIG_MN10300_TTYSM2 */
  957. default:
  958. break;
  959. }
  960. try_alternative:
  961. baud = uart_get_baud_rate(&port->uart, new, old, 0,
  962. port->ioclk / 8);
  963. _debug("ALT %d [baud %d]", battempt, baud);
  964. if (!baud)
  965. baud = 9600; /* B0 transition handled in rs_set_termios */
  966. xdiv = 1;
  967. if (baud == 134) {
  968. baud = 269; /* 134 is really 134.5 */
  969. xdiv = 2;
  970. }
  971. if (baud == 38400 &&
  972. (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST
  973. ) {
  974. _debug("CUSTOM %u", port->uart.custom_divisor);
  975. if (div_timer == MNSCx_DIV_TIMER_16BIT) {
  976. if (port->uart.custom_divisor <= 65535) {
  977. tmxmd = TM8MD_SRC_IOCLK;
  978. tmxbr = port->uart.custom_divisor;
  979. port->uart.uartclk = ioclk;
  980. goto timer_okay;
  981. }
  982. if (port->uart.custom_divisor / 8 <= 65535) {
  983. tmxmd = TM8MD_SRC_IOCLK_8;
  984. tmxbr = port->uart.custom_divisor / 8;
  985. port->uart.custom_divisor = tmxbr * 8;
  986. port->uart.uartclk = ioclk / 8;
  987. goto timer_okay;
  988. }
  989. if (port->uart.custom_divisor / 32 <= 65535) {
  990. tmxmd = TM8MD_SRC_IOCLK_32;
  991. tmxbr = port->uart.custom_divisor / 32;
  992. port->uart.custom_divisor = tmxbr * 32;
  993. port->uart.uartclk = ioclk / 32;
  994. goto timer_okay;
  995. }
  996. } else if (div_timer == MNSCx_DIV_TIMER_8BIT) {
  997. if (port->uart.custom_divisor <= 255) {
  998. tmxmd = TM2MD_SRC_IOCLK;
  999. tmxbr = port->uart.custom_divisor;
  1000. port->uart.uartclk = ioclk;
  1001. goto timer_okay;
  1002. }
  1003. if (port->uart.custom_divisor / 8 <= 255) {
  1004. tmxmd = TM2MD_SRC_IOCLK_8;
  1005. tmxbr = port->uart.custom_divisor / 8;
  1006. port->uart.custom_divisor = tmxbr * 8;
  1007. port->uart.uartclk = ioclk / 8;
  1008. goto timer_okay;
  1009. }
  1010. if (port->uart.custom_divisor / 32 <= 255) {
  1011. tmxmd = TM2MD_SRC_IOCLK_32;
  1012. tmxbr = port->uart.custom_divisor / 32;
  1013. port->uart.custom_divisor = tmxbr * 32;
  1014. port->uart.uartclk = ioclk / 32;
  1015. goto timer_okay;
  1016. }
  1017. }
  1018. }
  1019. switch (div_timer) {
  1020. case MNSCx_DIV_TIMER_16BIT:
  1021. port->uart.uartclk = ioclk;
  1022. tmxmd = TM8MD_SRC_IOCLK;
  1023. tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
  1024. if (tmp > 0 && tmp <= 65535)
  1025. goto timer_okay;
  1026. port->uart.uartclk = ioclk / 8;
  1027. tmxmd = TM8MD_SRC_IOCLK_8;
  1028. tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
  1029. if (tmp > 0 && tmp <= 65535)
  1030. goto timer_okay;
  1031. port->uart.uartclk = ioclk / 32;
  1032. tmxmd = TM8MD_SRC_IOCLK_32;
  1033. tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
  1034. if (tmp > 0 && tmp <= 65535)
  1035. goto timer_okay;
  1036. break;
  1037. case MNSCx_DIV_TIMER_8BIT:
  1038. port->uart.uartclk = ioclk;
  1039. tmxmd = TM2MD_SRC_IOCLK;
  1040. tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
  1041. if (tmp > 0 && tmp <= 255)
  1042. goto timer_okay;
  1043. port->uart.uartclk = ioclk / 8;
  1044. tmxmd = TM2MD_SRC_IOCLK_8;
  1045. tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
  1046. if (tmp > 0 && tmp <= 255)
  1047. goto timer_okay;
  1048. port->uart.uartclk = ioclk / 32;
  1049. tmxmd = TM2MD_SRC_IOCLK_32;
  1050. tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
  1051. if (tmp > 0 && tmp <= 255)
  1052. goto timer_okay;
  1053. break;
  1054. default:
  1055. BUG();
  1056. return;
  1057. }
  1058. /* refuse to change to a baud rate we can't support */
  1059. _debug("CAN'T SUPPORT");
  1060. switch (battempt) {
  1061. case 0:
  1062. if (old) {
  1063. new->c_cflag &= ~CBAUD;
  1064. new->c_cflag |= (old->c_cflag & CBAUD);
  1065. battempt = 1;
  1066. goto try_alternative;
  1067. }
  1068. case 1:
  1069. /* as a last resort, if the quotient is zero, default to 9600
  1070. * bps */
  1071. new->c_cflag &= ~CBAUD;
  1072. new->c_cflag |= B9600;
  1073. battempt = 2;
  1074. goto try_alternative;
  1075. default:
  1076. /* hmmm... can't seem to support 9600 either
  1077. * - we could try iterating through the speeds we know about to
  1078. * find the lowest
  1079. */
  1080. new->c_cflag &= ~CBAUD;
  1081. new->c_cflag |= B0;
  1082. if (div_timer == MNSCx_DIV_TIMER_16BIT)
  1083. tmxmd = TM8MD_SRC_IOCLK_32;
  1084. else if (div_timer == MNSCx_DIV_TIMER_8BIT)
  1085. tmxmd = TM2MD_SRC_IOCLK_32;
  1086. tmxbr = 1;
  1087. port->uart.uartclk = ioclk / 32;
  1088. break;
  1089. }
  1090. timer_okay:
  1091. _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr);
  1092. /* make the changes */
  1093. spin_lock_irqsave(&port->uart.lock, flags);
  1094. uart_update_timeout(&port->uart, new->c_cflag, baud);
  1095. /* set the timer to produce the required baud rate */
  1096. switch (div_timer) {
  1097. case MNSCx_DIV_TIMER_16BIT:
  1098. *port->_tmxmd = 0;
  1099. *port->_tmxbr = tmxbr;
  1100. *port->_tmxmd = TM8MD_INIT_COUNTER;
  1101. *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
  1102. break;
  1103. case MNSCx_DIV_TIMER_8BIT:
  1104. *port->_tmxmd = 0;
  1105. *(volatile u8 *) port->_tmxbr = (u8) tmxbr;
  1106. *port->_tmxmd = TM2MD_INIT_COUNTER;
  1107. *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
  1108. break;
  1109. }
  1110. /* CTS flow control flag and modem status interrupts */
  1111. scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS);
  1112. if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) {
  1113. /* want to interrupt when CTS goes low if CTS is now
  1114. * high and vice versa
  1115. */
  1116. port->tx_cts = *port->_status;
  1117. if (port->tx_cts & SC2STR_CTS)
  1118. scxctr |= SC2CTR_TWE;
  1119. else
  1120. scxctr |= SC2CTR_TWE | SC2CTR_TWS;
  1121. }
  1122. /* set up parity check flag */
  1123. port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN);
  1124. if (new->c_iflag & INPCK)
  1125. port->uart.read_status_mask |=
  1126. (1 << TTY_PARITY) | (1 << TTY_FRAME);
  1127. if (new->c_iflag & (BRKINT | PARMRK))
  1128. port->uart.read_status_mask |= (1 << TTY_BREAK);
  1129. /* characters to ignore */
  1130. port->uart.ignore_status_mask = 0;
  1131. if (new->c_iflag & IGNPAR)
  1132. port->uart.ignore_status_mask |=
  1133. (1 << TTY_PARITY) | (1 << TTY_FRAME);
  1134. if (new->c_iflag & IGNBRK) {
  1135. port->uart.ignore_status_mask |= (1 << TTY_BREAK);
  1136. /*
  1137. * If we're ignoring parity and break indicators,
  1138. * ignore overruns to (for real raw support).
  1139. */
  1140. if (new->c_iflag & IGNPAR)
  1141. port->uart.ignore_status_mask |= (1 << TTY_OVERRUN);
  1142. }
  1143. /* Ignore all characters if CREAD is not set */
  1144. if ((new->c_cflag & CREAD) == 0)
  1145. port->uart.ignore_status_mask |= (1 << TTY_NORMAL);
  1146. scxctr |= *port->_control & (SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
  1147. *port->_control = scxctr;
  1148. spin_unlock_irqrestore(&port->uart.lock, flags);
  1149. }
  1150. /*
  1151. * set the terminal I/O parameters
  1152. */
  1153. static void mn10300_serial_set_termios(struct uart_port *_port,
  1154. struct ktermios *new,
  1155. struct ktermios *old)
  1156. {
  1157. struct mn10300_serial_port *port =
  1158. container_of(_port, struct mn10300_serial_port, uart);
  1159. _enter("%s,%p,%p", port->name, new, old);
  1160. mn10300_serial_change_speed(port, new, old);
  1161. /* handle turning off CRTSCTS */
  1162. if (!(new->c_cflag & CRTSCTS)) {
  1163. u16 ctr = *port->_control;
  1164. ctr &= ~SC2CTR_TWE;
  1165. *port->_control = ctr;
  1166. }
  1167. /* change Transfer bit-order (LSB/MSB) */
  1168. if (new->c_cflag & CODMSB)
  1169. *port->_control |= SC01CTR_OD_MSBFIRST; /* MSB MODE */
  1170. else
  1171. *port->_control &= ~SC01CTR_OD_MSBFIRST; /* LSB MODE */
  1172. }
  1173. /*
  1174. * return description of port type
  1175. */
  1176. static const char *mn10300_serial_type(struct uart_port *_port)
  1177. {
  1178. struct mn10300_serial_port *port =
  1179. container_of(_port, struct mn10300_serial_port, uart);
  1180. if (port->uart.type == PORT_MN10300_CTS)
  1181. return "MN10300 SIF_CTS";
  1182. return "MN10300 SIF";
  1183. }
  1184. /*
  1185. * release I/O and memory regions in use by port
  1186. */
  1187. static void mn10300_serial_release_port(struct uart_port *_port)
  1188. {
  1189. struct mn10300_serial_port *port =
  1190. container_of(_port, struct mn10300_serial_port, uart);
  1191. _enter("%s", port->name);
  1192. release_mem_region((unsigned long) port->_iobase, 16);
  1193. }
  1194. /*
  1195. * request I/O and memory regions for port
  1196. */
  1197. static int mn10300_serial_request_port(struct uart_port *_port)
  1198. {
  1199. struct mn10300_serial_port *port =
  1200. container_of(_port, struct mn10300_serial_port, uart);
  1201. _enter("%s", port->name);
  1202. request_mem_region((unsigned long) port->_iobase, 16, port->name);
  1203. return 0;
  1204. }
  1205. /*
  1206. * configure the type and reserve the ports
  1207. */
  1208. static void mn10300_serial_config_port(struct uart_port *_port, int type)
  1209. {
  1210. struct mn10300_serial_port *port =
  1211. container_of(_port, struct mn10300_serial_port, uart);
  1212. _enter("%s", port->name);
  1213. port->uart.type = PORT_MN10300;
  1214. if (port->options & MNSCx_OPT_CTS)
  1215. port->uart.type = PORT_MN10300_CTS;
  1216. mn10300_serial_request_port(_port);
  1217. }
  1218. /*
  1219. * verify serial parameters are suitable for this port type
  1220. */
  1221. static int mn10300_serial_verify_port(struct uart_port *_port,
  1222. struct serial_struct *ss)
  1223. {
  1224. struct mn10300_serial_port *port =
  1225. container_of(_port, struct mn10300_serial_port, uart);
  1226. void *mapbase = (void *) (unsigned long) port->uart.mapbase;
  1227. _enter("%s", port->name);
  1228. /* these things may not be changed */
  1229. if (ss->irq != port->uart.irq ||
  1230. ss->port != port->uart.iobase ||
  1231. ss->io_type != port->uart.iotype ||
  1232. ss->iomem_base != mapbase ||
  1233. ss->iomem_reg_shift != port->uart.regshift ||
  1234. ss->hub6 != port->uart.hub6 ||
  1235. ss->xmit_fifo_size != port->uart.fifosize)
  1236. return -EINVAL;
  1237. /* type may be changed on a port that supports CTS */
  1238. if (ss->type != port->uart.type) {
  1239. if (!(port->options & MNSCx_OPT_CTS))
  1240. return -EINVAL;
  1241. if (ss->type != PORT_MN10300 &&
  1242. ss->type != PORT_MN10300_CTS)
  1243. return -EINVAL;
  1244. }
  1245. return 0;
  1246. }
  1247. /*
  1248. * initialise the MN10300 on-chip UARTs
  1249. */
  1250. static int __init mn10300_serial_init(void)
  1251. {
  1252. struct mn10300_serial_port *port;
  1253. int ret, i;
  1254. printk(KERN_INFO "%s version %s (%s)\n",
  1255. serial_name, serial_version, serial_revdate);
  1256. #if defined(CONFIG_MN10300_TTYSM2) && defined(CONFIG_AM33_2)
  1257. {
  1258. int tmp;
  1259. SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */
  1260. tmp = SC2TIM;
  1261. }
  1262. #endif
  1263. set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL),
  1264. mn10300_serial_vdma_interrupt);
  1265. ret = uart_register_driver(&mn10300_serial_driver);
  1266. if (!ret) {
  1267. for (i = 0 ; i < NR_PORTS ; i++) {
  1268. port = mn10300_serial_ports[i];
  1269. if (!port || port->gdbstub)
  1270. continue;
  1271. switch (port->clock_src) {
  1272. case MNSCx_CLOCK_SRC_IOCLK:
  1273. port->ioclk = MN10300_IOCLK;
  1274. break;
  1275. #ifdef MN10300_IOBCLK
  1276. case MNSCx_CLOCK_SRC_IOBCLK:
  1277. port->ioclk = MN10300_IOBCLK;
  1278. break;
  1279. #endif
  1280. default:
  1281. BUG();
  1282. }
  1283. ret = uart_add_one_port(&mn10300_serial_driver,
  1284. &port->uart);
  1285. if (ret < 0) {
  1286. _debug("ERROR %d", -ret);
  1287. break;
  1288. }
  1289. }
  1290. if (ret)
  1291. uart_unregister_driver(&mn10300_serial_driver);
  1292. }
  1293. return ret;
  1294. }
  1295. __initcall(mn10300_serial_init);
  1296. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  1297. /*
  1298. * print a string to the serial port without disturbing the real user of the
  1299. * port too much
  1300. * - the console must be locked by the caller
  1301. */
  1302. static void mn10300_serial_console_write(struct console *co,
  1303. const char *s, unsigned count)
  1304. {
  1305. struct mn10300_serial_port *port;
  1306. unsigned i;
  1307. u16 scxctr, txicr, tmp;
  1308. u8 tmxmd;
  1309. port = mn10300_serial_ports[co->index];
  1310. /* firstly hijack the serial port from the "virtual DMA" controller */
  1311. arch_local_cli();
  1312. txicr = *port->tx_icr;
  1313. *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
  1314. tmp = *port->tx_icr;
  1315. arch_local_sti();
  1316. /* the transmitter may be disabled */
  1317. scxctr = *port->_control;
  1318. if (!(scxctr & SC01CTR_TXE)) {
  1319. /* restart the UART clock */
  1320. tmxmd = *port->_tmxmd;
  1321. switch (port->div_timer) {
  1322. case MNSCx_DIV_TIMER_16BIT:
  1323. *port->_tmxmd = 0;
  1324. *port->_tmxmd = TM8MD_INIT_COUNTER;
  1325. *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
  1326. break;
  1327. case MNSCx_DIV_TIMER_8BIT:
  1328. *port->_tmxmd = 0;
  1329. *port->_tmxmd = TM2MD_INIT_COUNTER;
  1330. *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
  1331. break;
  1332. }
  1333. /* enable the transmitter */
  1334. *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE;
  1335. } else if (scxctr & SC01CTR_BKE) {
  1336. /* stop transmitting BREAK */
  1337. *port->_control = (scxctr & ~SC01CTR_BKE);
  1338. }
  1339. /* send the chars into the serial port (with LF -> LFCR conversion) */
  1340. for (i = 0; i < count; i++) {
  1341. char ch = *s++;
  1342. while (*port->_status & SC01STR_TBF)
  1343. continue;
  1344. *(u8 *) port->_txb = ch;
  1345. if (ch == 0x0a) {
  1346. while (*port->_status & SC01STR_TBF)
  1347. continue;
  1348. *(u8 *) port->_txb = 0xd;
  1349. }
  1350. }
  1351. /* can't let the transmitter be turned off if it's actually
  1352. * transmitting */
  1353. while (*port->_status & (SC01STR_TXF | SC01STR_TBF))
  1354. continue;
  1355. /* disable the transmitter if we re-enabled it */
  1356. if (!(scxctr & SC01CTR_TXE))
  1357. *port->_control = scxctr;
  1358. arch_local_cli();
  1359. *port->tx_icr = txicr;
  1360. tmp = *port->tx_icr;
  1361. arch_local_sti();
  1362. }
  1363. /*
  1364. * set up a serial port as a console
  1365. * - construct a cflag setting for the first rs_open()
  1366. * - initialize the serial port
  1367. * - return non-zero if we didn't find a serial port.
  1368. */
  1369. static int __init mn10300_serial_console_setup(struct console *co,
  1370. char *options)
  1371. {
  1372. struct mn10300_serial_port *port;
  1373. int i, parity = 'n', baud = 9600, bits = 8, flow = 0;
  1374. for (i = 0 ; i < NR_PORTS ; i++) {
  1375. port = mn10300_serial_ports[i];
  1376. if (port && !port->gdbstub && port->uart.line == co->index)
  1377. goto found_device;
  1378. }
  1379. return -ENODEV;
  1380. found_device:
  1381. switch (port->clock_src) {
  1382. case MNSCx_CLOCK_SRC_IOCLK:
  1383. port->ioclk = MN10300_IOCLK;
  1384. break;
  1385. #ifdef MN10300_IOBCLK
  1386. case MNSCx_CLOCK_SRC_IOBCLK:
  1387. port->ioclk = MN10300_IOBCLK;
  1388. break;
  1389. #endif
  1390. default:
  1391. BUG();
  1392. }
  1393. if (options)
  1394. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1395. return uart_set_options(&port->uart, co, baud, parity, bits, flow);
  1396. }
  1397. /*
  1398. * register console
  1399. */
  1400. static int __init mn10300_serial_console_init(void)
  1401. {
  1402. register_console(&mn10300_serial_console);
  1403. return 0;
  1404. }
  1405. console_initcall(mn10300_serial_console_init);
  1406. #endif
  1407. #ifdef CONFIG_CONSOLE_POLL
  1408. /*
  1409. * Polled character reception for the kernel debugger
  1410. */
  1411. static int mn10300_serial_poll_get_char(struct uart_port *_port)
  1412. {
  1413. struct mn10300_serial_port *port =
  1414. container_of(_port, struct mn10300_serial_port, uart);
  1415. unsigned ix;
  1416. u8 st, ch;
  1417. _enter("%s", port->name);
  1418. do {
  1419. /* pull chars out of the hat */
  1420. ix = port->rx_outp;
  1421. if (ix == port->rx_inp)
  1422. return NO_POLL_CHAR;
  1423. ch = port->rx_buffer[ix++];
  1424. st = port->rx_buffer[ix++];
  1425. smp_rmb();
  1426. port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
  1427. } while (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF));
  1428. return ch;
  1429. }
  1430. /*
  1431. * Polled character transmission for the kernel debugger
  1432. */
  1433. static void mn10300_serial_poll_put_char(struct uart_port *_port,
  1434. unsigned char ch)
  1435. {
  1436. struct mn10300_serial_port *port =
  1437. container_of(_port, struct mn10300_serial_port, uart);
  1438. u8 intr, tmp;
  1439. /* wait for the transmitter to finish anything it might be doing (and
  1440. * this includes the virtual DMA handler, so it might take a while) */
  1441. while (*port->_status & (SC01STR_TBF | SC01STR_TXF))
  1442. continue;
  1443. /* disable the Tx ready interrupt */
  1444. intr = *port->_intr;
  1445. *port->_intr = intr & ~SC01ICR_TI;
  1446. tmp = *port->_intr;
  1447. if (ch == 0x0a) {
  1448. *(u8 *) port->_txb = 0x0d;
  1449. while (*port->_status & SC01STR_TBF)
  1450. continue;
  1451. }
  1452. *(u8 *) port->_txb = ch;
  1453. while (*port->_status & SC01STR_TBF)
  1454. continue;
  1455. /* restore the Tx interrupt flag */
  1456. *port->_intr = intr;
  1457. tmp = *port->_intr;
  1458. }
  1459. #endif /* CONFIG_CONSOLE_POLL */