setup.c 5.9 KB

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  1. /*
  2. * Copyright (C) 2003 PMC-Sierra Inc.
  3. * Author: Manish Lachwani (lachwani@pmc-sierra.com)
  4. *
  5. * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. *
  12. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  13. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  14. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  15. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  16. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  17. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  18. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  19. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  20. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  21. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  22. *
  23. * You should have received a copy of the GNU General Public License along
  24. * with this program; if not, write to the Free Software Foundation, Inc.,
  25. * 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/bcd.h>
  28. #include <linux/init.h>
  29. #include <linux/kernel.h>
  30. #include <linux/types.h>
  31. #include <linux/mm.h>
  32. #include <linux/bootmem.h>
  33. #include <linux/swap.h>
  34. #include <linux/ioport.h>
  35. #include <linux/sched.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/timex.h>
  38. #include <linux/termios.h>
  39. #include <linux/tty.h>
  40. #include <linux/serial.h>
  41. #include <linux/serial_core.h>
  42. #include <linux/serial_8250.h>
  43. #include <asm/time.h>
  44. #include <asm/bootinfo.h>
  45. #include <asm/page.h>
  46. #include <asm/io.h>
  47. #include <asm/irq.h>
  48. #include <asm/processor.h>
  49. #include <asm/reboot.h>
  50. #include <asm/serial.h>
  51. #include <asm/titan_dep.h>
  52. #include <asm/m48t37.h>
  53. #include "setup.h"
  54. unsigned char titan_ge_mac_addr_base[6] = {
  55. // 0x00, 0x03, 0xcc, 0x1d, 0x22, 0x00
  56. 0x00, 0xe0, 0x04, 0x00, 0x00, 0x21
  57. };
  58. unsigned long cpu_clock_freq;
  59. unsigned long yosemite_base;
  60. static struct m48t37_rtc *m48t37_base;
  61. void __init bus_error_init(void)
  62. {
  63. /* Do nothing */
  64. }
  65. void read_persistent_clock(struct timespec *ts)
  66. {
  67. unsigned int year, month, day, hour, min, sec;
  68. unsigned long flags;
  69. spin_lock_irqsave(&rtc_lock, flags);
  70. /* Stop the update to the time */
  71. m48t37_base->control = 0x40;
  72. year = bcd2bin(m48t37_base->year);
  73. year += bcd2bin(m48t37_base->century) * 100;
  74. month = bcd2bin(m48t37_base->month);
  75. day = bcd2bin(m48t37_base->date);
  76. hour = bcd2bin(m48t37_base->hour);
  77. min = bcd2bin(m48t37_base->min);
  78. sec = bcd2bin(m48t37_base->sec);
  79. /* Start the update to the time again */
  80. m48t37_base->control = 0x00;
  81. spin_unlock_irqrestore(&rtc_lock, flags);
  82. ts->tv_sec = mktime(year, month, day, hour, min, sec);
  83. ts->tv_nsec = 0;
  84. }
  85. int rtc_mips_set_time(unsigned long tim)
  86. {
  87. struct rtc_time tm;
  88. unsigned long flags;
  89. /*
  90. * Convert to a more useful format -- note months count from 0
  91. * and years from 1900
  92. */
  93. rtc_time_to_tm(tim, &tm);
  94. tm.tm_year += 1900;
  95. tm.tm_mon += 1;
  96. spin_lock_irqsave(&rtc_lock, flags);
  97. /* enable writing */
  98. m48t37_base->control = 0x80;
  99. /* year */
  100. m48t37_base->year = bin2bcd(tm.tm_year % 100);
  101. m48t37_base->century = bin2bcd(tm.tm_year / 100);
  102. /* month */
  103. m48t37_base->month = bin2bcd(tm.tm_mon);
  104. /* day */
  105. m48t37_base->date = bin2bcd(tm.tm_mday);
  106. /* hour/min/sec */
  107. m48t37_base->hour = bin2bcd(tm.tm_hour);
  108. m48t37_base->min = bin2bcd(tm.tm_min);
  109. m48t37_base->sec = bin2bcd(tm.tm_sec);
  110. /* day of week -- not really used, but let's keep it up-to-date */
  111. m48t37_base->day = bin2bcd(tm.tm_wday + 1);
  112. /* disable writing */
  113. m48t37_base->control = 0x00;
  114. spin_unlock_irqrestore(&rtc_lock, flags);
  115. return 0;
  116. }
  117. void __init plat_time_init(void)
  118. {
  119. mips_hpt_frequency = cpu_clock_freq / 2;
  120. mips_hpt_frequency = 33000000 * 3 * 5;
  121. }
  122. unsigned long ocd_base;
  123. EXPORT_SYMBOL(ocd_base);
  124. /*
  125. * Common setup before any secondaries are started
  126. */
  127. #define TITAN_UART_CLK 3686400
  128. #define TITAN_SERIAL_BASE_BAUD (TITAN_UART_CLK / 16)
  129. #define TITAN_SERIAL_IRQ 4
  130. #define TITAN_SERIAL_BASE 0xfd000008UL
  131. static void __init py_map_ocd(void)
  132. {
  133. ocd_base = (unsigned long) ioremap(OCD_BASE, OCD_SIZE);
  134. if (!ocd_base)
  135. panic("Mapping OCD failed - game over. Your score is 0.");
  136. /* Kludge for PMON bug ... */
  137. OCD_WRITE(0x0710, 0x0ffff029);
  138. }
  139. static void __init py_uart_setup(void)
  140. {
  141. #ifdef CONFIG_SERIAL_8250
  142. struct uart_port up;
  143. /*
  144. * Register to interrupt zero because we share the interrupt with
  145. * the serial driver which we don't properly support yet.
  146. */
  147. memset(&up, 0, sizeof(up));
  148. up.membase = (unsigned char *) ioremap(TITAN_SERIAL_BASE, 8);
  149. up.irq = TITAN_SERIAL_IRQ;
  150. up.uartclk = TITAN_UART_CLK;
  151. up.regshift = 0;
  152. up.iotype = UPIO_MEM;
  153. up.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
  154. up.line = 0;
  155. if (early_serial_setup(&up))
  156. printk(KERN_ERR "Early serial init of port 0 failed\n");
  157. #endif /* CONFIG_SERIAL_8250 */
  158. }
  159. static void __init py_rtc_setup(void)
  160. {
  161. m48t37_base = ioremap(YOSEMITE_RTC_BASE, YOSEMITE_RTC_SIZE);
  162. if (!m48t37_base)
  163. printk(KERN_ERR "Mapping the RTC failed\n");
  164. }
  165. /* Not only time init but that's what the hook it's called through is named */
  166. static void __init py_late_time_init(void)
  167. {
  168. py_map_ocd();
  169. py_uart_setup();
  170. py_rtc_setup();
  171. }
  172. void __init plat_mem_setup(void)
  173. {
  174. late_time_init = py_late_time_init;
  175. /* Add memory regions */
  176. add_memory_region(0x00000000, 0x10000000, BOOT_MEM_RAM);
  177. #if 0 /* XXX Crash ... */
  178. OCD_WRITE(RM9000x2_OCD_HTSC,
  179. OCD_READ(RM9000x2_OCD_HTSC) | HYPERTRANSPORT_ENABLE);
  180. /* Set the BAR. Shifted mode */
  181. OCD_WRITE(RM9000x2_OCD_HTBAR0, HYPERTRANSPORT_BAR0_ADDR);
  182. OCD_WRITE(RM9000x2_OCD_HTMASK0, HYPERTRANSPORT_SIZE0);
  183. #endif
  184. }