gpio_extended.c 4.6 KB

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  1. /*
  2. * Generic PMC MSP71xx EXTENDED (EXD) GPIO handling. The extended gpio is
  3. * a set of hardware registers that have no need for explicit locking as
  4. * it is handled by unique method of writing individual set/clr bits.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * @author Patrick Glass <patrickglass@gmail.com>
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/gpio.h>
  16. #include <linux/io.h>
  17. #define MSP71XX_DATA_OFFSET(gpio) (2 * (gpio))
  18. #define MSP71XX_READ_OFFSET(gpio) (MSP71XX_DATA_OFFSET(gpio) + 1)
  19. #define MSP71XX_CFG_OUT_OFFSET(gpio) (MSP71XX_DATA_OFFSET(gpio) + 16)
  20. #define MSP71XX_CFG_IN_OFFSET(gpio) (MSP71XX_CFG_OUT_OFFSET(gpio) + 1)
  21. #define MSP71XX_EXD_GPIO_BASE 0x0BC000000L
  22. #define to_msp71xx_exd_gpio_chip(c) \
  23. container_of(c, struct msp71xx_exd_gpio_chip, chip)
  24. /*
  25. * struct msp71xx_exd_gpio_chip - container for gpio chip and registers
  26. * @chip: chip structure for the specified gpio bank
  27. * @reg: register for control and data of gpio pin
  28. */
  29. struct msp71xx_exd_gpio_chip {
  30. struct gpio_chip chip;
  31. void __iomem *reg;
  32. };
  33. /*
  34. * msp71xx_exd_gpio_get() - return the chip's gpio value
  35. * @chip: chip structure which controls the specified gpio
  36. * @offset: gpio whose value will be returned
  37. *
  38. * It will return 0 if gpio value is low and other if high.
  39. */
  40. static int msp71xx_exd_gpio_get(struct gpio_chip *chip, unsigned offset)
  41. {
  42. struct msp71xx_exd_gpio_chip *msp71xx_chip =
  43. to_msp71xx_exd_gpio_chip(chip);
  44. const unsigned bit = MSP71XX_READ_OFFSET(offset);
  45. return __raw_readl(msp71xx_chip->reg) & (1 << bit);
  46. }
  47. /*
  48. * msp71xx_exd_gpio_set() - set the output value for the gpio
  49. * @chip: chip structure who controls the specified gpio
  50. * @offset: gpio whose value will be assigned
  51. * @value: logic level to assign to the gpio initially
  52. *
  53. * This will set the gpio bit specified to the desired value. It will set the
  54. * gpio pin low if value is 0 otherwise it will be high.
  55. */
  56. static void msp71xx_exd_gpio_set(struct gpio_chip *chip,
  57. unsigned offset, int value)
  58. {
  59. struct msp71xx_exd_gpio_chip *msp71xx_chip =
  60. to_msp71xx_exd_gpio_chip(chip);
  61. const unsigned bit = MSP71XX_DATA_OFFSET(offset);
  62. __raw_writel(1 << (bit + (value ? 1 : 0)), msp71xx_chip->reg);
  63. }
  64. /*
  65. * msp71xx_exd_direction_output() - declare the direction mode for a gpio
  66. * @chip: chip structure which controls the specified gpio
  67. * @offset: gpio whose value will be assigned
  68. * @value: logic level to assign to the gpio initially
  69. *
  70. * This call will set the mode for the @gpio to output. It will set the
  71. * gpio pin low if value is 0 otherwise it will be high.
  72. */
  73. static int msp71xx_exd_direction_output(struct gpio_chip *chip,
  74. unsigned offset, int value)
  75. {
  76. struct msp71xx_exd_gpio_chip *msp71xx_chip =
  77. to_msp71xx_exd_gpio_chip(chip);
  78. msp71xx_exd_gpio_set(chip, offset, value);
  79. __raw_writel(1 << MSP71XX_CFG_OUT_OFFSET(offset), msp71xx_chip->reg);
  80. return 0;
  81. }
  82. /*
  83. * msp71xx_exd_direction_input() - declare the direction mode for a gpio
  84. * @chip: chip structure which controls the specified gpio
  85. * @offset: gpio whose to which the value will be assigned
  86. *
  87. * This call will set the mode for the @gpio to input.
  88. */
  89. static int msp71xx_exd_direction_input(struct gpio_chip *chip, unsigned offset)
  90. {
  91. struct msp71xx_exd_gpio_chip *msp71xx_chip =
  92. to_msp71xx_exd_gpio_chip(chip);
  93. __raw_writel(1 << MSP71XX_CFG_IN_OFFSET(offset), msp71xx_chip->reg);
  94. return 0;
  95. }
  96. #define MSP71XX_EXD_GPIO_BANK(name, exd_reg, base_gpio, num_gpio) \
  97. { \
  98. .chip = { \
  99. .label = name, \
  100. .direction_input = msp71xx_exd_direction_input, \
  101. .direction_output = msp71xx_exd_direction_output, \
  102. .get = msp71xx_exd_gpio_get, \
  103. .set = msp71xx_exd_gpio_set, \
  104. .base = base_gpio, \
  105. .ngpio = num_gpio, \
  106. }, \
  107. .reg = (void __iomem *)(MSP71XX_EXD_GPIO_BASE + exd_reg), \
  108. }
  109. /*
  110. * struct msp71xx_exd_gpio_banks[] - container array of gpio banks
  111. * @chip: chip structure for the specified gpio bank
  112. * @reg: register for reading and writing the gpio pin value
  113. *
  114. * This array structure defines the extended gpio banks for the
  115. * PMC MIPS Processor. We specify the bank name, the data/config
  116. * register,the base starting gpio number, and the number of
  117. * gpios exposed by the bank of gpios.
  118. */
  119. static struct msp71xx_exd_gpio_chip msp71xx_exd_gpio_banks[] = {
  120. MSP71XX_EXD_GPIO_BANK("GPIO_23_16", 0x188, 16, 8),
  121. MSP71XX_EXD_GPIO_BANK("GPIO_27_24", 0x18C, 24, 4),
  122. };
  123. void __init msp71xx_init_gpio_extended(void)
  124. {
  125. int i;
  126. for (i = 0; i < ARRAY_SIZE(msp71xx_exd_gpio_banks); i++)
  127. gpiochip_add(&msp71xx_exd_gpio_banks[i].chip);
  128. }