irq.h 2.8 KB

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  1. /* linux/arch/arm/plat-samsung/include/plat/irq.h
  2. *
  3. * Copyright (c) 2004-2005 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Header file for S3C24XX CPU IRQ support
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/io.h>
  13. #include <mach/hardware.h>
  14. #include <mach/regs-irq.h>
  15. #include <mach/regs-gpio.h>
  16. #define irqdbf(x...)
  17. #define irqdbf2(x...)
  18. #define EXTINT_OFF (IRQ_EINT4 - 4)
  19. /* these are exported for arch/arm/mach-* usage */
  20. extern struct irq_chip s3c_irq_level_chip;
  21. extern struct irq_chip s3c_irq_chip;
  22. static inline void s3c_irqsub_mask(unsigned int irqno,
  23. unsigned int parentbit,
  24. int subcheck)
  25. {
  26. unsigned long mask;
  27. unsigned long submask;
  28. submask = __raw_readl(S3C2410_INTSUBMSK);
  29. mask = __raw_readl(S3C2410_INTMSK);
  30. submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
  31. /* check to see if we need to mask the parent IRQ */
  32. if ((submask & subcheck) == subcheck)
  33. __raw_writel(mask | parentbit, S3C2410_INTMSK);
  34. /* write back masks */
  35. __raw_writel(submask, S3C2410_INTSUBMSK);
  36. }
  37. static inline void s3c_irqsub_unmask(unsigned int irqno,
  38. unsigned int parentbit)
  39. {
  40. unsigned long mask;
  41. unsigned long submask;
  42. submask = __raw_readl(S3C2410_INTSUBMSK);
  43. mask = __raw_readl(S3C2410_INTMSK);
  44. submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
  45. mask &= ~parentbit;
  46. /* write back masks */
  47. __raw_writel(submask, S3C2410_INTSUBMSK);
  48. __raw_writel(mask, S3C2410_INTMSK);
  49. }
  50. static inline void s3c_irqsub_maskack(unsigned int irqno,
  51. unsigned int parentmask,
  52. unsigned int group)
  53. {
  54. unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
  55. s3c_irqsub_mask(irqno, parentmask, group);
  56. __raw_writel(bit, S3C2410_SUBSRCPND);
  57. /* only ack parent if we've got all the irqs (seems we must
  58. * ack, all and hope that the irq system retriggers ok when
  59. * the interrupt goes off again)
  60. */
  61. if (1) {
  62. __raw_writel(parentmask, S3C2410_SRCPND);
  63. __raw_writel(parentmask, S3C2410_INTPND);
  64. }
  65. }
  66. static inline void s3c_irqsub_ack(unsigned int irqno,
  67. unsigned int parentmask,
  68. unsigned int group)
  69. {
  70. unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
  71. __raw_writel(bit, S3C2410_SUBSRCPND);
  72. /* only ack parent if we've got all the irqs (seems we must
  73. * ack, all and hope that the irq system retriggers ok when
  74. * the interrupt goes off again)
  75. */
  76. if (1) {
  77. __raw_writel(parentmask, S3C2410_SRCPND);
  78. __raw_writel(parentmask, S3C2410_INTPND);
  79. }
  80. }
  81. /* exported for use in arch/arm/mach-s3c2410 */
  82. #ifdef CONFIG_PM
  83. extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
  84. #else
  85. #define s3c_irq_wake NULL
  86. #endif
  87. extern int s3c_irqext_type(struct irq_data *d, unsigned int type);