dma-s3c24xx.h 2.1 KB

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  1. /* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
  2. *
  3. * Copyright (C) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Samsung S3C24XX DMA support - per SoC functions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <plat/dma-core.h>
  13. extern struct bus_type dma_subsys;
  14. extern struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
  15. #define DMA_CH_VALID (1<<31)
  16. #define DMA_CH_NEVER (1<<30)
  17. /* struct s3c24xx_dma_map
  18. *
  19. * this holds the mapping information for the channel selected
  20. * to be connected to the specified device
  21. */
  22. struct s3c24xx_dma_map {
  23. const char *name;
  24. unsigned long channels[S3C_DMA_CHANNELS];
  25. unsigned long channels_rx[S3C_DMA_CHANNELS];
  26. };
  27. struct s3c24xx_dma_selection {
  28. struct s3c24xx_dma_map *map;
  29. unsigned long map_size;
  30. unsigned long dcon_mask;
  31. void (*select)(struct s3c2410_dma_chan *chan,
  32. struct s3c24xx_dma_map *map);
  33. void (*direction)(struct s3c2410_dma_chan *chan,
  34. struct s3c24xx_dma_map *map,
  35. enum dma_data_direction dir);
  36. };
  37. extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
  38. /* struct s3c24xx_dma_order_ch
  39. *
  40. * channel map for one of the `enum dma_ch` dma channels. the list
  41. * entry contains a set of low-level channel numbers, orred with
  42. * DMA_CH_VALID, which are checked in the order in the array.
  43. */
  44. struct s3c24xx_dma_order_ch {
  45. unsigned int list[S3C_DMA_CHANNELS]; /* list of channels */
  46. unsigned int flags; /* flags */
  47. };
  48. /* struct s3c24xx_dma_order
  49. *
  50. * information provided by either the core or the board to give the
  51. * dma system a hint on how to allocate channels
  52. */
  53. struct s3c24xx_dma_order {
  54. struct s3c24xx_dma_order_ch channels[DMACH_MAX];
  55. };
  56. extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map);
  57. /* DMA init code, called from the cpu support code */
  58. extern int s3c2410_dma_init(void);
  59. extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq,
  60. unsigned int stride);